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AD8361ARM-REEL

AD8361ARM-REEL

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD8361ARM-REEL - LF to 2.5 GHz TruPwr™ Detector - Analog Devices

  • 数据手册
  • 价格&库存
AD8361ARM-REEL 数据手册
LF to 2.5 GHz TruPwr™ Detector AD8361 FEATURES Calibrated rms response Excellent temperature stability Up to 30 dB input range at 2.5 GHz 700 mV rms, 10 dBm, re 50 Ω maximum input ±0.25 dB linear response up to 2.5 GHz Single-supply operation: 2.7 V to 5.5 V Low power: 3.3 mW at 3 V supply Rapid power-down to less than 1 µA FUNCTIONAL BLOCK DIAGRAMS VPOS RFIN χ2 TRANSCONDUCTANCE CELLS i INTERNAL FILTER FLTR AD8361 χ2 i ERROR AMP × 7.5 BUFFER ADD OFFSET VRMS PWDN BAND-GAP REFERENCE SREF COMM IREF 01088-C-002 01088-C-003 APPLICATIONS Measurement of CDMA, W-CDMA, QAM, other complex modulation waveforms RF transmitter or receiver power measurement Figure 2. 8-Lead MSOP VPOS RFIN GENERAL DESCRIPTION The AD8361 is a mean-responding power detector for use in high frequency receiver and transmitter signal chains, up to 2.5 GHz. It is ver y easy to apply. It requires a single supply only between 2.7 V and 5.5 V, a power supply decoupling capacitor, and an input coupling capacitor in most applications. The output is a linear-responding dc voltage with a conversion gain of 7.5 V/V rms. An external filter capacitor can be added to increase the averaging time constant. 3.0 2.8 2.6 2.4 2.2 2.0 INTERNAL REFERENCE MODE SUPPLY REFERENCE MODE χ2 TRANSCONDUCTANCE CELLS i INTERNAL FILTER FLTR AD8361 χ2 i ERROR AMP × 7.5 BUFFER VRMS PWDN BAND-GAP REFERENCE COMM IREF Figure 3. 6-Lead SOT-23 V rms (Volts) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.0 01088-C-001 The AD8361 is intended for true power measurement of simple and complex waveforms. The device is particularly useful for measuring high crest-factor (high peak-to-rms ratio) signals, such as CDMA and W-CDMA. GROUND REFERENCE MODE The AD8361 has three operating modes to accommodate a variety of analog-to-digital converter requirements: 1. 2. 3. Ground reference mode, in which the origin is zero. Internal reference mode, which offsets the output 350 mV above ground. Supply reference mode, which offsets the output to VS/7.5. 0.2 0 0.1 0.2 0.3 RFIN (V rms) 0.4 0.5 Figure 1. Output in the Three Reference Modes, Supply 3 V, Frequency 1.9 GHz (6-Lead SOT-23 Package Ground Reference Mode Only) The AD8361 is specified for operation from −40°C to +85°C and is available in 8-lead MSOP and 6-lead SOT-23 packages. It is fabricated on a proprietar y high fT silicon bipolar process. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD8361 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 Circuit Description ......................................................................... 11 Applications..................................................................................... 12 Output Reference Temperature Drift Compensation ........... 16 Evaluation Board ............................................................................ 21 Characterization Setups............................................................. 23 Outline Dimensions ....................................................................... 24 Ordering Guide .......................................................................... 24 REVISION HISTORY 8/04—Data Sheet Changed from Rev. B to Rev. C. Changed Trimpots to Trimmable Potentiometers .........Universal Changes to Specifications ................................................................ 3 Changed Using the AD8361 Section Title to Applications ....... 12 Changes to Figure 43...................................................................... 14 Changes to Ordering Guide .......................................................... 24 Updated Outline Dimensions ....................................................... 24 2/01—Data Sheet Changed from Rev. A to Rev. B. Rev. C | Page 2 of 24 AD8361 SPECIFICATIONS TA = 25°C, VS = 3 V, fRF = 900 MHz, ground reference output mode, unless otherwise noted. Table 1. Parameter SIGNAL INPUT INTERFACE Frequency Range1 Linear Response Upper Limit Condition (Input RFIN) VS = 3 V Equivalent dBm, re 50 Ω VS = 5 V Equivalent dBm, re 50 Ω (Input RFIN to Output V rms) 7.5 fRF = 100 MHz, VS = 5 V Error Referred to Best Fit Line3 CW Input, −40°C < TA < +85°C CW Input, −40°C < TA < +85°C CW Input, −40°C < TA < +85°C CW Input, VS = 5 V, −40°C < TA < +85°C Internal Reference Mode Supply Reference Mode, VS = 3.0 V Supply Reference Mode, VS = 5.0 V 5.5 dB Peak-to-Average Ratio (IS95 Reverse Link) 12 dB Peak-to-Average Ratio (W-CDMA 4 Channels) 18 dB Peak-to-Average Ratio (W-CDMA 15 Channels) Inferred from Best Fit Line3 0 V at SREF, VS at IREF fRF = 100 MHz, VS = 5 V 0 V at SREF, IREF Open fRF = 100 MHz, VS = 5 V 3 V at IREF, 3 V at SREF VS at IREF, VS at SREF fRF = 100 MHz, VS = 5 V 2.7 ≤ VS ≤ 5.5 V, −40°C < TA < +85°C 2.7 ≤ VS ≤ 5.5 V, −40°C < TA < +85°C 2 pF at FLTR Pin, 224 mV rms at RFIN 100 nF at FLTR Pin, 224 mV rms at RFIN 6.5 14 23 26 30 1 1 1.5 0.2 1.0 1.2 0 −50 350 300 400 VS/7.5 590 VS − 0.5 0.1 5 320 10 mA), the AD8051, which also has rail-to- rail capability, can be used down to a supply voltage of 3 V. It can deliver up to 45 mA of output current. 0.01µF 5V 100pF 0.01µF VPOS VOUT OUTPUT REFERENCE TEMPERATURE DRIFT COMPENSATION The error due to low temperature drift of the AD8361 can be reduced if the temperature is known. Many systems incorporate a temperature sensor; the output of the sensor is typically digitized, facilitating a software correction. Using this information, only a two-point calibration at ambient is required. The output voltage of the AD8361 at ambient (25°C) can be expressed by the equation VOUT = (GAIN × VIN ) + ς ΟΣ AD8361 COMM PWDN AD8031 15V/V rms where GAIN is the conversion gain in V/V rms and VOS is the extrapolated output voltage for an input level of 0 V. GAIN and VOS (also referred to as intercept and output reference) can be calculated at ambient using a simple two-point calibration by measuring the output voltages for two specific input levels. Calibration at roughly 35 mV rms (−16 dBm) and 250 mV rms (+1 dBm) is recommended for maximum linear dynamic range. However, alternative levels and ranges can be chosen to suit the application. GAIN and VOS are then calculated using the equations GAIN = 01088-C-049 5kΩ 5kΩ (VOUT2 − VOUT1 ) VIN2 − VIN1 Figure 49. Output Buffering Options, Slope of 15 V/V rms VOS = VOUT1 − (GAIN × VIN1 ) 0.01µF 5V 100pF 10kΩ VPOS VOUT 5kΩ 5kΩ COMM PWDN 0.01µF AD8361 01088-C-050 AD8031 3.75V/V rms Both GAIN and VOS drift over temperature. However, the drift of VOS has a bigger influence on the error relative to the output. This can be seen by inserting data from Figure 18 and Figure 21 (intercept drift and conversion gain) into the equation for VOUT. These plots are consistent with Figure 14 and Figure 15, which show that the error due to temperature drift decreases with increasing input level. This results from the offset error having a diminishing influence with increasing level on the overall measurement error. From Figure 18, the average intercept drift is 0.43 mV/°C from −40°C to +25°C and 0.17 mV/°C from +25°C to +85°C. For a less rigorous compensation scheme, the average drift over the complete temperature range can be calculated as ⎛ 0.010 V − (− 0.028 V ) ⎞ DRIFTVOS (V/°C ) = ⎜ ⎜ + 85°C − (− 40°C ) ⎟ = 0.000304 V/°C ⎟ ⎝ ⎠ Figure 50. Output Buffering Options, Slope of 3.75 V/V rms 0.01µF 5V 100pF VPOS VOUT 0.01µF AD8361 COMM PWDN AD8031 7.5V/V rms With the drift of VOS included, the equation for VOUT becomes 01088-C-051 VOUT = (GAIN × VIN) + VOS + DRIFTVOS × (TEMP − 25°C) Figure 51. Output Buffering Options, Slope of 7.5 V/V rms Rev. C | Page 16 of 24 AD8361 The equation can be rewritten to yield a temperature compensated value for VIN: VIN = Extended Frequency Characterization Although the AD8361 was originally intended as a power measurement and control device for cellular wireless applications, the AD8361 has useful performance at higher frequencies. Typical applications may include MMDS, LMDS, WLAN, and other noncellular activities. In order to characterize the AD8361 at frequencies greater than 2.5 GHz, a small collection of devices were tested. Dynamic range, conversion gain, and output intercept were measured at several frequencies over a temperature range of −30°C to +80°C. Both CW and 64 QAM modulated input wave forms were used in the characterization process in order to access var ying peakto-average waveform performance. The dynamic range of the device is calculated as the input power range over which the device remains within a permissible error margin to the ideal transfer function. Devices were tested over frequency and temperature. After identifying an acceptable error margin for a given application, the usable dynamic measurement range can be identified using the plots in Figure 54 through Figure 57. For instance, for a 1 dB error margin and a modulated carrier at 3 GHz, the usable dynamic range can be found by inspecting the 3 GHz plot of Figure 57. Note that the −30°C cur ve crosses the −1 dB error limit at −17 dBm. For a 5 V supply, the maximum input power should not exceed 6 dBm in order to avoid compression. The resultant usable dynamic range is therefore 6 dBm − (−17 dBm) or 23 dBm over a temperature range of −30°C to +80°C. (VOUT − VOS − DRIFTVOS × (TEMP − 25°C )) GAIN Figure 52 shows the output voltage and error (in dB) as a function of input level for a typical device (note that output voltage is plotted on a logarithmic scale). Figure 53 shows the error in the calculated input level after the temperature compensation algorithm has been applied. For a supply voltage of 5 V, the part exhibits a worst-case linearity error over temperature of approximately ±0.3 dB over a dynamic range of 35 dB. 2.5 2.0 1.5 +85°C 1.0 +25°C 10 ERROR (dB) 0 –0.5 –1.0 –1.5 –2.0 –2.5 –25 –20 –15 –10 –5 PIN (dBm) 0 5 –40°C 1.0 VOUT (V) 01088-C-052 0.5 0.1 10 Figure 52. Typical Output Voltage and Error vs. Input Level, 800 MHz, VPOS = 5 V 2.0 1.5 1.0 0.5 +25°C +85°C 2.5 2.0 +80°C 1.5 1.0 –30°C ERROR (dB) 10 +25°C ERROR (dB) 0 –0.5 –40°C –1.0 –1.5 –2.0 –2.5 –3.0 –30 01088-C-053 0.5 0 –0.5 –1.0 –1.5 –2.0 1 VOUT (V) 01088-0-054 –25 –20 –15 –10 –5 PIN (dBm) 0 5 10 –2.5 –25 0.1 –20 –15 –10 –5 0 5 10 PIN (dBm) Figure 53. Error after Temperature Compensation of Output Reference,800 MHz, VPOS = 5 V Figure 54. Transfer Function and Error Plots Measured at 1.5 GHz for a 64 QAM Modulated Signal Rev. C | Page 17 of 24 AD8361 2.5 2.0 +80°C 1.5 +25°C 1.0 –30°C ERROR (dB) ERROR (dB) VOUT (V) 10 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 01088-C-055 10 CW VOUT (V) 01088-C-059 01088-C-058 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –25 0.1 –20 –15 –10 –5 PIN (dBm) 0 5 10 1 1 64 QAM –2.5 –25 0.1 –20 –15 –10 –5 PIN (dBm) 0 5 10 Figure 55. Transfer Function and Error Plots Measured at 2.5 GHz for a 64 QAM Modulated Signal 2.5 2.0 +80°C +25°C 1.0 –30°C ERROR (dB) VOUT (V) Figure 58. Error from CW Linear Reference vs. Input Drive Level for CW and 64 QAM Modulated Signals at 3.0 GHz 10 8.0 CONVERSION GAIN (V/V rms) 01088-C-056 1.5 7.5 7.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –25 0.1 –20 –15 –10 –5 PIN (dBm) 0 5 10 1 6.5 6.0 5.5 5.0 100 200 400 800 1200 1600 2200 2500 2700 3000 FREQUENCY (MHz) Figure 56. Transfer Function and Error Plots Measured at 2.7 GHz for a 64 QAM Modulated Signal 2.5 2.0 1.5 1.0 ERROR (dB) Figure 59. Conversion Gain vs. Frequency for a Typical Device, Supply 3 V, Ground Reference Mode 10 +80°C +25°C –30°C VOUT (V) 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –25 0.1 –20 –15 –10 –5 PIN (dBm) 0 5 10 01088-C-057 1 The transfer functions and error for a CW input and a 64 QAM input waveform is shown in Figure 58. The error cur ve is generated from a linear reference based on the CW data. The increased crest factor of the 64 QAM modulation results in a decrease in output from the AD8361. This decrease in output is a result of the limited bandwidth and compression of the internal gain stages. This inaccuracy should be accounted for in systems where var ying crest factor signals need to be measured. The conversion gain is defined as the slope of the output voltage versus the input rms voltage. An ideal best fit cur ve can be found for the measured transfer function at a given supply voltage and temperature. The slope of the ideal cur ve is identified as the conversion gain for a particular device. The conversion gain relates the measurement sensitivity of the AD8361 to the rms input voltage of the RF waveform. The conversion gain was measured for a number of devices over a temperature range of −30°C to +80°C. The conversion gain for a typical device is shown in Figure 59. Although the conversion gain tends to decrease with increasing frequency, the AD8361 provides measurement capability at frequencies greater than Figure 57. Transfer Function and Error Plots Measured at 3.0 GHz for a 64 QAM Modulated Signal Rev. C | Page 18 of 24 AD8361 2.5 GHz. However, it is necessar y to calibrate for a given application to accommodate for the change in conversion gain at higher frequencies. One of the AD8361s (U2) has a net gain of about 14 dB preceding it and therefore operates most accurately at low input signal levels. This is referred to as the weak signal path. U4, on the other hand, does not have the added gain and provides accurate response at high levels. The output of U2 is attenuated by R1 in order to cancel the effect of U2’s preceding gain so that the slope of the transfer function (as seen at the slider of R1) is the same as that of U4 by itself. The circuit comprising U3, U5, and U6 is a crossfader, in which the relative gains of the two inputs are determined by the output currents of a fuzzy comparator made from Q1 and Q2. Assuming that the slider of R2 is at 2.5 V dc, the fuzzy comparator commands full weighting of the weak signal path when the output of U2 is below about 2.0 V dc, and full weighting of the strong signal path when the output of U3 exceeds about 3.0 V dc. U3 and U5 are OTAs (operational transconductance amplifiers). Dynamic Range Extension for the AD8361 The accurate measurement range of the AD8361 is limited by internal dc offsets for small input signals and by square law conformance errors for large signals. The measurement range may be extended by using two devices operating at different signal levels and then choosing only the output of the device that provides accurate results at the prevailing input level. Figure 60 depicts an implementation of this idea. In this circuit, the selection of the output is made gradually over an input level range of about 3 dB in order to minimize the impact of imperfect matching of the transfer functions of the two AD8361s. Such a mismatch typically arises because of the variation of the gain of the RF preamplifier U1 and both the gain and slope variations of the AD8361s with temperature. 5V 270Ω 12V RFC U1 6dB PAD ERA-3 20dB 100pF 0.01µF 1 2 3 U2 8 16kΩ 5V 0.1µF R1 5kΩ 2 3 +12V U3 AD8361 7 6 5 68Ω 4 CA3080 5 6 8.2nF 12V 20kΩ 5V RF INPUT 6dB SPLITTER R2 10kΩ 1kΩ Q2 2N3906 1kΩ Q1 2N3906 20kΩ –5V 100Ω 2 3 5V 7 U6 AD820 4 6 VOUT 5V 0.01µF 1 U4 +12V 8 100pF 20kΩ 5V 0.1µF 12kΩ 2 3 AD8361 7 6 5 2 3 1MΩ U5 5 6 CA3080 68Ω 4 –5V R3 10kΩ +5V Figure 60. Range Extender Application Rev. C | Page 19 of 24 01088-C-060 –5V AD8361 U6 provides feedback to linearize the inherent tanh transfer function of the OTAs. When one OTA or the other is fully selected, the feedback is ver y effective. The active OTA has zero differential input; the inactive one has a potentially large differential input, but this does not matter because the inactive OTA is not contributing to the output. However, when both OTAs are active to some extent, and the two signal inputs to the crossfader are different, it is impossible to have zero differential inputs on the OTAs. In this event, the crossfader admittedly generates distortion because of the nonlinear transfer function of the OTAs. Fortunately, in this application, the distortion is not ver y objectionable for two reasons: 1. The mismatch in input levels to the crossfader is never large enough to evoke ver y much distortion because the AD8361s are reasonably well-behaved. The effect of the distortion in this case is merely to distort the other wise nearly linear slope of the transition between the crossfader’s two inputs. VOUT m1 ≠ m2 DIFFERING SLOPES INDICATE MALADJUSTMENT OF R1 VOUT MISALIGNMENT INDICATES MALADJUSTMENT OF R3 RF INPUT LEVEL – V rms Figure 62. Intercept Adjustment In principle, this method could be extended to three or more AD8361s in pursuit of even more measurement range. However, it is ver y important to pay close attention to the matter of not excessively overdriving the AD8361s in the weaker signal paths under strong signal conditions. Figure 63 shows the extended range transfer function at multiple temperatures. The discontinuity at approximately 0.2 V rms arises as a result of component temperature dependencies. Figure 64 shows the error in dB of the range extender circuit at ambient temperature. For a 1 dB error margin, the range extender circuit offers 38 dB of measurement range. 3.0 REF LINE 2. m2 m1 01088-C-061 TRANSITION REGION 2.5 +80°C 2.0 VOUT (V) RF INPUT LEVEL – V rms –30°C 1.5 Figure 61. Slope Adjustment This circuit has three trimmable potentiometers. The suggested setup procedure is as follows: 1. 2. 3. Preset R3 at midrange. Set R2 so that its slider’s voltage is at the middle of the desired transition zone (about 2.5 V dc is recommended). Set R1 so that the transfer function’s slopes are equal on both sides of the transition zone. This is perhaps best accomplished by making a plot of the overall transfer function (using linear voltage scales for both axes) to assess the match in slope between one side of the transition region and the other (see Figure 61). Note: it may be helpful to adjust R3 to remove any large misalignment in the transfer function in order to correctly perceive slope differences. Finally (re)adjust R3 as required to remove any remaining misalignment in the transfer function (see Figure 62). 1.0 0.5 01088-C-063 01088-C-064 0 0 0.2 0.4 0.6 DRIVE LEVEL (V rms) 0.8 01088-C-062 TRANSITION REGION 1.0 Figure 63. Output vs. Drive Level over Temperature for a 1 GHz 64 QAM Modulated Signal 5 4 3 2 ERROR (dB) 1 0 –1 –2 –3 –4 –5 –32 –27 –22 –17 –12 –7 –2 DRIVE LEVEL (dBm) 3 8 13 4. Figure 64. Error from Linear Reference at 25°C for a 1 GHz 64 QAM Modulated Signal Rev. C | Page 20 of 24 AD8361 EVALUATION BOARD Figure 65 and Figure 68 show the schematic of the AD8361 evaluation board. Note that uninstalled components are drawn in as dashed. The layout and silkscreen of the component side are shown in Figure 66, Figure 67, Figure 69, and Figure 70. The board is powered by a single supply in the 2.7 V to 5.5 V range. The power supply is decoupled by 100 pF and 0.01 µF capacitors. Additional decoupling, in the form of a series resistor or inductor in R6, can also be added. Table 8 details the various configuration options of the evaluation board. Table 8. Evaluation Board Configuration Options Component TP1, TP2 SW1 SW2/SW3 C1, R2 Function Ground and Supply Vector Pins. Device Enable. When in Position A, the PWDN pin is connected to +VS and the AD8361 is in powerdown mode. In Position B, the PWDN pin is grounded, putting the device in operating mode. Operating Mode. Selects either ground reference mode, internal reference mode or supply reference mode. See Table 4 for more details. Input Coupling. The 75 Ω resistor in Position R2 combines with the AD8361’s internal input impedance to give a broadband input impedance of around 50 Ω. For more precise matching at a particular frequency, R2 can be replaced by a different value (see Input Coupling and Matching and Figure 43 through Figure 46). Capacitor C1 ac couples the input signal and creates a high-pass input filter whose corner frequency is equal to approximately 8 MHz. C1 can be increased for operation at lower frequencies. If resistive attenuation is desired at the input, series resistor R1, which is nominally 0 Ω, can be replaced by an appropriate value. Power Supply Decoupling. The nominal supply decoupling of 0.01 µF and 100 pF. A series inductor or small resistor can be placed in R6 for additional decoupling. Filter Capacitor. The internal 50 pF averaging capacitor can be augmented by placing a capacitance in C5. Output Loading. Resistors and capacitors can be placed in C4 and R5 to load test V rms. Default Condition Not Applicable SW1 = B SW2 = A, SW3 = B (Ground Reference Mode) R2 = 75 Ω (Size 0402) C1 = 100 pF (Size 0402) C2, C3, R6 C5 C4, R5 C2 = 0.01 µF (Size 0402) C3 = 100 pF (Size 0402) R6 = 0 Ω (Size 0402) C5 = 1 nF (Size 0603) C4 = R5 = Open (Size 0603) Rev. C | Page 21 of 24 AD8361 VPOS TP2 R6 0Ω VS A B RFIN R2 75Ω VPOS A B SW1 SW2 C1 100pF 1 2 3 4 C3 100pF C3 100pF VS SW3 A B R4 0Ω R5 VPOS 1nF PWDN COMM 5 TP1 01088-C-065 C2 0.01µF C2 0.01µF J2 R4 0Ω 1 AD8361 VRMS COMM FLTR VPOS RFIN PWDN 6 TP2 VPOS J1 AD8361 VPOS IREF RFIN SREF 8 VRMS 7 C5 FLTR 6 C4 (OPEN) R5 (OPEN) 2 5 C4 (OPEN) Vrms 3 4 C1 100pF R2 75Ω 3 2 R7 50Ω 01088-C-068 (OPEN) C5 1nF TP1 J3 1 SW1 Figure 68. Evaluation Board Schematic, SOT-23 Figure 65. Evaluation Board Schematic, MSOP 01088-C-066 Figure 66. Layout of Component Side, MSOP Figure 69. Layout of the Component Side, SOT-23 01088-C-067 01088-C-069 Figure 67. Silkscreen of Component Side, MSOP Figure 70. Silkscreen of the Component Side, SOT-23 Rev. C | Page 22 of 24 01088-C-070 AD8361 Problems caused by impedance mismatch may arise using the evaluation board to examine the AD8361 performance. One way to reduce these problems is to put a coaxial 3 dB attenuator on the RFIN SMA connector. Mismatches at the source, cable, and cable interconnection, as well as those occurring on the evaluation board, can cause these problems. A simple (and common) example of such a problem is triple travel due to mismatch at both the source and the evaluation board. Here the signal from the source reaches the evaluation board and mismatch causes a reflection. When that reflection reaches the source mismatch, it causes a new reflection, which travels back to the evaluation board, adding to the original signal incident at the board. The resultant voltage varies with both cable length and frequency dependence on the relative phase of the initial and reflected signals. Placing the 3 dB pad at the input of the board improves the match at the board and thus reduces the sensitivity to mismatches at the source. When such precautions are taken, measurements are less sensitive to cable length and other fixture issues. In an actual application when the distance between AD8361 and source is short and well defined, this 3 dB attenuator is not needed. Analysis The conversion gain and output reference are derived using the coefficients of a linear regression performed on data collected in its central operating range (35 mV rms to 250 mV rms). This range was chosen to avoid areas of operation where offset distorts the linear response. Error is stated in two forms error from linear response to CW waveform and output delta from 2°C performance. The error from linear response to CW waveform is the difference in output from the ideal output defined by the conversion gain and output reference. This is a measure of both the linearity of the device response to both CW and modulated waveforms. The error in dB uses the conversion gain multiplied by the input as its reference. Error from linear response to CW waveform is not a measure of absolute accuracy, since it is calculated using the gain and output reference of each device. However, it does show the linearity and effect of modulation on the device response. Error from 25° C performance uses the performance of a given device and waveform type as the reference; it is predominantly a measure of output variation with temperature. C4 0.1µF C2 100pF CHARACTERIZATION SETUPS Equipment The primar y characterization setup is shown in Figure 72. The signal source used was a Rohde & Schwarz SMIQ03B, version 3.90HX. The modulated waveforms used for IS95 reverse link, IS95 nine active channels for ward (for ward link 18 setting), and W-CDMA 4-channel and 15-channel were generated using the default settings coding and filtering. Signal levels were calibrated into a 50 Ω impedance. VPOS IREF RFIN AD8361 1 2 3 VPOS IREF RFIN PWDN SREF 8 VRMS 7 C3 FLTR 6 COMM 5 SREF VRMS 4 PWDN Figure 71. Characterization Board AD8361 CHARACTERIZATION BOARD SMIQ038B RF SOURCE RF SIGNAL RFIN 3dB ATTENUATOR PRUP DC SOURCES IEEE BUS PC CONTROLLER DC MATRIX / DC SUPPLIES / DMM 01088-C-072 DC OUTPUT VRMS +VS SREF IREF Figure 72. Characterization Setup Rev. C | Page 23 of 24 01088-C-071 R1 75Ω C1 0.1µF AD8361 OUTLINE DIMENSIONS 3.00 BSC 2.90 BSC 8 5 6 5 4 3.00 BSC 4 4.90 BSC 1.60 BSC 1 2 3 2.80 BSC PIN 1 0.65 BSC 1.10 MAX 8° 0° 0.80 0.60 0.40 PIN 1 INDICATOR 0.95 BSC 1.30 1.15 0.90 1.90 BSC 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 SEATING PLANE 1.45 MAX 0.22 0.08 10° 4° 0° 0.60 0.45 0.30 0.15 MAX 0.50 0.30 COMPLIANT TO JEDEC STANDARDS MO-187AA SEATING PLANE Figure 73. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters COMPLIANT TO JEDEC STANDARDS MO-178AB Figure 74. 6-Lead Small Outline Transistor Package [SOT-23] (RT-6) Dimensions shown in millimeters ORDERING GUIDE Model AD8361ARM AD8361ARM-REEL AD8361ARM-REEL7 AD8361ARMZ1 AD8361ARMZ-REEL1 AD8361ARMZ-REEL71 AD8361ART-REEL AD8361ART-REEL7 AD8361ARTZ-RL71 AD8361-EVAL AD8361ART-EVAL Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead MSOP, Tube 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP, Tube 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 6-Lead SOT-23, 13" Tape and Reel 6-Lead SOT-23, 7" Tape and Reel 6-Lead SOT-23, 7" Tape and Reel Evaluation Board MSOP Evaluation Board SOT-23-6L Package Option RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RT-6 RT-6 RT-6 Branding J3A J3A J3A J3A J3A J3A J3A J3A J3A 1 Z = Pb-free part. © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01088–0–8/04(C) Rev. C | Page 24 of 24
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AD8361ARMZ-REEL7
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