AD8560

a FEATURES Single-Supply Operation: 4.5 V to 16 V Dual-Supply Capability from 2.25 V to Input Capability Beyond the Rails Rail-to-Rail Output Swing Continuous Output Current: 35 mA Peak Output Current: 250 mA Offset Voltage: 10 mV Max Slew Rate: 8 V/ s Stable with 1 F Loads Supply Current APPLICATIONS LCD Reference Drivers Portable Electronics Communications Equipment 8V IN A IN B IN C IN D IN E 1 2 3 4 5 16 V Rail-to-Rail Buffer Amplifier AD8560 BLOCK DIAGRAM V+ 10 OUT A 9 8 7 6 OUT B OUT C OUT D OUT E GND GENERAL DESCRIPTION 16-Lead LFCSP (CP Suffix) 15 NC 14 NC 13 GND PIN 1 INDICATOR The AD8560 is a low cost, five-channel, single-supply buffer amplifier with rail-to-rail input and output capability. The AD8560 is optimized for LCD monitor applications. These LCD buffers have high slew rates, a 35 mA continuous output drive, and high capacitive load drive capability. They have wide supply range and offset voltages below 10 mV. The AD8560 is specified over the –40°C to +85°C temperature range. They are available on tape and reel in a 16-lead LFCSP. IN A 1 IN B 2 IN C 3 IN D 4 16 V+ 12 OUT A 11 OUT B 10 OUT C 9 OUT D AD8560 TOP VIEW IN E 5 NC 6 NC 7 NC = NO CONNECT REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 OUT E 8 AD8560–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (4.5 V ≤ V ≤ 16 V, V S CM = VS/2, TA = 25 C, unless otherwise noted.) Min Typ 2 5 80 –0.5 Max 10 600 800 VS + 0.5 Unit mV µV/°C nA nA V kΩ pF V V V V V mV mV mV mV mV mA mA V/V V/V % V dB µA µA V/µs MHz Degrees dB nV/√Hz nV/√Hz pA/√Hz Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Input Voltage Range Input Impedance Input Capacitance OUTPUT CHARACTERISTICS Output Voltage High Symbol VOS ∆VOS/∆T IB ZIN CIN VOH Conditions –40°C ≤ TA ≤ +85°C –40°C ≤ TA ≤ +85°C 400 1 IL = 100 µA VS = 16 V, IL = 5 mA –40°C ≤ TA ≤ +85°C VS = 4.5 V, IL = 5 mA –40°C ≤ TA ≤ +85°C IL = 100 µA VS = 16 V, IL = 5 mA –40°C ≤ TA ≤ +85°C VS = 4.5 V, IL = 5 mA –40°C ≤ TA ≤ +85°C V S = 16 V RL = 2 kΩ –40°C ≤ TA ≤ +85°C RL = 2 kΩ, VO = 0.5 to (VS – 0.5 V) 0.995 0.995 VS – 0.005 15.95 4.38 5 42 95 35 250 0.9985 0.9980 0.01 1.005 1.005 15.85 15.75 4.2 4.1 Output Voltage Low VOL 150 250 300 400 Continuous Output Current Peak Output Current TRANSFER CHARACTERISTICS Gain Gain Linearity POWER SUPPLY Supply Voltage Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Bandwidth Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Density Current Noise Density Specifications subject to change without notice. IOUT IPK AVCL NL VS PSRR ISY 4.5 VS = 4 V to 17 V –40°C ≤ TA ≤ +85°C VO = VS/2, No Load –40°C ≤ TA ≤ +85°C RL = 10 kΩ, CL = 200 pF –3 dB, RL = 10 kΩ, CL = 10 pF RL = 10 kΩ, CL = 10 pF 70 90 780 16 1,000 1,200 SR BW Øo 4.5 8 8 65 75 27 25 0.8 en en in f = 1 kHz f = 10 kHz f = 10 kHz – 2– REV. 0 AD8560 ABSOLUTE MAXIMUM RATINGS * Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VS + 0.5 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range . . . . . . . . . . . –40°C to +85°C Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 kV ESD Tolerance (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Type 16-Lead LFCSP (CP) JA 1 JC JB 2 Unit °C/W 35 13 NOTES 1 θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered onto a circuit board for surface-mount packages. 2 JB is applied for calculating the junction temperature by reference to the board temperature. ORDERING GUIDE Model AD8560ACP Available in reels only. Temperature Range –40°C to +85°C Package Description 16-Lead LFCSP Package Option CP-16 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8560 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. 0 – 3– AD8560 –Typical Performance Characteristics 100 90 80 TA = 25 C 4.5V < VS < 16V 0 VCM = VS/2 50 VS = 16V 100 150 VS = 4.5V 200 250 300 10 0 12 9 0 3 6 6 3 INPUT OFFSET VOLTAGE – mV 9 12 350 40 +25 TEMPERATURE – C +85 70 60 50 40 30 20 INPUT BIAS CURRENT – nA QUANTITY – Amplifiers TPC 1. Input Offset Voltage Distribution TPC 4. Input Bias Current vs. Temperature 300 4.5V < VS < 16V INPUT OFFSET CURRENT – nA 5 4 3 2 1 VS = 4.5V 0 1 2 3 4 VS = 16V 250 QUANTITY – Amplifiers 200 150 100 50 0 0 5 10 20 30 40 50 60 TCVOS – V/ C 70 80 90 100 40 +25 TEMPERATURE – C +85 TPC 2. Input Offset Voltage Drift Distribution TPC 5. Input Offset Current vs. Temperature 0 VCM = VS/2 15.96 ILOAD = 5mA 15.95 VS = 16V 15.94 OUTPUT VOLTAGE – V 4.46 4.45 4.44 4.43 4.42 4.41 4.40 VS = 4.5V 4.39 4.38 4.37 4.36 40 +25 TEMPERATURE – C +85 INPUT OFFSET VOLTAGE – mV 0.25 15.93 15.92 15.91 15.90 15.89 15.88 15.87 0.50 VS = 16V 0.75 1.00 VS = 4.5V 1.25 1.50 15.86 40 +25 TEMPERATURE – C +85 TPC 3. Input Offset Voltage vs. Temperature TPC 6. Output Voltage Swing vs. Temperature – 4– REV. 0 AD8560 150 ILOAD = 5mA 135 SUPPLY CURRENT/AMPLIFIER – mA 0.85 VCM = VS/2 0.80 VS = 16V 0.75 120 OUTPUT VOLTAGE – mV 105 90 VS = 4.5V 75 60 45 VS = 16V 30 15 0 40 +25 TEMPERATURE – C +85 0.70 0.65 VS = 4.5V 0.60 0.55 40 +25 TEMPERATURE – C +85 TPC 7. Output Voltage Swing vs. Temperature TPC 10. Supply Current/Amplifier vs. Temperature 0.9999 4.5V < VS < 16V VOUT = 0.5V TO 15V RL = 2k SLEW RATE – V/ s 8 RL = 10k CL = 200pF 7 6 5 4 3 2 RL = 600 VS = 16V GAIN ERROR – V/V VS = 4.5V 0.9997 0.9995 40 +25 TEMPERATURE – C +85 1 40 +25 TEMPERATURE – C +85 TPC 8. Voltage Gain vs. Temperature TPC 11. Slew Rate vs. Temperature 1k TA = 25 C 1.1 1.0 TA = 25 C AV = 1 VO = VS /2 SUPPLY CURRENT/AMPLIFIER – mA 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 OUTPUT VOLTAGE – mV 100 VS = 4.5V 10 VS = 16V 1 0.1 0.001 0.01 0.1 1 LOAD CURRENT – mA 10 100 0.1 0 2 4 6 8 10 12 SUPPLY VOLTAGE – V 14 16 18 TPC 9. Output Voltage to Supply Rail vs. Load Current TPC 12. Supply Current/Amplifier vs. Supply Voltage REV. 0 – 5– AD8560 10 5 0 5 GAIN – dB 18 1k 10k 16 14 TA = 25 C VS = 16V AV = 1 RL = 10k DISTORTION < 1% OUTPUT SWING – Vp-p 10 15 20 25 30 35 TA = 25 C VS = 8V VIN = 50mV rms CL = 40pF AV = 1 12 10 8 6 4 2 0 560 150 40 100k 1M 10M FREQUENCY – Hz 100M 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz TPC 13. Frequency Response vs. Resistive Loading 25 20 15 10 TA = 25 C VS = 8V VIN = 50mV rms RL = 10k AV = 1 TPC 16. Closed-Loop Output Swing vs. Frequency 160 140 POWER SUPPLY REJECTION – dB TA = 25 C VS = 16V 120 100 80 +PSRR 60 40 PSRR 20 0 20 GAIN – dB 5 50pF 0 5 10 1040pF 15 20 25 100k 540pF 100pF 1M 10M FREQUENCY – Hz 100M 40 100 1k 10k 100k FREQUENCY – Hz 1M 10M TPC 14. Frequency Response vs. Capacitive Loading TPC 17. Power Supply Rejection Ratio vs. Frequency 500 450 400 350 160 140 POWER SUPPLY REJECTION – dB TA = 25 C VS = 4.5V 120 100 +PSRR 80 60 40 20 0 20 PSRR IMPEDANCE – 300 250 200 150 100 50 0 100 1k 10k 100k FREQUENCY – Hz VS = 4.5V VS = 16V 1M 10M 40 100 1k 10k 100k FREQUENCY – Hz 1M 10M TPC 15. Closed-Loop Output Impedance vs. Frequency TPC 18. Power Supply Rejection Ratio vs. Frequency – 6– REV. 0 AD8560 1,000 TA = 25 C 4.5V VS VOLTAGE NOISE DENSITY – nV/ Hz 100 16V 90 80 OVERSHOOT – % 100 70 60 50 40 30 20 10 TA = 25 C VS = 4.5V VCM = 2.25V VIN = 100mV p-p AV = 1 RL = 10k 10 OS +OS 1 10 1k 100 FREQUENCY – Hz 10k 0 10 100 LOAD CAPACITANCE – pF 1k TPC 19. Voltage Noise Density vs. Frequency TPC 22. Small Signal Overshoot vs. Load Capacitance 20 0 CHANNEL SEPARATION – dB 15 TA = 25 C 4.5V < VS < 16V 20 40 60 80 100 120 140 160 180 100 OUTPUT SWING FROM 0V TO V 10 TA = 25 C VS = 8V RL = 10k 5 OVERSHOOT SETTLING TO 0.1% 0 5 UNDERSHOOT SETTLING TO 0.1% 10 15 1k 10k 100k 1M FREQUENCY – Hz 10M 100M 0 0.5 1.0 SETTLING TIME – 1.5 s 2.0 TPC 20. Channel Separation vs. Frequency TPC 23. Settling Time vs. Step Size 100 90 80 70 TA = 25 C VS = 16V VCM = 8V VIN = 100mV p-p AV = 1 RL = 10k 0 0 0 TA = 25 C VS = 16V AV = 1 RL = 10k CL = 300pF OVERSHOOT – % VOLTAGE – 2V/DIV 1k 60 50 40 OS 30 20 10 0 10 100 LOAD CAPACITANCE – pF +OS 0 0 0 0 0 0 0 0 0 0 0 0 TIME – 2 s/DIV 0 0 0 TPC 21. Small Signal Overshoot vs. Load Capacitance TPC 24. Large Signal Transient Response REV. 0 – 7– AD8560 0 0 0 TA = 25 C VS = 4.5V AV = 1 RL = 10k CL = 300pF 0 0 0 VOLTAGE – 50mV/DIV TA = 25 C VS = 4.5V AV = 1 RL = 10k CL = 100pF VOLTAGE – 1V/DIV 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME – 2 s/DIV 0 0 0 0 0 0 0 0 TIME – 1 s/DIV 0 0 0 TPC 25. Large Signal Transient Response TPC 27. Small Signal Transient Response 0 0 0 VOLTAGE – 50mV/DIV 0 TA = 25 C VS = 16V AV = 1 RL = 10k CL = 100pF VOLTAGE – 3V/DIV 0 0 0 0 0 0 0 0 0 TA = 25 C VS = 16V AV = 1 RL = 10k 0 0 0 0 0 0 0 0 0 0 0 0 TIME – 1 s/DIV 0 0 0 0 0 0 0 0 TIME – 40 s/DIV 0 0 0 TPC 26. Small Signal Transient Response TPC 28. No Phase Reversal – 8– REV. 0 AD8560 APPLICATIONS Theory of Operation Short Circuit Output Conditions These buffers are designed to drive large capacitive loads in LCD applications. Each has a high output current drive and rail-torail input/output operation and can be powered from a single 16 V supply. They are also intended for other applications where low distortion and high output current drive are needed. Input Overvoltage Protection The buffer family does not have internal short circuit protection circuitry. As a precautionary measure, do not short the output directly to the positive power supply or to the ground. It is not recommended to operate the AD8560 with more than 35 mA of continuous output current. The output current can be limited by placing a series resistor at the output of the amplifier whose value can be derived using the following equation: As with any semiconductor device, whenever the input exceeds either supply voltage, attention needs to be paid to the input overvoltage characteristics. As an overvoltage occurs, the amplifier could be damaged depending on the voltage level and the magnitude of the fault current. When the input voltage exceeds either supply by more than 0.6 V, internal pin junctions will allow current to flow from the input to the supplies. This input current is not inherently damaging to the device as long as it is limited to 5 mA or less. If a condition exists using the buffers where the input exceeds the supply by more than 0.6 V, a series external resistor should be added. The size of the resistor can be calculated by using the maximum overvoltage divided by 5 mA. This resistance should be placed in series with the input exposed to an overvoltage. Output Phase Reversal RX ≥ VS 35 mA For a 5 V single-supply operation, RX should have a minimum value of 143 Ω. Recommended Land Pattern for the AD8560 The buffer family is immune to phase reversal. Although the device’s output will not change phase, large currents due to input overvoltage could damage the device. In applications where the possibility exists of an input voltage exceeding the supply voltage, overvoltage protection should be used as described in the previous section. Total Harmonic Distortion (THD+N) Figure 2 is a recommended land pattern for the AD8560 PCB design. The recommended thermal pad size for the PCB design matches the dimensions of the exposed pad on the bottom of the package. The solder mask design for improved thermal pad contact to the exposed pad and reliability uses a stencil pattern for approximately 85% solder coverage. A minimum clearance of 0.25 mm is maintained on the PCB between the outer edges of the thermal pad and the inner edges of the pattern for the land to avoid shorting. For better thermal performance, thermal vias should also be used. Since the AD8560 is relatively a low power part, just soldering the exposed package pad to the PCB thermal pad should provide sufficient electrical performance. SYMM CL 0.28 0.75 TYP 16 PL The buffer family features low total harmonic distortion. The total harmonic distortion plus noise for the buffer over the entire supply range is below 0.08%. When the device is powered from a 16 V supply, the THD + N stays below 0.03%. Figure 1 shows the AD8560’s THD + N versus the frequency performance. 2.1 1.95 0.65 10 0.9 0.4 SYMM CL 0.05 0.1 1 THD + N – % 0.875  0.20 VS = VS = 2.5V 8V 0.25 0.1 SOLDER MASK BOARD METALLIZATION Figure 2. 16-Lead 4 x 4 Land Pattern 0.01 20 100 1k FREQUENCY – Hz 10k 30k Figure 1. THD + N vs. Frequency REV. 0 – 9– AD8560 OUTLINE DIMENSIONS 16-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm 4 mm Body (CP-16) Dimensions shown in millimeters 4.0 BSC SQ 0.60 MAX 0.60 MAX 13 12 16 1 PIN 1 INDICATOR PIN 1 INDICATOR 0.65 BSC TOP VIEW 3.75 BSC SQ 0.75 0.60 0.50 9 8 BOTTOM VIEW 4 5 2.25 2.10 SQ 1.95 12 MAX 0.80 MAX 0.65 NOM 0.05 MAX 0.02 NOM 0.35 0.28 0.25 0.20 REF COPLANARITY 0.08 1.95 BSC 1.00 0.90 0.80 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC – 10– REV. 0 – 11– – 12– C03016–0–3/03(0)