10-Bit 40 MSPS
A/D Converter
AD9040A
FEATURES
Low Power: 940 mW
53 dB SNR @ 10 MHz AIN
On-Chip Track-and-Hold, Reference
CMOS Compatible
2 V p-p Analog Input
Fully Characterized Dynamic Performance
OBS
APPLICATIONS
Ultrasound Medical Imaging
Digital Oscilloscopes
Professional Video
Digital Communications
Advanced Television (MUSE Decoders)
Instrumentation
GENERAL DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
ENCODE
AMP
ARRAY
AIN
GND
VOUT
VREF
T/H
BAND GAP
REFERENCE
T/H
Digital inputs and outputs are CMOS compatible; the analog
input requires a signal of 2 V p-p amplitude. The two-step
architecture used in the AD9040A is optimized to provide the
best dynamic performance available while maintaining low
power requirements of only 940 mW typically; maximum dissipation is 1.1 W at 40 MSPS.
The signal-to-noise ratio (SNR), including harmonics, is 53 dB,
or 8.5 ENOB, when sampling an analog input of 10.3 MHz at
40 MSPS. Competitive devices perform at less than 7.5 ENOB
and require external references and larger input signals.
6-BIT
ADC
5-BIT
ADC
REF
AMP
OLE
The AD9040A is a complete 10-bit monolithic sampling analogto-digital converter (ADC) with on-board track-and-hold (T/H)
and reference. The unit is designed for low cost, high performance applications and requires only an encode signal to achieve
40 MSPS sample rates with 10-bit resolution.
T/H
BPREF
DECODE
LOGIC
AD9040A
ERROR
CORRECTION
DECODE
LOGIC
10
TE
PRODUCT HIGHLIGHTS
1. CMOS compatible logic for direct interface to ASICs.
2. On-board track-and-hold provides excellent high frequency
performance on analog inputs, critical for communications
and medical imaging applications.
3. High input impedance and 2 V p-p input range reduce need
for external amplifiers.
4. Easy to use; no cumbersome external voltage references
required, allowing denser packing of ADCs for multichannel
applications.
5. Available in 28-lead PDIP and SOIC packages.
6. Evaluation board includes AD9040AJR, reconstruction DAC,
and latches. Space is available near the analog input and digital
outputs of the converter for additional circuits. Order as part
number AD9040A/PCB (schematic shown in data sheet).
The AD9040A A/D converter is available in either a 28-lead
PDIP or a 28-lead SOIC package. The two models operate over
a commercial temperature range of 0°C to 70°C. Contact the
factory regarding availability of ceramic military temperature
range devices.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
AD9040A–SPECIFICATIONS
Parameter (Conditions)
Temp
(+VS = VD = +5 V; –VS = –5 V; internal reference: Encode = 40.5 MSPS, unless
otherwise noted.)
Test
Level
AD9040AJN/AD9040AJR
Min
Typ
Max
RESOLUTION
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
Gain Error
Gain Temperature Coefficient1
10
25°C
Full
25°C
Full
Full
25°C
Full
Full
OBS
ANALOG INPUT
Input Voltage Range
Input Offset Voltage
Input Bias Current
Input Resistance
Input Capacitance
Analog Bandwidth
BAND GAP REFERENCE
Output Voltage
Temperature Coefficient1
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Aperture Delay (tA)
Aperture Uncertainty (Jitter)
Output Propagation Delay (tPD)2
DYNAMIC PERFORMANCE3
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio4
fIN = 2.3 MHz
fIN = 10.3 MHz
Signal-to-Noise Ratio4
(Without Harmonics)
fIN = 2.3 MHz
fIN = 10.3 MHz
Signal-to-Noise Ratio4, 5
fIN = 2.3 MHz
fIN = 10.3 MHz
Signal-to-Noise Ratio4, 5
(Without Harmonics)
fIN = 2.3 MHz
fIN = 10.3 MHz
Second Harmonic Distortion
fIN = 2.3 MHz
fIN = 10.3 MHz
Third Harmonic Distortion
fIN = 2.3 MHz
fIN = 10.3 MHz
Two-Tone Intermodulation6
Distortion Rejections
Differential Phase
Differential Gain
I
VI
I
VI
VI
I
VI
V
Bits
1.0
1.0
Guaranteed
± 0.5
± 70
25°C
25°C
Full
25°C
Full
25°C
25°C
25°C
V
I
VI
I
VI
I
V
V
2
±2
Full
Full
VI
V
2.4
25°C
25°C
25°C
25°C
25°C
Full
I
IV
V
V
I
IV
40
25°C
25°C
V
V
25°C
25°C
I
I
25°C
25°C
I
I
25°C
25°C
7
LSB
LSB
LSB
LSB
± 1.5
±2
% FS
% FS
ppm/°C
350
5
48
± 40
7.5
6
2.0
2.5
2.25
2.5
± 25
± 30
15
25
OLE
200
2
1.9
7
10
Unit
V p-p
mV
mV
µA
µA
kΩ
pF
MHz
TE
2.6
10
12
14
V
ppm/°C
MSPS
MSPS
ns
ps, rms
ns
ns
25
40
ns
ns
48
47
54
53
dB
dB
49
48
55
54
dB
dB
I
I
56
55
dB
dB
25°C
25°C
I
I
57
56
dB
dB
25°C
25°C
I
I
56
56
67
65
dBc
dBc
25°C
25°C
25°C
I
I
V
57
57
73
70
62
dBc
dBc
dBc
25°C
25°C
III
III
–2–
0.15
0.25
0.5
1.0
Degrees
%
REV. D
AD9040A
Parameter (Conditions)
Temp
Test
Level
AD9040AJN/AD9040AJR
Min
Typ
Max
ENCODE INPUT
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
Encode Pulsewidth (High) (tEH)7
Encode Pulsewidth (Low) (tEL)7
Full
Full
Full
Full
25°C
25°C
25°C
VI
VI
VI
VI
V
IV
IV
4.0
Full
Full
VI
VI
DIGITAL OUTPUTS
Logic 1 Voltage
Logic 0 Voltage
Output Coding
OBS
POWER SUPPLY
VD Supply Current
+VS Supply Current
–VS Supply Current
Power Dissipation
Power Supply Rejection Ratio (PSRR)8
100
100
V
V
µA
µA
pF
ns
ns
0.05
V
V
20
110
105
1.2
± 15
mA
mA
mA
W
mV/V
1.0
±1
±1
14
10
10
Unit
4.95
Offset Binary
Full
Full
Full
Full
25°C
VI
VI
VI
VI
I
13
89
87
0.94
OLE
NOTES
1
Gain temperature coefficient is for a converter using internal reference; temperature coefficient is for band gap reference only.
2
Output propagation delay (t PD) is measured from the 50% point of the falling edge of the encode command to the min/max voltage levels of the digital outputs with
10 pF maximum loads.
3
Minimum values apply to AD9040AJR only.
4
RMS signal to rms noise with analog input signal 1 dB below full scale at specified frequency.
5
Encode = 32 MSPS.
6
Third order intermodulation measured with analog input frequencies of 2.3 MHz and 2.4 MHz at 7 dB below full scale.
7
For rated performance at 40 MSPS, duty cycle of encode command should be 50% ± 10%.
8
Measured as the ratio of the change in offset voltage for a 5% change in +V S or –VS.
TE
Specifications subject to change without notice.
EXPLANATION OF TEST LEVELS
Test Level
I
II
100% production tested.
100% production tested at 25°C and sample tested at specified temperatures. AC testing done on sample basis.
III Sample tested only.
IV Parameter is guaranteed by design and characterization
testing.
V Parameter is a typical value only.
VI All devices are 100% production tested at 25°C. 100%
production tested at temperature extremes for military temperature devices; guaranteed by design and characterization
testing for industrial devices.
REV. D
–3–
AD9040A
ABSOLUTE MAXIMUM RATINGS 1
Maximum Junction Temperature2 (JN/JR Suffixes) . . . . 150°C
Lead Soldering Temp (10 sec) . . . . . . . . . . . . . . . . . . . . 300°C
± VS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V
........................................ 7V
VD
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS to +VS
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +VS
VREF Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +VS
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Operating Temperature
AD9040AJN/AD9040AJR . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage Temperature . . . . . . . . . . . . . . . . . –65°C to +150°C
NOTES
1
Absolute maximum ratings are limiting values to be applied individually and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating
conditions for an extended period of time may affect device reliability.
2
Typical thermal impedances (parts soldered to board):
N Package (PDIP): JA = 42°C/W; JC = 10°C/W.
R Package (SOIC): JA = 47°C/W; JC = 10°C/W.
ORDERING GUIDE
OBS
Model
Temperature Range
Package Description
Package Option
AD9040AJN
AD9040AJR
AD9040AJR-REEL
0°C to 70°C
0°C to 70°C
0°C to 70°C
28-Lead PDIP
28-Lead SOIC Package
28-Lead SOIC Package
N-28
R-28
R-28
OLE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD9040A features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
N
N+1
AIN
SYMBOL
tA
ENCODE
tEH
NO. 2
NO. 3
tEL
tPD
DIGITAL
OUTPUTS
N–3
N–2
tA
tEH
tEL
tPD
DESCRIPTION
MIN
APERTURE DELAY
TE
TYP
MAX
1.9ns
PULSEWIDTH HIGH
10ns
100ns
PULSEWIDTH LOW
10ns
100ns
OUTPUT PROP DELAY
7.5ns
10ns
12ns
N–1
Figure 1. Timing Diagram
–4–
REV. D
GND
–VS
GND
AIN
D8
PDIP and SOIC
OR
PIN CONFIGURATION
D9 (MSB)
AD9040A
D7
GND 4
25
D3
VOUT 5
24
D4
23
VD
AD9040A
D6
D5
BPREF
DGND
VREF
+VD
D4
D3
+VS 10
19
D6
GND 11
18
D7
–VS 12
17
D8
AIN 13
16
D9 (MSB)
GND 14
15
OR
OBS
NC = NO CONNECT
NC
–VS
GND
TOP VIEW 22
NC 8 (Not to Scale) 21 –VS
ENCODE 9
20 D5
BPREF 7
ENCODE
VOUT
GND
D1
D2
+VS
D2
GND
D1
26
–VS
27
+VS 3
D0 (LSB)
GND 2
VREF 6
+VS
28 D0 (LSB)
–VS 1
NC = NO CONNECT
OLE
DIE LAYOUT AND MECHANICAL INFORMATION
Die Dimensions . . . . . . . . . 204 mils × 185 mils × 21 (± 1) mils
Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 4 mils × 4 mils
Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Aluminum
Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5,070
Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxynitride
Die Attach (JN/JR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . Epoxy
Bond Wire (JN/JR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gold
TE
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Function
1, 12, 21
–VS
5 V Power Supply.
2, 4, 11, 14, 22
GND
Ground.
3, 10
+VS
Analog 5 V Power Supply.
5
VOUT
Internal Band Gap Voltage Reference (Nominally 2.5 V).
6
VREF
Noninverting Input to Reference Amplifier. Voltage reference for ADC is connected here.
7
BPREF
External Connection for (0.1 µF) Reference Bypass Capacitor.
8
NC
No Connection Internally.
9
ENCODE
Encode Clock Input to ADC. Internal track-and-hold placed in hold mode (ADC is encoding)
on rising edge.
13
AIN
Noninverting Input to Track-and-Hold Amplifier.
15
OR
Out-of-Range Condition Output. Active high when analog input exceeds input range of ADC by
1 LSB (< FS – 1 LSB or > +FS + 1 LSB).
16
D9 (MSB)
Most Significant Bit of ADC Output; TTL/CMOS Compatible.
17–20
D8–D5
Digital Output Bits of ADC; TTL/CMOS Compatible.
23
VD
Digital +5 V Power Supply.
24–27
D4–D1
Digital Output Bits of ADC; TTL/CMOS Compatible.
28
D0 (LSB)
Least Significant Bit of ADC Output; TTL/CMOS Compatible.
REV. D
–5–
AD9040A
DEFINITIONS OF SPECIFICATIONS
Analog Bandwidth
Maximum Conversion Rate
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by FFT analysis) is
reduced by 3 dB.
Output Propagation Delay
Aperture Delay
Overvoltage Recovery Time
The encode rate at which parametric testing is performed.
The delay between the 50% point of the falling edge of the encode
command and the 1 V/4 V points of output data.
The delay between the rising edge of the encode command and
the instant at which the analog input is sampled.
Aperture Uncertainty (Jitter)
The amount of time required for the converter to recover to
10-bit accuracy after an analog input signal 150% of full scale is
reduced to the full-scale range of the converter.
The sample-to-sample variation in aperture delay.
Power Supply Rejection Ratio (PSRR)
Differential Gain
The ratio of a change in input offset voltage to a change in power
supply voltage.
The percentage of amplitude change of a small high frequency
sine wave (3.58 MHz) superimposed on a low frequency signal
(15.734 kHz).
OBS
Signal-to-Noise Ratio (SNR)
The ratio of the rms signal amplitude to the rms value of noise,
which is defined as the sum of all other spectral components,
including harmonics but excluding dc, with an analog input
signal 1 dB below full scale.
Differential Nonlinearity
The deviation of any code from an ideal 1 LSB step.
Differential Phase
OLE
The phase change of a small high frequency sine wave (3.58 MHz)
superimposed on a low frequency signal (15.734 kHz).
Signal-to-Noise Ratio (Without Harmonics)
The rms value of the fundamental divided by the rms value of
the harmonic.
The ratio of the rms signal amplitude to the rms value of noise,
which is defined as the sum of all other spectral components,
excluding the first eight harmonics and dc, with an analog input
signal 1 dB below full scale.
Integral Nonlinearity
Transient Response
Harmonic Distortion
TE
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
The time required for the converter to achieve 10-bit accuracy
when a step function is applied to the analog input.
Minimum Conversion Rate
The ratio of the power of either of the two input signals to the
power of the strongest third order IMD signal.
Two-Tone Intermodulation Distortion (IMD) Rejection
The encode rate at which the SNR of the lowest analog signal
frequency tested drops by no more than 3 dB below the guaranteed limit.
VCC
VCC
1k⍀
1k⍀
1k⍀
VCC
1k⍀
VCC
VREF
RL
AIN
2.5k⍀
2k⍀
6.8k⍀
1mA
VOUT
D0-D9
RL
BPREF
GND
1mA
GND
GND
VSS
ANALOG INPUT
REFERENCE CIRCUIT
VSS
BAND GAP OUTPUT
CMOS OUTPUT
Figure 2. Equivalent Circuits
–6–
REV. D
Typical Performance Characteristics–AD9040A
–73
ENCODE = 40.5MSPS
66
0.8
0.6
HARMONIC
DISTORTION
60
–63
54
SNR
–58
48
–53
–48
1
2
4 6
10
20
CLOCK RATE (MSPS)
40 60
OBS
1
2
4 6 10
20
FREQUENCY (MHz)
40 60
48
42
100
4
1024
1024
896
992
DIGITAL OUTPUT CODE
DIGITAL OUTPUT CODE
0.5
768
640
512
384
256
0
10
20
30
CLOCK RATE (MSPS)
0
40
TPC 4. Differential Nonlinearity
vs. Clock Rate
0
10 15
20 25 30
TIME (ns)
35 40 45 50
ENCODE = 32.2MSPS
dBc
dBc
928
TE
96
64
0
0
ENCODE = 32.2MSPS
ANALOG IN = 2.3MHz
SNR = 56.79dB
SNR (w/o har.) = 57.58dB
SECOND HARMONIC = –68.5dB
THIRD HARMONIC = 80.7dB
ENCODE = 40.5MSPS
960
0
5
10 15
20 25 30
TIME (ns)
35 40 45 50
TPC 6. Transient Response
(Expanded View)
0
55
50
5
TPC 5. Transient Response
60
36
32
128
0
12
20
28
CLOCK RATE (MSPS)
TPC 3. SNR vs. Clock Rate
OLE
1.0
AIN = 10.3MHz
54
TPC 2. Harmonic Distortion
and SNR vs. Analog Input
TPC 1. Power Dissipation
vs. Clock Rate
LEAST SIGNIFICANT BITS (LSB)
60
42
0.4
SIGNAL-TO-NOISE RATIO (dB)
66
SIGNAL-TO-NOISE RATIO (dB)
DISSIPATION (W)
1.0
–68
SIGNAL-TO-NOISE RATIO (dB)
HARMONIC DISTORTION (dBc)
1.2
–65
ENCODE = 32.2MSPS
ANALOG IN = 10.3MHz
SNR = 55.37dB
SNR (w/o har.) = 56.77dB
SECOND HARMONIC = –63.3dB
THIRD HARMONIC = –75.4dB
–65
45
AIN = 10.3MHz
40
–55 –35 –15 5 25 45 65
TEMPERATURE (ⴗC)
85 105 125
TPC 7. SNR vs. Temperature
REV. D
0
8.0
FREQUENCY (MHz)
TPC 8. FFT Response
–7–
16.1
0
8.0
FREQUENCY (MHz)
TPC 9. FFT Response
16.1
AD9040A
0
0
0
0
2.5
FREQUENCY (MHz)
–65
0
5.0
OBS
TPC 10. FFT Response
THEORY OF OPERATION
dBc
dBc
dBc
–65
ENCODE = 40.5MSPS
ANALOG IN = 10.3MHz
SNR = 53.38dB
SNR (w/o har.) = 54.31dB
SECOND HARMONIC =
–64.7dB
THIRD HARMONIC =
–73.7dB
ENCODE = 40.5MSPS
ANALOG IN = 2.3MHz
SNR = 55.20dB
SNR (w/o har.) = 55.90dB
SECOND HARMONIC = –75.1dB
THIRD HARMONIC = –73.2dB
ENCODE = 40.5MSPS
f1 IN = 2.25MHz @ –7dBFS
f2 IN = 2.35MHz @ –7dBFS
2f1 – f2 = –69.4dBFS
2f2 – f1 = –69.2dBFS
10.0
FREQUENCY (MHz)
20.2
–65
0
10.0
FREQUENCY (MHz)
TPC 11. FFT Response
20.2
TPC 12. FFT Response
OLE
USING THE AD9040A
Timing
The AD9040A employs subranging architecture and digital error
correction. This combination of design techniques ensures true
10-bit accuracy at the digital outputs of the converter.
The duty cycle of the encode clock for the AD9040A is critical
for obtaining the rated performance of the ADC. Internal
pulsewidths within the track-and-hold are established by the
encode command pulsewidth; to ensure rated performance, the
duty cycle should be held at 50%. Duty cycle variations of less
than ± 10% will cause no degradation in performance.
At the input, the analog signal is applied to a track-and-hold
(T/H) that holds the analog value that is present when the
unit is strobed with an encode command. The conversion
process begins on the rising edge of this pulse, which should
have a 50% (± 10%) duty cycle. The minimum encode rate of
the AD9040A is 10 MSPS because of the use of three internal track-and-hold devices.
TE
Operation at encode rates less than 10 MSPS is not recommended. The internal track-and-hold saturates, causing erroneous
conversions. This track-and-hold saturation precludes clocking
the AD9040A in burst mode. The 50% duty cycle must be
maintained even for sample rates down to 10 MSPS.
The held analog value of the first track-and-hold is applied to a
5-bit flash converter and a pair of internal track-and-hold devices
(shown in the Functional Block Diagram as a single unit). The
track-and-hold devices pipeline the analog signal to the amplifier array through a residue ladder and switching circuit while the
5-bit flash converter resolves the most significant bits (MSB) of
the held analog voltage.
The AD9040A provides latched data outputs, with 2 1/2 pipeline delays. Data outputs are available one propagation delay
(tPD) after the falling edge of the encode command (see Figure 1).
The length of the output data lines and the loads placed on them
should be minimized to reduce transients within the AD9040A;
these transients can detract from the converter’s dynamic performance.
When the 5-bit flash converter has completed its cycle, its output activates 1 of 32 ladder switches; these in turn cause the
correct residue signal to be applied to the error amplifier array.
Voltage Reference
A stable voltage reference is required to establish the 2 V p-p
range of the AD9040A. There are two options for creating this
reference. The easiest and least expensive way to implement it is
to use the (2.5 V) band gap voltage reference which is internal
to the ADC. Figure 3 illustrates the connections for using the
internal reference. The internal reference has 500 µA of extra
drive current that can be used for other circuits.
The output of the error amplifier is applied to a 6-bit flash converter whose output supplies the five least significant bits (LSB)
of the digital output along with one bit of error correction for
the 5-bit main range converter.
Decode logic aligns the data from the two converters and presents the result as a 10-bit parallel digital word. The output
stage of the AD9040A is CMOS. Output data are strobed on
the trailing edge of the encode command.
AD9040A
The full-scale range of the AD9040A is determined by the reference voltage applied to the VREF (Pin 6) input. This voltage sets
the internal flash and residue ladder voltage drops; these establish the value of the LSB. Because of headroom restraints, the
full-scale range cannot be increased by applying a higher than
specified reference voltage. Conversely, a lower reference voltage will reduce the full-scale range of the converter but will also
decrease its performance. An internal band gap reference voltage of 2.5 V is provided to assure optimum performance over
the operating temperature range.
VOUT
VREF
2.5V
BAND GAP
REFERENCE
REF
AMP
REFERENCE
0.1F
BPREF
–VS
Figure 3. Using Internal Reference
–8–
REV. D
AD9040A
Some applications may require greater accuracy, improved
temperature performance, or adjustment of the gain (input
range) of the AD9040A, which cannot be obtained by using the
internal reference. For these applications, an external 2.5 V
reference can be used, as shown in Figure 4. The VREF input
requires 5 µA of drive current.
The input range can be varied by adjusting the reference voltage
applied to the AD9040A. By decreasing the reference voltage,
the gain can be reduced approximately 10% with no degradation in performance. Increasing the reference voltage increases
the gain, but for proper operation, the reference voltage should
not exceed 2.6 V.
Time-Gain Control ADC
Ultrasound and sonar systems require an increase in gain versus
time. This allows the system to correct for attenuation of return
pulses. Figure 6 shows the AD600/AD602 amplifier and the
AD9040A ADC configured as a time-gain control analog-todigital converter. The control voltage ramps from –625 mV to
+625 mV, permitting 40 dB of gain-control range. The voltage
used for gain control can be either a linear ramp or the output
of a voltage-output DAC, such as the AD7242.
AD9040A
BAND GAP
REFERENCE
VOUT
REF
AMP
VREF
REFERENCE
OBS
REFERENCE
0.1F
0.1F BP
REF
–VS
GAIN CONTROL
VOLTAGE
+625mV
OLE
–625mV
Figure 4. Using External Reference
In applications using multiple AD9040As, slaving the reference
inputs to a single reference output will improve gain tracking
among the ADCs, as shown in Figure 5.
AD9040A
VOUT
0.1F
VREF BP
REF
0.1F
A1H1
TE
Figure 6. Ultrasound/Sonar Time-Gain Control
ADC using X-AMP™
Transient Response
–VS
Figure 7 illustrates the method for evaluating ADC transient
performance. Two synthesizers are locked in synchronization
but tuned to frequencies that are slightly offset from a 2 to 1
submultiple.
AD9040A
One synthesizer clocks a flat pulse network at a frequency of
19.9609375 MHz to provide the analog input signal; the other
synthesizer output is shaped to provide a CMOS 40 MHz sampling clock. At the output of the AD9040A, output data reflects
an interleaved alias of the input pulse. The repetitive sampling
allows the measurement of ADC transient response as shown in
the TPCs in this data sheet.
VREF BPREF
0.1F
0.1F
–VS
AD9040A
MARCONI 2030
SYNTHESIZER
VREF BPREF
0.1F
FLAT PULSE
NETWORK
ANALOG
IN
AD9040A
OUTPUT
REF
0.1F
19.9609375MHz
–VS
Figure 5. Slaving Multiple AD9040As to a Single
Internal Reference
MARCONI 2030
SYNTHESIZER
In the Specifications table, the gain temperature coefficient
parameter under dc accuracy applies to the ADC when the internal reference is being used. If an external reference is used, its
temperature coefficient must be taken into account to determine overall temperature performance.
REV. D
AD9040A
AD600/AD602
REF
ENCODE
SINE
TO
CMOS
40MHz
Figure 7. Transient Response Test
–9–
AD9040A
Layout Information
Preserving the accuracy and dynamic performance of the
AD9040A requires that designers pay special attention to the
layout of the printed circuit board.
Analog paths should be kept as short as possible and be properly
terminated to avoid reflections. The analog input and reference
voltage connections should be kept away from digital signal
paths; this reduces the amount of digital switching noise that is
capacitively coupled into the analog section. Digital signal paths
should also be kept short and run lengths should be matched to
avoid propagation delay mismatch. The AD9040A digital outputs should be buffered or latched close to the device (