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ADM2491EBRWZ

ADM2491EBRWZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC-WB-16_10.3X7.5MM

  • 描述:

    数字隔离器 高速、ESD保护、半双工/全双工iCoupler隔离RS-485收发器 SOP16_300MIL 5000Vrms

  • 数据手册
  • 价格&库存
ADM2491EBRWZ 数据手册
High Speed, ESD-Protected, Half-/Full-Duplex iCoupler Isolated RS-485 Transceiver ADM2491E Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VDD1 VDD2 ADM2491E DE GALVANIC ISOLATION TxD Y Z A RxD B RE GND1 GND2 06985-001 Isolated, RS-485/RS-422 transceiver, configurable as half- or full-duplex ±8 kV ESD protection on RS-485 input/output pins 16 Mbps data rate Complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E) Suitable for 5 V or 3.3 V operation (VDD1) High common-mode transient immunity: >25 kV/μs Receiver has open-circuit, fail-safe design 32 nodes on the bus Thermal shutdown protection Safety and regulatory approvals UL recognition: 5000 V rms isolation voltage for 1 minute, per UL 1577 VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Reinforced insulation, VIORM = 849 V peak Operating temperature range: −40°C to +85°C Wide body, 16-lead SOIC package Figure 1. APPLICATIONS Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems GENERAL DESCRIPTION The ADM2491E is an isolated data transceiver with ±8 kV ESD protection and is suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For halfduplex operation, the transmitter outputs and the receiver inputs share the same transmission line. Transmitter output Pin Y is linked externally to receiver input Pin A, and transmitter output Pin Z is linked to receiver input Pin B. The ADM2491E is designed for balanced transmission lines and complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler® technology to combine a 3-channel isolator, a threestate differential line driver, and a differential input receiver into a single package. Rev. C The differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection to ±8 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 5 V supply. The device has current-limiting and thermal shutdown features to protect against output short circuits and situations in which bus contention could cause excessive power dissipation. The ADM2491E is available in a wide body, 16-lead SOIC package and operates over the −40°C to +85°C temperature range. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2007–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADM2491E Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Switching Characteristics .................................................................9 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 10 Functional Block Diagram .............................................................. 1 Circuit Description......................................................................... 12 General Description ......................................................................... 1 Electrical Isolation...................................................................... 12 Revision History ............................................................................... 2 Truth Tables................................................................................. 12 Specifications..................................................................................... 3 Thermal Shutdown .................................................................... 13 Timing Specifications .................................................................. 4 Fail-Safe Receiver Inputs ........................................................... 13 Package Characteristics ............................................................... 4 Magnetic Field Immunity.......................................................... 13 Regulatory Information ............................................................... 4 Applications Information .............................................................. 14 Insulation and Safety-Related Specifications ............................ 5 Isolated Power Supply Circuit .................................................. 14 VDE 0884 Insulation Characteristics ........................................ 5 PCB Layout ................................................................................. 14 Absolute Maximum Ratings............................................................ 6 Typical Applications ................................................................... 15 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 16 Pin Configuration and Functional Descriptions .......................... 7 Ordering Guide .......................................................................... 16 Test Circuits ....................................................................................... 8 REVISION HISTORY 5/14—Rev. B to Rev. C Changed VIORM from 848 V peak to 849 V peak (Throughout) . 1 Changes to VDE 0884 Insulation Characteristics Conditions ... 5 Changes to Ordering Guide .......................................................... 16 12/10—Rev. A to Rev. B Changes to Figure 31 ...................................................................... 15 12/08—Rev. 0 to Rev. A Updated Regulatory Approval Status Throughout ...................... 1 Changes to Table 7 ............................................................................ 6 10/07—Revision 0: Initial Version Rev. C | Page 2 of 16 Data Sheet ADM2491E SPECIFICATIONS All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5.0 V, unless otherwise noted. Table 1. Parameter SUPPLY CURRENT Power Supply Current, Logic Side Symbol Min Typ Max Unit Test Conditions TxD/RxD Data Rate = 2 Mbps TxD/RxD Data Rate = 16 Mbps IDD1 IDD1 3.0 6 mA mA Unloaded output Half-duplex configuration, RTERMINATION = 120 Ω, see Figure 5 Power Supply Current, Bus Side TxD/RxD Data Rate = 2 Mbps TxD/RxD Data Rate = 16 Mbps IDD2 IDD2 4.0 50 mA mA Unloaded output VDD2 = 5.5 V, half-duplex configuration, RTERMINATION = 120 Ω, see Figure 5 ∆|VOD| 5.0 5.0 5.0 0.2 V V V V RL = 100 Ω (RS-422), see Figure 3 RL = 54 Ω (RS-485), see Figure 3 −7 V ≤ VTEST1 ≤ 12 V, see Figure 4 RL = 54 Ω or 100 Ω, see Figure 3 VOC ∆|VOC| 3.0 0.2 V V RL = 54 Ω or 100 Ω, see Figure 3 RL = 54 Ω or 100 Ω, see Figure 3 100 DE = 0 V, VDD2 = 0 V or 5 V, VIN = 12 V DE = 0 V, VDD2 = 0 V or 5 V, VIN = −7 V 250 μA μA mA 0.7 × VDD1 +10 V V μA DRIVER Differential Outputs Differential Output Voltage, Loaded ∆|VOD| for Complementary Output States Common-Mode Output Voltage ∆|VOC| for Complementary Output States Output Leakage Current (Y, Z) |VOD| 2.0 1.5 1.5 IO −100 Short-Circuit Output Current Logic Inputs DE, RE, TxD Input Threshold Low Input Threshold High Input Current RECEIVER Differential Inputs Differential Input Threshold Voltage Input Voltage Hysteresis Input Current (A, B) Line Input Resistance Logic Outputs Output Voltage Low Output Voltage High Short-Circuit Current Three-State Output Leakage Current COMMON-MODE TRANSIENT IMMUNITY1 IOS VIL VIH ITxD 0.25 × VDD1 VTH VHYS II −0.2 −10 +0.01 +0.2 30 +1.0 RIN −0.8 12 VOLRxD VOHRxD VDD1 − 0.3 0.2 VDD1 − 0.2 0.4 100 ±1 IOZR 25 1 V mV mA mA kΩ V V mA μA kV/μs VOC = 0 V VOC = 12 V VOC = −7 V IORxD = 1.5 mA, VA − VB = −0.2 V IORxD = −1.5 mA, VA − VB = 0.2 V VDD1 = 5.5 V, 0 V < VOUT < VDD1 VCM = 1 kV, transient magnitude = 800 V CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. C | Page 3 of 16 ADM2491E Data Sheet TIMING SPECIFICATIONS TA = −40°C to +85°C. Table 2. Parameter DRIVER Maximum Data Rate Propagation Delay Typ Max Unit 45 60 Mbps ns tPWD 7 ns tR, tF 20 ns Enable Time 55 ns Disable Time 55 ns 60 10 13 ns ns ns 13 ns Pulse Width Distortion, tPWD = |tPYLH − tPYHL|, tPWD = |tPZLH − tPZHL| Single-Ended Output Rise/Fall Times RECEIVER Propagation Delay Pulse Width Distortion, tPWD = |tPLH − tPHL| Enable Time Symbol Min 16 tPLH, tPHL tPLH, tPHL tPWD Disable Time Test Conditions RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 6 and Figure 10 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 10 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 10 RL = 110 Ω, CL = 50 pF, see Figure 8 and Figure 11 RL = 110 Ω, CL = 50 pF, see Figure 8 and Figure 11 CL = 15 pF, see Figure 7 and Figure 12 CL = 15 pF, see Figure 7 and Figure 12 RL = 1 kΩ, CL = 15 pF, see Figure 9 and Figure 13 RL = 1 kΩ, CL = 15 pF, see Figure 9 and Figure 13 PACKAGE CHARACTERISTICS Table 3. Parameter Resistance (Input to Output)1 Capacitance (Input to Output)1 Input Capacitance2 Input IC Junction-to-Case Thermal Resistance Symbol RI-O CI-O CI θJCI Output IC Junction-to-Case Thermal Resistance θJCO 1 2 Min Typ 1012 3 4 33 28 Max Unit Ω pF pF °C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside °C/W Device considered a 2-terminal device: Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together, and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15, and Pin 16 are shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION Table 4. UL1 Recognized under the 1577 component recognition program1 5000 V rms isolation voltage 1 2 VDE2 Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122 Reinforced insulation, 849 V peak In accordance with UL 1577, each ADM2491E is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 10 μA). In accordance with DIN V VDE V 0884-10, each ADM2491E is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial discharge detection limit = 5 pC). Rev. C | Page 4 of 16 Data Sheet ADM2491E INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 5. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 5000 7.7 Unit V rms mm min Minimum External Tracking (Creepage) L(I02) 8.1 mm min Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 >175 IIIa mm min V Conditions 1 minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance along body Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89) VDE 0884 INSULATION CHARACTERISTICS This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on a package denotes VDE 0884 approval for 849 V peak working voltage. Table 6. Description Installation Classification per DIN VDE 0110 for Rated Mains Voltage ≤300 V rms ≤450 V rms ≤600 V rms Climatic Classification Pollution Degree (DIN VDE 0110, see Table 1) Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method b1 VIORM × 1.875 = VPR, 100% Production Tested, tm = 1 sec, Partial Discharge < 5 pC Input-to-Output Test Voltage, Method a After Environmental Tests, Subgroup 1 VIORM × 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC After Input and/or Safety Test, Subgroup 2/Subgroup 3 VIORM × 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec) Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure, see Figure 20) Case Temperature Input Current Output Current Insulation Resistance at TS, VIO = 500 V Rev. C | Page 5 of 16 Symbol Characteristic Unit VIORM VPR I to IV I to II I to II 40/105/21 2 849 1590 V peak V peak 1357 V peak 1018 V peak VTR 6000 V peak TS IS, INPUT IS, OUTPUT RS 150 265 335 >109 °C mA mA Ω VPR ADM2491E Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted. Each voltage is relative to its respective ground. Table 7. Parameter Storage Temperature Ambient Operating Temperature VDD1 VDD2 Logic Input Voltages Bus Terminal Voltages Logic Output Voltages Average Output Current, per Pin ESD (Human Body Model) on A, B, Y, and Z Pins θJA Thermal Impedance Rating −55°C to +150°C −40°C to +85°C −0.5 V to +7 V −0.5 V to +6 V −0.5 V to VDD1 + 0.5 V −9 V to +14 V −0.5 V to VDD1 + 0.5 V ±35 mA ±8 kV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. ESD CAUTION 60°C/W Rev. C | Page 6 of 16 Data Sheet ADM2491E PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS VDD1 1 16 VDD2 GND1 2 15 GND2 14 A RxD 3 TOP VIEW 13 B DE 5 (Not to Scale) 12 Z TxD 6 11 Y NC 7 10 NC GND1 8 9 GND2 NC = NO CONNECT 06985-002 RE 4 ADM2491E Figure 2. ADM2491E Pin Configuration Table 8. Pin Function Descriptions Pin No. 1 Mnemonic VDD1 2, 8 3 4 GND1 RxD RE 5 DE 6 7, 10 9, 15 11 12 13 14 16 TxD NC GND2 Y Z B A VDD2 Description Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between 0.01 μF and 0.1 μF. Ground (Logic Side). Receiver Output. Receiver Enable Input. Active low logic input. When this pin is low, the receiver is enabled; when high, the receiver is disabled. Driver Enable Input. Active high logic input. When this pin is high, the driver (transmitter) is enabled; when low, the driver is disabled. Transmit Data. No Connect. This pin must be left floating. Ground (Bus Side). Driver Noninverting Output. Driver Inverting Output. Receiver Inverting Input. Receiver Noninverting Input. Power Supply (Bus Side). Decoupling capacitor to GND2 is required; capacitor value should be between 0.01 μF and 0.1 μF. Rev. C | Page 7 of 16 ADM2491E Data Sheet TEST CIRCUITS RL 2 CL1 Y VOC Z Figure 3. Driver Voltage Measurement 06985-006 RLDIFF RL 2 06985-003 VOD CL2 Figure 6. Driver Propagation Delay 375Ω A VTEST 60Ω VOUT B Figure 7. Receiver Propagation Delay Figure 4. Driver Voltage Measurement VDD1 CL 06985-004 375Ω 06985-007 VOD VDD2 ADM2491E VCC VOUT Y RL S1 0V OR 3V DE S2 Z RTERMINATION Figure 8. Driver Enable/Disable A RxD +1.5V B –1.5V GND2 06985-005 RE GND1 Z Y VOUT S1 RL A B VCC RE CL RE IN Figure 9. Receiver Enable/Disable Figure 5. Supply Current Measurement Test Circuit Rev. C | Page 8 of 16 S2 06985-009 TxD DE 06985-008 GALVANIC ISOLATION CL Data Sheet ADM2491E SWITCHING CHARACTERISTICS VDD1 TxD 1.5V 1.5V 0V tPLH A, B tPHL 0V 0V tPLH tPHL Z 1/2VOUT VOUT Y VOH tPWD = |tPLH – tPHL| 1.5V 90% POINT 1.5V Y, Z 10% POINT tR tF VOL 06985-010 10% POINT Figure 10. Driver Propagation Delay, Rise/Fall Timing Figure 12. Receiver Propagation Delay VDD1 DE 0.5VDD1 VDD1 RE 0.5VDD1 0.5VDD1 0.5VDD1 0V tZL 2.3V Y, Z 0V tZL tLZ tLZ 1.5V RxD VOL + 0.5V tZH tZH tHZ OUTPUT HIGH VOH Y, Z 2.3V VOH – 0.5V 0V VOL + 0.5V OUTPUT LOW VOL RxD 06985-011 VOL 1.5V VOL tHZ VOH VOH – 0.5V 0V 0V Figure 11. Driver Enable/Disable Delay Figure 13. Receiver Enable/Disable Delay Rev. C | Page 9 of 16 06985-013 90% POINT 06985-012 RxD VOH ADM2491E Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 60 2.58 NO LOAD 50 2.54 tPLH tPHL 40 2.52 DELAY (ns) 100Ω LOAD 2.50 2.48 30 54Ω LOAD 20 2.46 10 2.44 –20 0 20 40 60 80 TEMPERATURE (°C) 0 –40 06985-014 2.42 –40 –20 0 20 40 60 06985-035 IDD1 SUPPLY CURRENT (mA) 2.56 80 TEMPERATURE (°C) Figure 17. Receiver Propagation Delay vs. Temperature Figure 14. IDD1 Supply Current vs. Temperature 60 ∆: 2.12V @: 7.72V TxD 54Ω LOAD 40 1 100Ω LOAD Z 30 Y 20 3 RxD 0 –40 06985-032 NO LOAD 10 4 –20 0 20 40 60 80 TEMPERATURE (°C) 06985-015 IDD2 SUPPLY CURRENT (mA) 50 CH1 2V Ω CH3 2V Ω Figure 15. IDD2 Supply Current vs. Temperature CH2 2V Ω CH4 2V Ω M20ns T 48ns A CH1 2.32V Figure 18. Driver/Receiver Propagation Delay, Low to High (RLDIFF = 54 Ω, CL1 = CL2 = 100 pF) 60 ∆: 2.12V @: 7.72V tPZHL tPYLH tPZLH 50 TxD 1 tPYHL Z 30 Y 20 3 06985-033 10 RxD 0 –40 4 –20 0 20 40 60 TEMPERATURE (°C) 80 06985-034 DELAY (ns) 40 CH1 2V Ω CH3 2V Ω CH2 2V Ω CH4 2V Ω M20ns T 48ns A CH1 3.24V Figure 19. Driver/Receiver Propagation Delay, High to Low (RLDIFF = 54 Ω, CL1 = CL2 = 100 pF) Figure 16. Driver Propagation Delay vs. Temperature Rev. C | Page 10 of 16 Data Sheet ADM2491E 350 4.76 4.74 4.73 250 SIDE 2 VOLTAGE (V) SAFETY-LIMITING CURRENT (mA) 4.75 300 200 150 SIDE 1 100 4.72 4.71 4.70 4.69 4.68 4.67 50 100 150 CASE TEMPERATURE (°C) 200 4.65 –40 0.30 –4 0.25 VOLTAGE (V) –2 –12 0.05 4.4 4.6 4.8 5.0 RECEIVER OUTPUT VOLTAGE (V) Figure 21. Output Current vs. Receiver Output High Voltage 12 10 8 6 4 2 0.2 0.4 0.6 0.8 1.0 1.2 RECEIVER OUTPUT VOLTAGE (V) 06985-022 OUTPUT CURRENT (mA) 14 0 80 0 –40 –20 0 20 40 60 80 TEMPERATURE (°C) Figure 24. Receiver Output Low Voltage vs. Temperature, IRxD = –4 mA 16 0 60 0.15 0.10 4.2 40 0.20 –10 06985-021 OUTPUT CURRENT (mA) 0.35 –14 4.0 20 Figure 23. Receiver Output High Voltage vs. Temperature, IRxD = −4 mA 0 –8 0 TEMPERATURE (°C) Figure 20. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884 –6 –20 Figure 22. Output Current vs. Receiver Output Low Voltage Rev. C | Page 11 of 16 06985-037 50 06985-020 0 06985-036 4.66 0 ADM2491E Data Sheet CIRCUIT DESCRIPTION ELECTRICAL ISOLATION TRUTH TABLES In the ADM2491E, electrical isolation is implemented on the logic side of the interface. Therefore, the part has two main sections: a digital isolation section and a transceiver section (see Figure 25). The driver input signal, which is applied to the TxD pin and referenced to logic ground (GND1), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver input, which is referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground. The truth tables in this section use the abbreviations shown in Table 9. iCoupler Technology The digital signals are transmitted across the isolation barrier using iCoupler technology. This technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. VDD1 VDD2 ISOLATION BARRIER DE ENCODE DECODE Table 9. Truth Table Abbreviations Letter H L I X Z NC Description High level Low level Indeterminate Irrelevant High impedance (off ) Disconnected Table 10. Transmitting Supply Status VDD1 VDD2 On On On On On On On Off Off On Off Off RxD ENCODE DECODE DECODE ENCODE Y D Z R A B RE GND1 TRANSCEIVER GND2 06985-025 DIGITAL ISOLATION Inputs TxD H L X X L X Y H L Z Z Z Z Outputs Z L H Z Z Z Z Table 11. Receiving Supply Status TxD DE H H L X L X VDD1 On On On On On On Off Figure 25. ADM2491E Digital Isolation and Transceiver Sections Rev. C | Page 12 of 16 VDD2 On On On On On Off Off Inputs A − B (V) >0.2 1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of the decoder. Figure 27 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow, at given distances away from the ADM2491E transformers. 1000 The decoder has a sensing threshold of about 0.5 V; therefore, there is a 0.5 V margin in which induced voltages can be tolerated. Given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated, as shown in Figure 26. 0.01 Figure 26. Maximum Allowable External Magnetic Flux Density MAXIMUM ALLOWABLE CURRENT (kA) Because iCoupler devices use a coreless technology, no magnetic components are present and the problem of magnetic saturation of the core material does not exist. Therefore, iCoupler devices have essentially infinite dc field immunity. The following analysis defines the conditions under which this may occur. The 3 V operating condition of the ADM2491E is examined because it represents the most susceptible mode of operation. 0.1 0.001 1k The receiver inputs include a fail-safe feature that guarantees a logic high on the RxD pin when the A and B inputs are floating or open circuited. MAGNETIC FIELD IMMUNITY 1 06985-026 FAIL-SAFE RECEIVER INPUTS 10 DISTANCE = 1m 100 DISTANCE = 5mm 10 DISTANCE = 100mm 1 0.1 0.01 1k 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) 100M 06985-027 The ADM2491E contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. This circuitry is designed to disable the driver outputs when a die temperature of 150°C is reached. As the device cools, the drivers are re-enabled at a temperature of 140°C. MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kGAUSS) THERMAL SHUTDOWN Figure 27. Maximum Allowable Current for Various Current-to-ADM2491E Spacings With combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces can induce error voltages large enough to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. C | Page 13 of 16 ADM2491E Data Sheet APPLICATIONS INFORMATION PCB LAYOUT The ADM2491E requires isolated power capable of 5 V at up to approximately 75 mA (this current is dependent on the data rate and termination resistors used) to be supplied between the VDD2 and the GND2 pins. A transformer driver circuit with a center-tapped transformer and LDO can be used to generate the isolated 5 V supply, as shown in Figure 28. The center-tapped transformer provides electrical isolation of the 5 V power supply. The primary winding of the transformer is excited with a pair of square waveforms that are 180° out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP3330 linear voltage regulator provides a regulated power supply to the bus-side circuitry (VDD2) of the ADM2491E. The ADM2491E isolated RS-485 transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is required at the input and output supply pins (see Figure 29). Bypass capacitors are conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The capacitor value should be between 0.01 μF and 0.1 μF. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side is connected close to the package. ISOLATION BARRIER VCC SD103C + VCC IN 22µF SD OUT ADP3330 5V + Figure 29. Recommended Printed Circuit Board Layout ERR NR 78253 In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. Furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. GND SD103C VCC VDD1 VDD2 ADM2491E GND1 GND2 ADM2491E VDD2 GND2 A B Z Y NC GND2 NC = NO CONNECT 10µF 06985-028 TRANSFORMER DRIVER VDD1 GND1 RxD RE DE TxD NC GND1 06985-029 ISOLATED POWER SUPPLY CIRCUIT Figure 28. Isolated Power Supply Circuit Rev. C | Page 14 of 16 Data Sheet ADM2491E TYPICAL APPLICATIONS Figure 30 and Figure 31 show typical applications of the ADM2491E in half-duplex and full-duplex RS-485 network configurations. Up to 32 transceivers can be connected to the RS-485 bus. To minimize reflections, the line must be terminated VCC ADM2491E A RxD R MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 32 ADM2491E A R1 B B RE RT DE RE RT Z D RxD R DE Z R2 Y Y A B R Z Y A B R D ADM2491E Z D TxD Y D ADM2491E RxD RE DE TxD RxD RE DE TxD 06985-030 TxD at the receiving end in its characteristic impedance, and stub lengths off the main line must be kept as short as possible. For half-duplex operation, this means that both ends of the line must be terminated because either end can be the receiving end. NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. 2. ISOLATION NOT SHOWN. Figure 30. ADM2491E Typical Half-Duplex RS-485 Network B SLAVE R1 A R Y D RT Z RE Z DE TxD D R2 R2 RT Y VDD DE B A TxD RE R RxD R1 ADM2491E ADM2491E A B Z Y A B Z Y SLAVE SLAVE R ADM2491E RxD RE R D DE TxD RxD RE D DE TxD NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. Figure 31. ADM2491E Typical Full -Duplex RS-485 Network Rev. C | Page 15 of 16 ADM2491E 06985-031 RxD MAXIMUM NUMBER OF NODES = 32 VDD MASTER ADM2491E Data Sheet OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 10.65 (0.4193) 10.00 (0.3937) 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 8° 0° 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 1.27 (0.0500) 0.40 (0.0157) 03-27-2007-B 1 Figure 32. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 ADM2491EBRWZ ADM2491EBRWZ–REEL7 EVAL-ADM2491EEBZ 1 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 16-Lead Standard Small Outline Package, Wide Body [SOIC_W] 16-Lead Standard Small Outline Package, Wide Body [SOIC_W] Evaluation Board Z = RoHS Compliant Part. ©2007–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06985-0-5/14(C) Rev. C | Page 16 of 16 Package Option RW-16 RW-16
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ADM2491EBRWZ
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    • 1+119.60000

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