ADRF6614ACPZ-R7

GND CPOUT REFIN MUXOUT IFOUT+ IFOUT– VCC11 46 45 44 48 47 43 42 39 38 41 40 37 GND LDO3 2 DNC LDO4 FUNCTIONAL BLOCK DIAGRAM GND 1 PLL REF BUFFER PFD/CP FRACTIONAL DIVIDER GND 6 VCO MUX VCO EXTVCOIN– 5 SPI CONTROL 15 16 17 18 19 22 23 VCC10 33 VCC9 32 VCC8 36 RFBCT1 35 RFIN1 31 VCC7 30 LDO2 26 25 RFIN2 RFBCT2 29 VCC6 28 VCC5 27 VCC4 20 21 24 GND 14 VCC3 DNC 13 IFOUT2– DIV 3.3V LDO SCLK DECL5 12 SPI 2.5V LDO SDIO DECL4 11 PLL 3.3V LDO VCC2 DECL3 10 ADRF6614 VCO LDO LDO1 DECL1 8 DECL2 9 LOOUT– EXTVCOIN+ ÷1 TO 32 4 CS VCC1 7 34 14115-001 VCO IFOUT2+ GND 3 LOOUT+ RF frequency: 700 MHz to 3000 MHz, continuous LO input frequency: 200 MHz to 2700 MHz, high-side or lowside injection IF range: 40 MHz to 500 MHz Power conversion gain of 9.0 dB Phase noise performance of −144 dBc/Hz at 800 kHz offset supporting stringent GSM standards in both 800 MHz to 900 MHz and 1800 MHz to 1900 MHz bands Single-sideband (SSB) noise figure of 11.3 dB Input IP3 of 30 dBm Input P1dB of 10.6 dBm Typical LO input drive of 0 dBm Single-ended, 50 Ω RF port Single-ended or balanced LO input port Serial port interface (SPI) control on all functions Exposed pad, 7 mm × 7 mm, 48-lead LFCSP VCOVTUNE FEATURES VCC12 Data Sheet 700 MHz to 3000 MHz, Dual Passive Receive Mixer with Integrated PLL and VCO ADRF6614 Figure 1. APPLICATIONS Multiband/multistandard cellular base station diversity receivers Wideband radio link diversity downconverters Multimode cellular extenders and picocells GENERAL DESCRIPTION The ADRF6614 is a dual radio frequency (RF) mixer and intermediate frequency (IF) amplifier with an integrated phaselocked loop (PLL) and voltage controlled oscillators (VCOs). The ADRF6614 uses revolutionary broadband square wave limiting local oscillator (LO) amplifiers to achieve a wideband RF bandwidth of 700 MHz to 3000 MHz. Unlike narrow-band sine wave LO amplifier solutions, the LO can be applied above or below the RF input over a wide bandwidth. Energy storage elements are not utilized in the LO amplifier, thus dc current consumption also decreases with decreasing LO frequency. The ADRF6614 utilizes highly linear, doubly balanced passive mixer cores with integrated RF and LO balancing circuits to allow single-ended operation. Integrated RF baluns allow optimal performance over the 700 MHz to 3000 MHz RF input frequency. The balanced passive mixer arrangement provides outstanding LO to RF and LO to IF leakages, excellent RF to IF isolation, and excellent intermodulation performance over the full RF bandwidth. The balanced mixer cores provide extremely high input linearity, allowing the device to be used in demanding wideband applications where in-band blocking signals may otherwise result in the degradation of dynamic range. Noise performance under blocking is comparable to narrow-band passive mixer designs. High linearity Rev. 0 IF buffer amplifiers follow the passive mixer cores, yielding typical power conversion gains of 9.0 dB, and can be matched to a wide range of output impedances. The PLL architecture supports both integer-N and fractional-N operation and can generate the entire LO frequency range of 200 MHz to 2700 MHz using an external reference input frequency anywhere in the range of 12 MHz to 320 MHz. An external loop filter provides flexibility in trading off phase noise vs. acquisition time. To reduce fractional spurs in fractional-N mode, a Σ-Δ modulator controls the post VCO-programmable divider. The device integrates six VCO cores, four of which provide complete frequency coverage between 200 MHz and 2700 MHz, and meet the GSM phase noise requirements in the 800 MHz and 900 MHz bands. Two additional GSM only cores enable the ADRF6614 to meet the GSM phase noise requirements in the digital cellular system 1800 MHz (DCS1800) and personal communications service 1900 MHz (PCS1900) bands. All features of the ADRF6614 are controlled via a 3-wire SPI, resulting in optimum performance and minimum external components. The ADRF6614 is fabricated using a BiCMOS, high performance IC process. The device is available in a 7 mm × 7 mm, 48-lead LFCSP package and operates over a −40°C to +85°C temperature range. An evaluation board is available. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADRF6614 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Spurious Performance ............................................................... 32 Applications ....................................................................................... 1 Theory of Operation ...................................................................... 34 Functional Block Diagram .............................................................. 1 RF Subsystem .............................................................................. 34 General Description ......................................................................... 1 External LO Generation ............................................................ 34 Revision History ............................................................................... 2 Internal LO Generation ............................................................. 34 Specifications..................................................................................... 3 Applications Information .............................................................. 38 RF Specifications .......................................................................... 3 Basic Connections by Pin Description ........................................ 39 Synthesizer/PLL Specifications ................................................... 4 Mixer Optimization ....................................................................... 40 VCO Specifications, Open-Loop................................................ 7 RF Input Balun Insertion Loss Optimization ......................... 40 Logic Input and Power Specifications ....................................... 8 IIP3 Optimization ...................................................................... 40 Digital Logic Specifications ......................................................... 9 VGS Programming ..................................................................... 41 Absolute Maximum Ratings .......................................................... 10 Low-Pass Filter Programming .................................................. 41 Thermal Resistance .................................................................... 10 GSM Mode of Operation........................................................... 43 ESD Caution ................................................................................ 10 Register Summary .......................................................................... 44 Pin Configuration and Function Descriptions ........................... 11 Register Details ............................................................................... 45 Typical Performance Characteristics ........................................... 13 Evaluation Board ............................................................................ 55 Mixer, High Performance Mode ............................................... 13 Outline Dimensions ....................................................................... 61 Mixer, High Efficiency Mode.................................................... 22 Ordering Guide .......................................................................... 61 Synthesizer ................................................................................... 23 REVISION HISTORY 3/16—Revision 0: Initial Version Rev. 0 | Page 2 of 61 Data Sheet ADRF6614 SPECIFICATIONS RF SPECIFICATIONS TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, frequency of the reference (fREF) = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection, optimum RF balun (RFB) and low-pass filter (LPF) settings, unless otherwise noted. Table 1. High Performance Mode Parameter RF INTERFACE Return Loss Input Impedance RF Frequency Range (fRF) IF OUTPUT INTERFACE Output Impedance IF Frequency Range (fIF) DC Bias Voltage 1 EXTERNAL LO INPUT External LO Power Input Return Loss Input Impedance External VCO Input Frequency LO Frequency Range DYNAMIC PERFORMANCE Power Conversion Gain Voltage Conversion Gain SSB Noise Figure IF Output Phase Noise Under Blocking Input Third-Order Intercept (IIP3) Input Second-Order Intercept (IIP2) Input 1 dB Compression Point (P1dB) LO to IF Output Leakage LO to RF Input Leakage RF to IF Output Isolation IF/2 Spurious IF/3 Spurious POWER INTERFACE VCC1, VCC2, VCC7, VCC12 Supply Voltage Quiescent Current VCC3, VCC4, VCC5, VCC6, VCC8, VCC9, VCC10, VCC11, IFOUT1+, IFOUT1−, IFOUT2+, IFOUT2− Supply Voltage Quiescent Current LO OUTPUT (LOOUT+, LOOUT−) Frequency Range (fLO) Output Level Output Impedance 1 Test Conditions/Comments Min Tunable to >20 dB broadband via serial port Typ Differential impedance, f = 200 MHz Externally generated 0 −11 50 250 250 4:1 IF port transformer and printed circuit board (PCB) loss removed ZSOURCE = 50 Ω, differential ZLOAD = 200 Ω 10 dBm blocker present 10 MHz above desired the RF input, fRF = 1900 MHz, fBLOCK = 1910 MHz, fLO = 1697 MHz, fIF = 203 MHz, IFBLOCKER = 213 MHz fRF1 = 1900 MHz, fRF2 = 1901 MHz, fLO = 1697 MHz, each RF tone at −10 dBm fRF1 = 1900 MHz, fRF2 = 1950 MHz, fLO = 1697 MHz, each RF tone at −10 dBm Unfiltered IF output −10 dBm input power −10 dBm input power Rev. 0 | Page 3 of 61 500 IFOUTx± −5 Supply voltage must be applied from the external circuit through choke inductors. 3000 dB Ω MHz 300||1.5 40 Adjustable via SPI in four steps, in 50 Ω balanced load Balanced Unit 17.9 50 700 External VCO input supports divide by 1, 2, 4, 8, 16, and 32 Low-side or high-side LO, internally or externally generated Max +5 5700 2850 Ω||pF MHz V dBm dB Ω MHz MHz 9.0 dB 15.0 11.3 −153 dB dB dBc/Hz 30 dBm 60 dBm 10.6 −35 −45 −22 −72 −69 dBm dBm dBm dB dBc dBc 3.55 3.7 260 3.85 V mA 3.55 5 214 5.25 V mA 2700 +7 MHz dBm Ω 200 −5 50 ADRF6614 Data Sheet TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection, optimum RFB and LPF settings, unless otherwise noted. Table 2. High Efficiency Mode Parameter DYNAMIC PERFORMANCE Power Conversion Gain Voltage Conversion Gain SSB Noise Figure IIP3 Test Conditions/Comments Min Typ 4:1 IF port transformer and PCB loss removed ZSOURCE = 50 Ω, differential ZLOAD = 200 Ω fRF1 = 1900 MHz, fRF2 = 1901 MHz, fLO = 1697 MHz, each RF tone at −10 dBm fRF1 = 1900 MHz, fRF2 = 1950 MHz, fLO = 1697 MHz, each RF tone at −10 dBm IIP2 Input P1dB LO to IF Output Leakage LO to RF Input Leakage RF to IF Output Isolation IF/2 Spurious IF/3 Spurious POWER INTERFACE VCC1, VCC2, VCC7, VCC12 Supply Voltage Quiescent Current VCC3, VCC4, VCC5, VCC6, VCC8, VCC9, VCC10, VCC11, IFOUT1+, IFOUT1−, IFOUT2+, IFOUT2− Supply Voltage Quiescent Current Unfiltered IF output −10 dBm input power −10 dBm input power Max Unit 8.7 14.7 10.7 20.5 dB dB dB dBm 53 dBm 8.2 −45.0 −52.0 −22.8 −58 −58 dBm dBm dBm dB dBc dBc 3.55 3.7 260 3.85 V mA 3.55 3.7 210 5.25 V mA SYNTHESIZER/PLL SPECIFICATIONS High performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fPFD = 1.536 MHz, fREF power (PREFIN) = 4 dBm, CSCALE = 8 mA, bleed = 0 µA, ABLDLY = 0.9 ns, integer mode loop filter, unless otherwise noted. Table 3. Integer Mode Parameter SYNTHESIZER SPECIFICATIONS Frequency Range (fLO) Figure of Merit (FOM) 1 Phase and Frequency Detector (PFD) Frequency (fPFD) Reference Spurs CHARGE PUMP Pump Current Output Compliance Range REFERENCE CHARACTERISTICS REFIN Input Frequency REFIN Input Capacitance Reference Divider Value MUXOUT Output Level MUXOUT Duty Cycle Test Conditions/Comments Synthesizer specifications referenced to 1 × LO Internally generated LO PREFIN = 6.5 dBm Min Typ 200 Max Unit 2700 MHz dBc/Hz/Hz MHz −223 0.8 fPFD = 1.536 MHz 1 × fPFD 4 × fPFD >4 × fPFD 70 −105 −105 −90 Programmable to 250 µA, 500 µA, …, 8 mA 8 0.7 dBc dBc dBc 8.75 2.5 mA V 320 MHz pF REFIN, MUXOUT pins 12 4 Programmable to 0.5, 1, 2, 3, …, 2047 VOL (lock detect output selected) VOH (lock detect output selected) Reference output selected Rev. 0 | Page 4 of 61 0.5 2047 0.25 2.7 50 V V % Data Sheet Parameter VCO_0 Phase Noise, Locked Integrated Phase Noise VCO_1 Phase Noise, Locked Integrated Phase Noise VCO_2 Phase Noise, Locked Integrated Phase Noise VCO_3 Phase Noise, Locked Integrated Phase Noise VCO_4 Phase Noise, Locked Integrated Phase Noise VCO_5 Phase Noise, Locked ADRF6614 Test Conditions/Comments Min Typ Max Unit fLO = 2.55 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −87 −94.9 −103.3 −132.9 −154.1 −155.2 0.87 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 2.22 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −90 −98.4 −106.5 −136.1 −154.8 −155.5 0.63 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.9 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −90 −98.1 −109.8 −137.1 −155.7 −156.2 0.61 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.6 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −89 −97.2 −107 −136.2 −155.7 −157.3 0.64 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.57 GHz 1 kHz offset 50 kHz offset 100 kHz offset 800 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −90 −109 −119 −144 −145 −156 −156 0.26 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.68 GHz 1 kHz offset 50 kHz offset 100 kHz offset 800 kHz offset 1 MHz offset −93 −107 −118 −144 −145 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz Rev. 0 | Page 5 of 61 ADRF6614 Parameter Integrated Phase Noise 1 Data Sheet Test Conditions/Comments 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth Min Typ −157 −157.5 0.27 Max Unit dBc/Hz dBc/Hz °rms The FOM is computed as phase noise (dBc/Hz) –10log10(fPFD) – 20log10(fLO/fPFD). The FOM was measured across the full LO range, with fREF = 122.88 MHz and fREF power = 6.5 dBm with a 1.536 MHz fPFD. The FOM was computed at 50 kHz offset. High performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fPFD = 30.72 MHz, fREF power = 4 dBm, CSCALE = 250 µA, bleed = 93.75 µA, ABLDLY = 0 ns, fractional mode loop filter, unless otherwise noted. Table 4. Fractional Mode Parameter SYNTHESIZER SPECIFICATIONS FOM 1 REFERENCE CHARACTERISTICS VCO_0 Phase Noise, Locked Integrated Phase Noise VCO_1 Phase Noise, Locked Integrated Phase Noise VCO_2 Phase Noise, Locked Integrated Phase Noise VCO_3 Phase Noise, Locked Integrated Phase Noise 1 Test Conditions/Comments Synthesizer specifications referenced to 1 × LO PREFIN = 6.5 dBm REFIN, MUXOUT pins Min Typ Max Unit 219 dBc/Hz/Hz fLO = 2.55 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −92.5 −97.4 −109.7 −137.6 −153.6 −155.5 0.36 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 2.22 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −93.6 −101.8 −112.5 −140.5 −154.3 −155.3 0.32 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.9 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −94.2 −101.7 −112.4 −141.3 −155.8 −156.8 0.32 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms fLO = 1.6 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset 1 kHz to 40 MHz integration bandwidth −93.1 −99.8 −110.9 −140.2 −155.7 −157.2 0.33 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz °rms The FOM is computed as phase noise (dBc/Hz) − 10log10(fPFD) – 20log10(fLO/fPFD). The FOM was measured across the full LO range, with fREF = 122.88 MHz and fREF power = 6.5 dBm with a 30.72 MHz fPFD. The FOM was computed at 45 kHz offset. Rev. 0 | Page 6 of 61 Data Sheet ADRF6614 VCO SPECIFICATIONS, OPEN-LOOP High performance mode, TA = 25°C, measured on LO output, unless otherwise noted. Table 5. Parameter VCO_0 PHASE NOISE VCO_1 PHASE NOISE VCO_2 PHASE NOISE VCO_3 PHASE NOISE VCO_4 PHASE NOISE VCO_5 PHASE NOISE Test Conditions/Comments fLO = 2.55 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset fLO = 2.15 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset fLO = 1.9 GHz 1 kHz offset 50 kHz offset 100 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset fLO = 1.6 GHz 1 kHz offset 50 kHz offset 100 kHz offset 800 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset fVCO = 3.14 GHz 1 kHz offset 50 kHz offset 100 kHz offset 800 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset fVCO = 3.36 GHz 1 kHz offset 50 kHz offset 100 kHz offset 800 kHz offset 1 MHz offset 10 MHz offset 40 MHz offset Rev. 0 | Page 7 of 61 Min Typ Max Unit −50 −104.4 −112.6 −137.7 −154 −155.1 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz −54 −106.1 −115 −138.9 −155.8 −155.2 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz −53.6 −106.6 −114.6 −140.8 −155.4 −156.3 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz −48.5 −106 −115.3 −139.2 −140.2 −157.7 −156.3 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz −53.8 −110.3 −118 −139.5 −140.6 −155.4 −157.4 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz −54 −108.3 −116.3 −138.5 −140 −156.3 −157.8 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz ADRF6614 Data Sheet LOGIC INPUT/OUTPUT AND POWER SPECIFICATIONS TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection, optimum RFB and LPF settings, unless otherwise noted. Table 6. Parameter LOGIC INPUT/OUTPUTS Input Voltage High, VIH Low, VIL Output Voltage High, VOH Low, VOL Input Current, IINH/IINL POWER SUPPLIES High Performance Mode Voltage Range VCC1, VCC2, VCC7, VCC12 VCC3, VCC4, VCC5, VCC6, VCC8, VCC9, VCC10, VCC11, IFOUT1+, IFOUT1−, IFOUT2+, IFOUT2− Power Dissipation High Efficiency Mode Voltage Range VCC1, VCC2, VCC3, VCC4, VCC5, VCC6, VCC7, VCC8, VCC9, VCC10, VCC11, VCC12, IFOUT1+, IFOUT1−, IFOUT2+, IFOUT2− Power Dissipation Test Conditions/Comments SCLK, SDIO, CS Min Typ 1.4 0 IOH = −100 µA IOL = 100 µA Max Unit 3.3 0.7 V V 0.2 V V µA 5.25 5.25 V V 2.3 0.1 3.55 4.75 Internal LO mode (internal PLL) External LO output enabled External LO output disabled 2.7 2.5 3.55 Internal LO mode (internal PLL) External LO output enabled External LO output disabled Rev. 0 | Page 8 of 61 3.7 5 3.7 2.0 1.8 W W 3.85 V W W Data Sheet ADRF6614 DIGITAL LOGIC SPECIFICATIONS Table 7. Symbol tCLK tDS tDH tS tH tHIGH tLOW tACCESS tZ Description Serial clock period Setup time between data and rising edge of SCLK Hold time between data and rising edge of SCLK Setup time between falling edge of CS and SCLK Hold time between rising edge of CS and SCLK Minimum period for SCLK to be in a logic high state Minimum period for SCLK to be in a logic low state Maximum delay between falling edge of SCLK and output data Valid for a read operation Maximum delay between CS deactivation and SDIO bus return to high impedance tHIGH tDS tS Min 38 8 8 10 10 10 10 Max 231 5 Unit ns ns ns ns ns ns ns ns ns tH tCLK tLOW tDH Typ tACCESS CS DON'T CARE DON'T CARE tZ SDIO DON'T CARE A6 A5 A4 A3 A2 A1 A0 R/W D15 D14 D13 Figure 2. Setup and Hold Timing Measurements Rev. 0 | Page 9 of 61 D3 D2 D1 D0 DON'T CARE 14115-002 SCLK ADRF6614 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 8. Parameter Supply Voltage (VCC1, VCC2, VCC3, VCC4, VCC5, VCC6, VCC7, VCC8, VCC9, VCC10, VCC11, VCC12, IFOUT1+, IFOUT1−, IFOUT2+, IFOUT2−) Digital Input/Output (SCLK, SDIO, CS) RFINx EXTVCOIN+, EXTVCOIN− Maximum Junction Temperature Operating Temperature Range Storage Temperature Range θJC is specified for the worst case conditions, that is, a device soldered in a circuit board for surface-mount packages. Rating −0.5 V to +5.5 V Table 9. Thermal Resistance Package Type 48-Lead LFCSP −0.3 V to +3.6 V 20 dBm 13 dBm 150°C −40°C to +85°C −65°C to +150°C ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 10 of 61 θJC 1.62 Unit °C/W Data Sheet ADRF6614 48 47 46 45 44 43 42 41 40 39 38 37 GND CPOUT VCC12 LDO4 LDO3 REFIN MUXOUT VCC11 DNC IFOUT1+ IFOUT1– GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADRF6614 TOP VIEW (Not to Scale) 36 35 34 33 32 31 30 29 28 27 26 25 RFBCT1 RFIN1 VCC10 VCC9 VCC8 VCC7 LDO2 VCC6 VCC5 VCC4 RFIN2 RFBCT2 NOTES 1. DNC = DO NOT CONNECT. 2. THE EXPOSED PAD MUST BE CONNECTED TO A GROUND PLANE WITH LOW THERMAL IMPEDANCE. 14115-003 LOOUT+ LOOUT– LDO1 VCC2 SDIO SCLK CS VCC3 DNC IFOUT2+ IFOUT2– GND 13 14 15 16 17 18 19 20 21 22 23 24 GND 1 VCOVTUNE 2 GND 3 EXTVCOIN+ 4 EXTVCOIN– 5 GND 6 VCC1 7 DECL1 8 DECL2 9 DECL3 10 DECL4 11 DECL5 12 Figure 3. Pin Configuration Table 10. Pin Function Descriptions Pin No. 1 2 3, 6 4, 5 7 8, 9 10, 11 12 13, 14 15 16 17 18 19 20, 41 21, 40 22, 23 24, 37 25 26 27, 28, 29 30 31 32, 33, 34 35 36 38, 39 42 Mnemonic GND VCOVTUNE GND EXTVCOIN+, EXTVCOIN− VCC1 DECL1, DECL2 DECL3, DECL4 DECL5 LOOUT+, LOOUT− LDO1 VCC2 SDIO SCLK CS VCC3, VCC11 DNC IFOUT2+, IFOUT2− GND RFBCT2 RFIN2 VCC4, VCC5, VCC6 LDO2 VCC7 VCC8, VCC9, VCC10 RFIN1 RFBCT1 IFOUT1−, IFOUT1+ MUXOUT Description Common Ground Connection for External Loop Filter. Control Voltage for Internal VCO. Common Ground for External VCO. Inputs from External VCO to Internal Divider. 3.7 V VCO Supply. LDO Output Decouplers for VCO. External Decouplers for VCO Buffer. External Decoupler for VCO Circuitry. Differential Outputs of Internally Generated LO. External Decoupling for Internal 2.5 V SPI Port LDO. 3.7 V Supply for Programmable SPI Port. Serial Data Input/Output for Programmable SPI Port. Clock for Programmable SPI Port. SPI Chip Select, Active Low. 5 V Biases for Channel 1 and Channel 2 IF. Do Not Connect. Do not connect these pins externally. Channel 2 Differential IF Outputs. Ground Connections for Channel 1 and Channel 2 IF Stage. Balun Center Tap Connection for Channel 2 RF Input. Channel 2 RF Input. 5 V Supplies for Mixer LO Amplifiers. External Decoupling for Internal 3.3 V PLL/Divider LDO. 3.7 V Supply for Mixer LO Divider Chain. 5 V Supplies for Mixer LO Amplifiers. Channel 1 RF Input. Balun Center Tap Connection for Channel 1 RF Input. Channel 1 Differential IF Outputs. Internal Multiplexer Output. Rev. 0 | Page 11 of 61 ADRF6614 Pin No. 43 44 45 46 47 48 Mnemonic REFIN LDO3 LDO4 VCC12 CPOUT GND EPAD Data Sheet Description Reference Input for Internal PLL (Single-Ended, CMOS). External Decoupling for Internal 2.5 V PLL LDO. External Decoupling for Internal 3.3 V PLL LDO. 3.7 V Supply for Internal PLL. Charge Pump Output. Common Ground for External Charge Pump. Exposed Pad. The exposed pad must be connected to a ground plane with low thermal impedance. Rev. 0 | Page 12 of 61 Data Sheet ADRF6614 TYPICAL PERFORMANCE CHARACTERISTICS MIXER, HIGH PERFORMANCE MODE TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, low-side LO injection, optimum RFB and LPF settings, unless otherwise noted. For integer mode: fPFD = 1.536 MHz, CSCALE = 8 mA, bleed = 0 µA, ABLDLY = 0.9 ns. For fractional mode: fPFD = 30.72 MHz, CSCALE = 250 µA, bleed = 93.75 µA, ABLDLY = 0.0 ns. 2.8 POWER DISSIPATION (W) 2.6 2.4 90 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 85 80 75 INPUT IP2 (dBm) 3.0 2.2 2.0 1.8 1.6 70 65 60 55 50 45 1.4 30 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-004 35 1.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 4. Power Dissipation vs. RF Frequency over Three Temperatures Figure 7. Input IP2 vs. RF Frequency over Three Temperatures 11.0 15 10.5 10.0 13 INPUT P1dB (dBm) 9.0 8.5 8.0 7.5 7.0 6.5 4.5 4.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) 5 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 8. Input P1dB vs. RF Frequency over Three Temperatures 18 40 38 17 36 16 SSB NOISE FIGURE (dB) 34 32 30 28 26 24 22 20 14 12 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 10 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 6. Input IP3 vs. RF Frequency over Three Temperatures –40°C LOCKED –40°C EXTERNAL LO +25°C LOCKED +25°C EXTERNAL LO +85°C LOCKED +85°C EXTERNAL LO 15 14 13 12 11 10 9 8 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-006 16 9 7 Figure 5. Power Conversion Gain vs. RF Frequency over Three Temperatures, IF Balun and Board Loss Removed 18 11 14115-008 5.0 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO RF FREQUENCY (MHz) 14115-109 5.5 14115-305 CONVERSION GAIN (dB) 9.5 6.0 14115-007 40 1.2 RF FREQUENCY (MHz) INPUT IP3 (dBm) TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO Figure 9. SSB Noise Figure vs. RF Frequency over Three Temperatures Rev. 0 | Page 13 of 61 ADRF6614 Data Sheet 70 2.7 68 66 64 62 2.1 1.9 1.7 RF RF RF RF RF RF 0 10 20 9.0 40 50 60 70 80 8.0 50 RF RF RF RF RF RF 40 –40 –30 –20 –10 0 10 20 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 30 40 50 60 70 80 TEMPERATURE (°C) Figure 13. Input IP2 vs. Temperature for Three RF Frequencies 15 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 14 13 INPUT P1dB (dBm) CONVERSION GAIN (dB) 8.5 52 42 30 RF RF RF RF RF RF 54 44 Figure 10. Power Dissipation vs. Temperature for Three RF Frequencies 9.5 56 46 TEMPERATURE (°C) 10.0 58 48 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 1.5 –40 –30 –20 –10 60 14115-013 INPUT IP2 (dBm) 2.3 14115-010 POWER DISSIPATION (W) 2.5 7.5 7.0 6.5 6.0 5.5 RF RF RF RF RF RF = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2700MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2700MHz, HIGH-SIDE LO 12 11 10 9 5.0 8 4.5 7 4.0 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) 5 –40 –30 –20 –10 14115-011 3.0 –40 –30 –20 –10 18 34 17 33 32 SSB NOISE FIGURE (dB) 29 28 27 26 25 40 50 60 70 80 RF = 900MHz RF = 1900MHz RF = 2500MHz = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 20 –40 –30 –20 –10 0 10 20 15 14 13 12 11 10 9 30 40 50 60 70 80 TEMPERATURE (°C) Figure 12. Input IP3 vs. Temperature for Three RF Frequencies 8 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 14115-115 RF RF RF RF RF RF 14115-012 INPUT IP3 (dBm) 30 21 30 16 31 23 20 Figure 14. Input P1dB vs. Temperature for Three RF Frequencies 35 22 10 TEMPERATURE (°C) Figure 11. Power Conversion Gain vs. Temperature for Three RF Frequencies 24 0 14115-314 6 3.5 Figure 15. SSB Noise Figure vs. Temperature for Three RF Frequencies Rev. 0 | Page 14 of 61 Data Sheet 2.55 85 2.50 80 75 RF = 2500MHz, HIGH-SIDE LO RF = 2500MHz, LOW-SIDE LO 2.45 POWER DISSIPATION (W) ADRF6614 70 RF = 1900MHz, HIGH-SIDE LO RF = 1900MHz, LOW-SIDE LO 2.30 2.25 50 RF RF RF RF RF RF 35 120 160 200 240 280 320 360 400 440 480 30 14115-016 80 IF FREQUENCY (MHz) 10.0 RF RF RF RF RF RF 9.5 9.0 8.5 120 160 200 240 280 320 360 400 440 480 80 Figure 19. Input IP2 vs. IF Frequency for Three RF Frequencies 15 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 14 13 INPUT P1dB (dBm) 8.0 40 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO IF FREQUENCY (MHz) Figure 16. Power Dissipation vs. IF Frequency for Three RF Frequencies CONVERSION GAIN (dB) 55 40 2.15 2.10 40 60 45 RF = 900MHz, HIGH-SIDE LO RF = 900MHz, LOW-SIDE LO 2.20 65 14115-019 2.35 INPUT IP2 (dBm) 2.40 7.5 7.0 6.5 6.0 5.5 RF RF RF RF RF RF = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 12 11 10 9 5.0 8 4.5 7 4.0 120 160 200 240 280 320 360 400 440 480 IF FREQUENCY (MHz) 5 40 Figure 20. Input P1dB vs. IF Frequency for Three RF Frequencies 18 36 34 17 32 16 SSB NOISE FIGURE (dB) 26 24 22 20 18 16 14 12 10 40 RF RF RF RF RF RF 80 = 900MHz, LOW-SIDE LO = 1900MHz, LOW-SIDE LO = 2500MHz, LOW-SIDE LO = 900MHz, HIGH-SIDE LO = 1900MHz, HIGH-SIDE LO = 2500MHz, HIGH-SIDE LO 120 160 200 240 280 320 360 400 440 480 IF FREQUENCY (MHz) –40°C, LOW-SIDE LO +25°C, LOW-SIDE LO +85°C, LOW-SIDE LO –40°C, HIGH-SIDE LO +25°C, HIGH-SIDE LO +85°C, HIGH-SIDE LO 15 14 13 12 11 10 9 8 50 14115-018 INPUT IP3 (dBm) 28 120 160 200 240 280 320 360 400 440 480 IF FREQUENCY (MHz) Figure 17. Power Conversion Gain vs. IF Frequency for Three RF Frequencies 30 80 100 150 200 250 300 IF FREQUENCY (MHz) Figure 18. Input IP3 vs. IF Frequency for Three RF Frequencies 350 400 450 14115-121 80 14115-017 3.0 40 14115-020 6 3.5 Figure 21. SSB Noise Figure vs. IF Frequency for Three Temperatures Rev. 0 | Page 15 of 61 Data Sheet –8 –24 –28 –32 –36 –40 LO FREQUENCY (MHz) 14115-025 300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 0 –4 –8 –12 –16 –20 –24 –28 –32 –36 –40 –44 –48 –52 –56 –60 –64 –68 TA = –40°C TA = +25°C TA = +85°C 300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 LO FREQUENCY (MHz) 14115-026 LO TO RF LEAKAGE (dBm) Figure 25. LO to IF Leakage vs. LO Frequency over Three Temperatures 2 × LO LEAKAGE (dBm) Figure 26. LO to RF Leakage vs. LO Frequency over Three Temperatures 14115-024 RF TO IF ISOLATION (dBc) RF FREQUENCY (MHz) –20 –52 Figure 23. IF/3 Spurious vs. RF Frequency over Three Temperatures 0 TA = –40°C, HIGH-SIDE LO –2 TA = +25°C, HIGH-SIDE LO –4 TA = +85°C, HIGH-SIDE LO –6 TA = –40°C, LOW-SIDE LO –8 –10 TA = +25°C, LOW-SIDE LO –12 TA = +85°C, LOW-SIDE LO –14 –16 –18 –20 –22 –24 –26 –28 –30 –32 –34 –36 –38 –40 –42 –44 –46 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 –16 –48 14115-123 IF/3 SPURIOUS (dB) RF FREQUENCY (MHz) –12 –44 Figure 22. IF/2 Spurious vs. RF Frequency over Three Temperatures –50 TA = –40°C, HIGH-SIDE LO –52 TA = +25°C, HIGH-SIDE LO –54 TA = +85°C, HIGH-SIDE LO –56 TA = –40°C, LOW-SIDE LO –58 TA = +25°C, LOW-SIDE LO –60 TA = +85°C, LOW-SIDE LO –62 –64 –66 –68 –70 –72 –74 –76 –78 –80 –82 –84 –86 –88 –90 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 TA = –40°C TA = +25°C TA = +85°C 0 –4 –8 –12 –16 –20 –24 –28 –32 –36 –40 –44 –48 –52 –56 –60 –64 TA = –40°C TA = +25°C TA = +85°C 2 × LO TO RF 2 × LO TO IF 300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 LO FREQUENCY (MHz) Figure 24. RF to IF Isolation vs. RF Frequency over Three Temperatures 14115-027 RF FREQUENCY (MHz) 0 –4 LO TO IF LEAKAGE (dBm) –50 TA = –40°C, HIGH-SIDE LO –52 TA = +25°C, HIGH-SIDE LO –54 TA = +85°C, HIGH-SIDE LO –56 TA = –40°C, LOW-SIDE LO –58 TA = +25°C, LOW-SIDE LO –60 TA = +85°C, LOW-SIDE LO –62 –64 –66 –68 –70 –72 –74 –76 –78 –80 –82 –84 –86 –88 –90 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-022 IF/2 SPURIOUS (dB) ADRF6614 Figure 27. 2 × LO Leakage vs. LO Frequency over Three Temperatures (2 × LO to RF and 2 × LO to IF) Rev. 0 | Page 16 of 61 0 –4 –8 –12 –16 –20 –24 –28 –32 –36 –40 –44 –48 –52 –56 –60 –64 ADRF6614 100 TA = –40°C TA = +25°C TA = +85°C MEAN: 7.94 SD: 0.07% PERCENT (%) 80 3 × LO TO RF 60 40 3 × LO TO IF 300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 LO FREQUENCY (MHz) 0 7.70 7.75 7.80 7.85 7.90 7.95 8.00 8.05 8.10 34 35 CONVERSION GAIN (dB) Figure 28. 3 × LO Leakage vs. LO Frequency over Three Temperatures (3 × LO to RF and 3 × LO to IF) 14115-131 20 14115-028 3 × LO LEAKAGE (dBm) Data Sheet Figure 31. Conversion Gain Distribution 100 0 HIGH-SIDE LO LOW-SIDE LO MEAN: 31.23 SD: 0.34% –5 PERCENT (%) RETURN LOSS (dBm) 80 –10 –15 –20 60 40 –25 20 1000 1500 2000 2500 0 27 14115-129 –35 500 3000 RF FREQUENCY (MHz) 28 30 31 32 33 INPUT IP3 (dBm) Figure 29. RF Port Return Loss, Fixed IF LO Return Loss Figure 32. Input IP3 Distribution 100 0 –5 MEAN: 10.59 SD: 0.39% 80 PERCENT (%) –10 –15 60 40 –20 –30 100 600 1100 1600 2100 LO FREQUENCY (MHz) 2600 0 10.0 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 INPUT P1dB (dBm) Figure 30. LO Return Loss Figure 33. Input P1dB Distribution Rev. 0 | Page 17 of 61 10.9 11.0 14115-133 20 –25 14115-130 RETURN LOSS (dB) 29 14115-132 –30 ADRF6614 Data Sheet 80 1100 8 6 700 600 500 4 400 CAPACITANCE (pF) 800 300 2 200 100 50 100 150 200 250 300 350 400 450 FREQUENCY (MHz) INPUT IP3 (dBm) 6 5 4 =0 =2 =4 =6 =8 = 10 = 12 = 14 RF FREQUENCY (MHz) 14115-035 CONVERSION GAIN (dB) 7 0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 50 45 40 35 30 25 RF FREQUENCY (MHz) Figure 35. Conversion Gain vs. RF Frequency for All RFB Settings, VGS Bit and LPF Use Optimum Settings 19 18 17 16 15 BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT Figure 38. Input IP3 vs. RF Frequency for All RFB Settings, VGS Bit and LPF Use Optimum Settings 18 =0 =2 =4 =6 =8 = 10 = 12 = 14 17 16 SSB NOISE FIGURE (dB) 20 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 40 39 38 37 36 35 34 33 32 31 30 29 28 27 BAL_COUT = 0 26 BAL_COUT = 2 25 BAL_COUT = 4 24 BAL_COUT = 6 BAL_COUT = 8 23 BAL_COUT = 10 22 BAL_COUT = 12 21 BAL_COUT = 14 20 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 8 1 55 RF FREQUENCY (MHz) 9 2 60 Figure 37. IF Channel to Channel Isolation vs. RF Frequency over Three Temperatures 10 BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT 65 20 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 Figure 34. IF Output Impedance (R Parallel C Equivalent) 3 70 14 13 12 11 10 9 8 15 BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT BAL_COUT =0 =2 =4 =6 =8 = 10 = 12 = 14 14 13 12 11 10 7 9 6 RF FREQUENCY (MHz) 8 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-036 5 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 36. Input P1dB vs. RF Frequency for All RFB Settings, VGS Bit and LPF Use Optimum Settings Figure 39. SSB Noise Figure vs. RF Frequency for All RFB Settings, VGS Bit and LPF Use Optimum Settings Rev. 0 | Page 18 of 61 14115-139 0 0 500 14115-334 0 INPUT P1dB (dBm) RESISTANCE (Ω) 900 75 14115-038 1000 14115-137 IF CHANNEL-TO-CHANNEL ISOLATION (dBc) 10 1200 Data Sheet ADRF6614 15.0 10 14.5 9 13.5 7 13.0 INPUT P1dB (dBm) 8 6 5 4 1 9.0 8.5 RF FREQUENCY (MHz) 8.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) 14.0 13.5 SSB NOISE FIGURE (dB) 13.0 VGS = 0 VGS = 1 VGS = 2 VGS = 3 VGS = 4 VGS = 5 VGS = 6 VGS = 7 RF FREQUENCY (MHz) 11.5 11.0 10.5 9.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 44. SSB Noise Figure vs. RF Frequency for All VGS Bit Settings, RFB and LPF Use Optimum Settings 15 =0 =2 =4 =6 14 13 8.0 12 INPUT P1dB (dBm) 8.5 7.5 7.0 6.5 6.0 5.5 LPF LPF LPF LPF =0 =2 =4 =6 11 10 9 5.0 8 4.5 7 4.0 3.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) 5 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 42. Conversion Gain vs. RF Frequency for All LPF Settings, RFB and VGS Bit Use Optimum Settings Figure 45. Input P1dB vs. RF Frequency for All LPF Settings, RFB and VGS Bit Use Optimum Settings Rev. 0 | Page 19 of 61 14115-149 6 3.5 14115-146 CONVERSION GAIN (dB) 9.0 12.0 9.5 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 LPF LPF LPF LPF 12.5 VGS = 0 VGS = 1 VGS = 2 VGS = 3 VGS = 4 VGS = 5 VGS = 6 VGS = 7 10.0 14115-141 INPUT IP3 (dBm) Figure 43. Input P1dB vs. RF Frequency for All VGS Bit Settings, RFB and LPF Use Optimum Settings Figure 41. Input IP3 vs. RF Frequency for All VGS Bit Settings, RFB and LPF Use Optimum Settings 9.5 11.0 10.5 9.5 Figure 40. Conversion Gain vs. RF Frequency for All VGS Bit Settings, RFB and LPF Use Optimum Settings 10.0 11.5 10.0 0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 700 12.0 14115-043 2 VGS = 0 VGS = 1 VGS = 2 VGS = 3 VGS = 4 VGS = 5 VGS = 6 VGS = 7 12.5 VGS = 0 VGS = 1 VGS = 2 VGS = 3 VGS = 4 VGS = 5 VGS = 6 VGS = 7 14115-144 3 14115-040 CONVERSION GAIN (dB) 14.0 18 17 =0 =2 =4 =6 13 12 11 8 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 49. SSB Noise Figure vs. RF Frequency for All LPF Settings, RFB and VGS Bit Use Optimum Settings 40 IFA_MAINBIAS = 13 IFA_MAINBIAS = 14 IFA_MAINBIAS = 15 IFA_MAINBIAS = 8 IFA_MAINBIAS = 9 IFA_MAINBIAS = 10 IFA_MAINBIAS = 11 IFA_MAINBIAS = 12 3 4 5 6 7 35 INPUT IP3 (dBm) 2.3 2.2 2.1 2.0 1.9 30 25 20 IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = 15 1.8 20 40 60 80 TEMPERATURE (°C) 10 –40 14115-347 0 –20 60 80 =8 =9 = 10 = 11 = 12 = 13 = 14 = 15 34 32 2.28 2.26 2.24 30 28 26 2.22 2.20 24 2.18 0 20 40 TEMPERATURE (°C) 60 80 22 –40 14115-348 –20 Figure 48. Power Dissipation vs. Temperature for Various IFA_LINBIAS Settings IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = 0 IFA_LINBIAS = 1 IFA_LINBIAS = 2 IFA_LINBIAS = 3 IFA_LINBIAS = 4 IFA_LINBIAS = 5 IFA_LINBIAS = 6 IFA_LINBIAS = 7 –20 0 20 8 9 10 11 12 13 14 15 40 TEMPERATURE (°C) 60 80 14115-351 IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS IFA_LINBIAS 0 1 2 3 4 5 6 7 2.30 2.16 –40 40 36 IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = IFA_LINBIAS = INPUT IP3 (dBm) POWER DISSIPATION (W) 2.32 20 10 11 12 13 14 15 Figure 50. Input IP3 vs. Temperature for Various IFA_MAINBIAS Settings 2.38 2.34 0 IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = TEMPERATURE (°C) Figure 47. Power Dissipation vs. Temperature for Various IFA_MAINBIAS Settings 2.36 –20 3 4 5 6 7 8 9 14115-350 IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = IFA_MAINBIAS = 2.4 1.7 –40 14115-150 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 2.7 POWER DISSIPATION (W) 15 14 9 RF FREQUENCY (MHz) 2.5 =0 =2 =4 =6 10 LPF LPF LPF LPF Figure 46. Input IP3 vs. RF Frequency for All LPF Settings, RFB and VGS Bit Use Optimum Settings 2.6 LPF LPF LPF LPF 16 SSB NOISE FIGURE (dB) 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 700 Data Sheet 14115-147 INPUT IP3 (dBm) ADRF6614 Figure 51. Input IP3 vs. Temperature for Various IFA_LINBIAS Settings Rev. 0 | Page 20 of 61 Data Sheet ADRF6614 –60 –60 890MHz +10dBm 1910MHz +10dBm 2510MHz +10dBm –70 –90 –100 –110 –120 –130 –90 –100 –110 –120 –130 –140 –140 –150 –150 0.01 0.1 1 OFFSET FREQUENCY (MHz) 10 –160 0.001 Figure 52. Phase Noise at IF Output vs. Offset Frequency with 10 dBm Blocker in Integer Mode 0.01 0.1 1 OFFSET FREQUENCY (MHz) 10 14115-353 PHASE NOISE (dBc/Hz) –80 14115-352 PHASE NOISE (dBc/Hz) –80 –160 0.001 890MHz +10dBm 1910MHz +10dBm 2510MHz +10dBm –70 Figure 53. Phase Noise at IF Output vs. Offset Frequency with 10 dBm Blocker in Fractional Mode Rev. 0 | Page 21 of 61 ADRF6614 Data Sheet MIXER, HIGH EFFICIENCY MODE TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection, optimum RFB and LPF settings, unless otherwise noted. 2.1 1.9 65 60 1.8 1.7 1.6 55 50 45 1.5 35 1.3 RF FREQUENCY (MHz) RF FREQUENCY (MHz) 13 12 11 INPUT P1dB (dBm) 12.0 TA = –40°C, HIGH-SIDE LO 11.5 TA = +25°C, HIGH-SIDE LO 11.0 TA = +85°C, HIGH-SIDE LO 10.5 TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO 10.0 T A = +85°C, LOW-SIDE LO 9.5 9.0 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 Figure 57. Input IP2 vs. RF Frequency over Three Temperatures 31 29 7 6 RF FREQUENCY (MHz) Figure 58. Input P1dB vs. RF Frequency over Three Temperatures 18 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 17 16 25 23 21 19 17 15 13 11 –40°C LOCKED –40°C EXTERNAL LO +25°C LOCKED +25°C EXTERNAL LO +85°C LOCKED +85°C EXTERNAL LO 15 14 13 12 11 10 9 9 7 5 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 56. Input IP3 vs. RF Frequency over Three Temperatures 8 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-153 INPUT IP3 (dBm) 27 8 3 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 SSB NOISE FIGURE (dB) 33 9 4 Figure 55. Conversion Gain vs. RF Frequency over Three Temperatures 35 10 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 5 14115-152 CONVERSION GAIN (dB) Figure 54. Power Dissipation vs. RF Frequency over Three Temperatures 14115-155 RF FREQUENCY (MHz) 30 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 14115-151 1.2 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 TA = –40°C, HIGH-SIDE LO TA = +25°C, HIGH-SIDE LO TA = +85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = +25°C, LOW-SIDE LO TA = +85°C, LOW-SIDE LO 14115-357 40 1.4 RF FREQUENCY (MHz) 14115-156 POWER DISSIPATION (W) 2.0 70 TA = –40°C, HIGH-SIDE LO TA = 25°C, HIGH-SIDE LO TA = 85°C, HIGH-SIDE LO TA = –40°C, LOW-SIDE LO TA = 25°C, LOW-SIDE LO TA = 85°C, LOW-SIDE LO INPUT IP2 (dBm) 2.2 Figure 59. SSB Noise Figure vs. RF Frequency over Three Temperatures Rev. 0 | Page 22 of 61 Data Sheet ADRF6614 SYNTHESIZER VS = high performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fPFD = 1.536 MHz, fREF power = 4 dBm, integer mode loop filter, unless otherwise noted. –60 –80 –100 –120 –140 –160 –180 1k 10k 100k 1M 10M 100M OFFSET FREQUENCY (Hz) Figure 60. VCO_0 Open-Loop Phase Noise vs. Offset Frequency, fVCO_0 = 2.55 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V –110 –120 –130 –140 –150 0.01 0.1 1 10 100 OFFSET FREQUENCY (MHz) –100 –120 –140 –160 10k 100k 1M 10M 100M Figure 61. VCO_1 Open-Loop Phase Noise vs. Offset Frequency, fVCO_1 = 2.2 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V –80 –90 –100 –110 –120 –130 –140 –150 –160 0.001 0.01 0.1 1 10 100 OFFSET FREQUENCY (MHz) Figure 64. VCO_1 Closed-Loop Phase Noise vs. Offset Frequency for Various LO_DIV Dividers, fVCO_1 = 4.5 GHz –40 CLOSED-LOOP PHASE NOISE (dBc/Hz) –60 –60 –80 –100 –120 –140 10k 100k 1M 10M 100M OFFSET FREQUENCY (Hz) Figure 62. VCO_2 Open-Loop Phase Noise vs. Offset Frequency, fVCO_2 = 1.9 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V –70 LO_DIV = ÷2 LO_DIV = ÷4 LO_DIV = ÷8 –80 –90 –100 –110 –120 –130 –140 –150 –160 0.001 14115-159 –160 1k LO_DIV = ÷2 LO_DIV = ÷4 LO_DIV = ÷8 0.01 0.1 1 OFFSET FREQUENCY (MHz) 10 100 14115-062 1k –70 14115-061 CLOSED-LOOP PHASE NOISE (dBc/Hz) –80 14115-158 OPEN-LOOP PHASE NOISE (dBc/Hz) –100 –60 OFFSET FREQUENCY (Hz) OPEN-LOOP PHASE NOISE (dBc/Hz) –90 Figure 63. VCO_0 Closed-Loop Phase Noise vs. Offset Frequency for Various LO_DIV Dividers, fVCO_0 = 5.1 GHz –60 –180 LO_DIV = ÷2 LO_DIV = ÷4 LO_DIV = ÷8 –80 –160 0.001 –40 –180 –70 14115-060 CLOSED-LOOP PHASE NOISE (dBc/Hz) –60 14115-157 OPEN-LOOP PHASE NOISE (dBc/Hz) –40 Figure 65. VCO_2 Closed-Loop Phase Noise vs. Offset Frequency for Various LO_DIV Dividers, fVCO_2 = 3.8 GHz Rev. 0 | Page 23 of 61 ADRF6614 Data Sheet –60 –80 –100 –120 –140 10k 100k 1M 10M 100M OFFSET FREQUENCY (Hz) Figure 66. VCO_3 Open-Loop Phase Noise vs. Offset Frequency, fVCO_3 = 1.6 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V –130 –140 –150 0.01 0.1 1 10 100 OFFSET FREQUENCY (MHz) CLOSED-LOOP PHASE NOISE (dBc/Hz) OPEN-LOOP PHASE NOISE (dBc/Hz) –120 –60 –40 –60 –80 –100 –120 –140 –160 –70 –80 –40°C +25°C +85°C –90 –100 –110 –120 –130 –140 –150 –160 –170 100k 1M 10M 100M –180 0.001 14115-567 10k OFFSET FREQUENCY (Hz) Figure 67. VCO_4 Open-Loop Phase Noise vs. Offset Frequency, fVCO_4 = 3.087 GHz, Divide by One Selected, VCOVTUNE = 1.5 V 0.01 0.1 1 10 100 OFFSET FREQUENCY (MHz) Figure 70. VCO_4 Closed-Loop Phase Noise for Various Temperatures vs. Offset Frequency, fVCO_4 = 1.536 GHz, Divide by Two Selected 0 –60 CLOSED-LOOP PHASE NOISE (dBc/Hz) –20 –40 –60 –80 –100 –120 –140 –160 –70 –80 –40°C +25°C +85°C –90 –100 –110 –120 –130 –140 –150 –160 –170 10k 100k 1M 10M 100M OFFSET FREQUENCY (Hz) Figure 68. VCO_5 Open-Loop Phase Noise vs. Offset Frequency, fVCO_5 = 3.375 GHz, Divide by One Selected, VCOVTUNE = 1.5 V –180 0.001 14115-568 OPEN-LOOP PHASE NOISE (dBc/Hz) –110 Figure 69. VCO_3 Closed-Loop Phase Noise for Various LO_DIV Dividers vs. Offset Frequency, fVCO_3 = 3.2 GHz –20 –180 1k –90 –100 –160 0.001 0 –180 1k –80 14115-570 1k LO_DIV = ÷2 LO_DIV = ÷4 LO_DIV = ÷8 0.01 0.1 1 OFFSET FREQUENCY (MHz) 10 100 14115-571 –160 –70 14115-066 CLOSED-LOOP PHASE NOISE (dBc/Hz) –60 14115-163 OPEN-LOOP PHASE NOISE (dBc/Hz) –40 Figure 71. VCO_5 Closed-Loop Phase Noise for Various Temperatures vs. Offset Frequency, fVCO_5 = 1.688 GHz, Divide by Two Selected Rev. 0 | Page 24 of 61 Data Sheet –90 –210 –215 –220 –230 1430 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) –130 1MHz OFFSET –140 –160 –170 1430 2230 2030 1830 2430 2630 2830 Figure 75. Open-Loop Phase Noise vs. LO Frequency, Divide by Two Selected –70 –80 –40°C +25°C +85°C 1kHz OFFSET –90 –40 1kHz OFFSET PHASE NOISE (dBc/Hz) OPEN-LOOP PHASE NOISE (dBc/Hz) 1630 LO FREQUENCY (MHz) –40°C +25°C +85°C –20 40MHz OFFSET –150 Figure 72. PLL Figure of Merit (FOM) vs. LO Frequency, Integer Mode 0 200kHz OFFSET –120 14115-367 –225 50kHz OFFSET –110 –60 –80 –100 100kHz OFFSET –120 500kHz OFFSET –140 –100 100kHz OFFSET –110 –120 500kHz OFFSET –130 –140 10 MHz OFFSET –150 10MHz OFFSET –160 –160 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) Figure 73. Open-Loop Phase Noise vs. LO Frequency, Divide by Two Selected –200 –170 1430 14115-165 –180 1430 1830 1630 2030 2230 2430 2630 LO FREQUENCY (MHz) 14115-069 FOM (dBc/Hz/Hz) –205 –40°C +25°C +85°C –100 OPEN-LOOP PHASE NOISE (dBc/Hz) –40°C +25°C +85°C 14115-168 –200 ADRF6614 Figure 76. Integer Loop Filter Phase Noise vs. LO Frequency, Divide by Two Selected, Offset = 1 kHz, 100 kHz, 500 kHz, and 10 MHz –60 –40°C +25°C +85°C –80 –205 –40°C +25°C +85°C PHASE NOISE (dBc/Hz) FOM (dBc/Hz/Hz) 1kHz OFFSET –210 –215 –220 –100 100kHz OFFSET –120 500kHz OFFSET –140 –160 –225 1630 1830 2030 2230 2430 LO FREQUENCY (MHz) 2630 2830 –180 1525 14115-470 –230 1430 Figure 74. PLL Figure of Merit (FOM) vs. LO Frequency, Fractional Mode, Offset = 45 kHz, Bleed = 125 µA 1530 1535 1540 LO FREQUENCY (MHz) 1545 14115-580 10MHz OFFSET Figure 77. VCO_4 GSM Loop Filter Phase Noise, Divide by Two Selected, Offset = 1 kHz, 100 kHz, 500 kHz, and 10 MHz Rev. 0 | Page 25 of 61 ADRF6614 1.2 INTEGRATED PHASE NOISE, WITH SPURS (°rms) 50 kHz OFFSET PHASE NOISE (dBc/Hz) –100 –110 200 kHz OFFSET –120 –130 1MHz OFFSET –140 –150 40MHz OFFSET –40°C +25°C +85°C LO_DIV = ÷2 1.0 0.8 0.6 0.4 0.2 –160 LO_DIV = ÷4 1630 1830 2030 2230 2630 2430 LO FREQUENCY (Hz) –100 –40°C +25°C +85°C PHASE NOISE (dBc/Hz) 50kHz OFFSET –110 –120 200kHz OFFSET –130 –140 1MHz OFFSET –150 –160 –170 1525 1530 1535 1540 1545 LO FREQUENCY (MHz) 0.40 0.35 –40°C +25°C +85°C 0.25 0.20 0.15 0.10 0.05 0 1525 –90 1kHz OFFSET 1530 100kHz OFFSET 500kHz OFFSET –140 1535 1540 1545 –40°C +25°C +85°C –100 –120 5360 0.30 –80 –40°C +25°C +85°C –100 LO_DIV = ÷8 4860 Figure 82. VCO_4 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, For Various Temperatures, Including Spurs PHASE NOISE (dBc/Hz) PHASE NOISE (dBc/Hz) –80 4360 LO FREQUENCY (MHz) Figure 79. VCO_4 GSM Loop Filter Phase Noise, Divide by Two Selected, Offset = 50 kHz, 200 kHz, 1 MHz, and 40 MHz –60 3860 Figure 81. 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, Divide by Two, Four, and Eight, Including Spurs 14115-583 40MHz OFFSET 3360 VCO FREQUENCY (MHz) INTEGRATED PHASE NOISE WITH SPURS (°rms) Figure 78. Integer Loop Filter Phase Noise vs. LO Frequency, Divide by Two Selected, Offset = 50 kHz, 200 kHz, 1 MHz, and 40 MHz –90 0 2860 14115-072 –170 1430 14115-070 –90 1.4 –40°C +25°C +85°C 14115-586 –80 Data Sheet 50kHz OFFSET –110 –120 200kHz OFFSET –130 –140 1MHz OFFSET –150 1673 1678 1683 1688 1693 LO FREQUENCY (MHz) –160 1698 1703 1708 –170 1668 14115-584 –180 1668 10MHz OFFSET Figure 80. VCO_5 GSM Loop Filter Phase Noise, Divide by Two Selected, Offset = 1 kHz, 100 kHz, 500 kHz, and 10 MHz 40MHz OFFSET 1673 1678 1683 1688 1693 LO FREQUENCY (MHz) 1698 1703 1708 14115-587 –160 Figure 83. VCO_5 GSM Loop Filter Phase Noise, Divide by Two Selected, Offset = 50 kHz, 200 kHz, 1 MHz, and 40 MHz Rev. 0 | Page 26 of 61 Data Sheet 0.6 0.4 0.2 LO_DIV = ÷8 LO_DIV = ÷4 3360 3860 4360 4860 5360 VCO FREQUENCY (MHz) –105 –115 –125 –135 2860 14115-073 0 2860 –95 REFERENCE SPURS (dBc), 3 × PFD OFFSET 0.30 0.25 0.20 0.15 0.10 0.05 0 1525 1530 1535 1540 1545 LO FREQUENCY (MHz) –85 0.30 0.25 0.20 0.15 0.10 0.05 1673 1678 1683 1688 1693 1698 1703 1708 LO FREQUENCY (MHz) –40°C LO_DIV = ÷8 +25°C LO_DIV = ÷8 +85°C LO_DIV = ÷8 –105 –115 –125 3360 3860 4360 4860 5360 VCO FREQUENCY (MHz) INTEGRATED PHASE NOISE WITHOUT SPURS (° rms) –40°C +25°C +85°C 0.35 0 1668 5360 Figure 88. fPFD Reference Spurs vs. VCO Frequency, 3 × PFD Offset, Measured at LO Output, Integer Mode 14115-590 INTEGRATED PHASE NOISE WITH SPURS (°rms) 0.40 4860 –95 Figure 85. VCO_4 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, For Various Temperatures, Excluding Spurs 0.45 –40°C LO_DIV = ÷2 +25°C LO_DIV = ÷2 +85°C LO_DIV = ÷2 –40°C LO_DIV = ÷4 +25°C LO_DIV = ÷4 +85°C LO_DIV = ÷4 –135 2860 14115-589 INTEGRATED PHASE NOISE WITHOUT SPURS (°rms) 0.35 4360 Figure 87. fPFD Reference Spurs vs. VCO Frequency, 1 × PFD Offset, Measured at LO Output, Integer Mode –75 –40°C +25°C +85°C 3860 VCO FREQUENCY (MHz) Figure 84. 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, Divide by Two, Four, and Eight, Excluding Spurs 0.40 3360 14115-071 0.8 –85 –40°C LO_DIV = ÷8 +25°C LO_DIV = ÷8 +85°C LO_DIV = ÷8 14115-075 LO_DIV = ÷2 1.0 –40°C LO_DIV = ÷2 +25°C LO_DIV = ÷2 +85°C LO_DIV = ÷2 –40°C LO_DIV = ÷4 +25°C LO_DIV = ÷4 +85°C LO_DIV = ÷4 Figure 86. VCO_5 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, For Various Temperatures, Including Spurs 0.45 0.40 –40°C +25°C +85°C 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 1668 1673 1678 1683 1688 1693 1698 1703 1708 LO FREQUENCY (MHz) Figure 89. VCO_5 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency, For Various Temperatures, Excluding Spurs Rev. 0 | Page 27 of 61 14115-593 INTEGRATED PHASE NOISE, WITHOUT SPURS (°rms) 1.2 –75 –40°C +25°C +85°C REFERENCE SPURS (dBc), 1 × PFD OFFSET 1.4 ADRF6614 ADRF6614 –105 –115 –125 3360 3860 4360 4860 5360 VCO FREQUENCY (MHz) –66 –68 –70 –72 –74 –76 –78 –80 1430 –70 –40°C LO_DIV = /8 +25°C LO_DIV = /8 +85°C LO_DIV = /8 REFERENCE SPURS (dBc), 3 × PFD OFFSET –85 –95 –105 –115 –125 –135 2860 3360 3860 4360 4860 5360 VCO FREQUENCY (MHz) –80 –85 1830 2030 2230 2430 2630 2830 –76 –78 –80 –82 –84 –86 –88 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) REFERENCE SPURS (dBc), 4 × PFD OFFSET –75 1630 2630 –74 –90 1430 2830 LO FREQUENCY (MHz) –40°C +25°C +85°C –76 –78 –80 –82 –84 –86 –88 –90 1430 14115-379 REFERENCE SPURS (dBc), 1 × PFD OFFSET –70 –90 1430 2430 Figure 94. fPFD Reference Spurs vs. LO Frequency, 3 × PFD Offset, Measured at LO Output, Fractional Mode –40°C +25°C +85°C –65 2230 –40°C +25°C +85°C –72 Figure 91. fPFD Reference Spurs vs. VCO Frequency, 4 × PFD Offset, Measured at LO Output, Integer Mode –60 2030 Figure 93. fPFD Reference Spurs vs. LO Frequency, 2 × PFD Offset, Measured at LO Output, Fractional Mode 14115-078 REFERENCE SPURS (dBc), 4 × PFD OFFSET –40°C LO_DIV = /2 +25°C LO_DIV = /2 +85°C LO_DIV = /2 –40°C LO_DIV = /4 +25°C LO_DIV = /4 +85°C LO_DIV = /4 1830 LO FREQUENCY (MHz) Figure 90. fPFD Reference Spurs vs. VCO Frequency, 2 × PFD Offset, Measured at LO Output, Integer Mode –75 1630 14115-380 –135 2860 –64 14115-382 –95 –40°C +25°C +85°C –62 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) Figure 92. fPFD Reference Spurs vs. LO Frequency, 1 × PFD Offset, Measured at LO Output, Fractional Mode Figure 95. fPFD Reference Spurs vs. LO Frequency, 4 × PFD Offset, Measured at LO Output, Fractional Mode Rev. 0 | Page 28 of 61 14115-383 –85 –60 –40°C LO_DIV = ÷8 +25°C LO_DIV = ÷8 +85°C LO_DIV = ÷8 REFERENCE SPURS (dBc), 2 × PFD OFFSET –40°C LO_DIV = ÷2 +25°C LO_DIV = ÷2 +85°C LO_DIV = ÷2 –40°C LO_DIV = ÷4 +25°C LO_DIV = ÷4 +85°C LO_DIV = ÷4 14115-078 REFERENCE SPURS (dBc), 4 × PFD OFFSET –75 Data Sheet Data Sheet 0 IF AT –40°C IF AT +25°C IF AT +85°C LO AT –40°C LO AT +25°C LO AT +85°C –20 –10 –20 –40 ISOLATION (dB) –30 –60 –80 –40 –50 –60 –70 –100 –80 –120 –90 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) –100 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900 RF FREQUENCY (MHz) Figure 96. fPFD Reference Spurs vs. LO Frequency, Divide by Two Selected, 1 × PFD Offset, Measured on LO Output and IF Output 10 LO_DRV_LVL = 0 AT –40°C LO_DRV_LVL = 0 AT +25°C LO_DRV_LVL = 0 AT +85°C 8 14115-387 –140 1430 14115-384 REFERENCE SPURS (dBc), 1 × PFD OFFSET 0 ADRF6614 Figure 99. RF to LO Output Feedthrough, LO_DRV_LVL = 0 1520 LO_DRV_LVL = 1 AT –40°C LO_DRV_LVL = 1 AT +25°C LO_DRV_LVL = 1 AT +85°C 1515 4 LO FREQUENCY (MHz) LO AMPLITUDE (dBm) 3 2 0 –2 –4 –6 1510 1505 1500 1495 1490 –8 1350 1850 2350 1485 2850 LO FREQUENCY (MHz) 1480 LO_DRV_LVL = 3 AT LO_DRV_LVL = 3 AT LO_DRV_LVL = 3 AT LO_DRV_LVL = 2 AT LO_DRV_LVL = 2 AT LO_DRV_LVL = 2 AT 185 175 165 155 135 125 350 LO_DRV_LVL = 1 AT LO_DRV_LVL = 1 AT LO_DRV_LVL = 1 AT LO_DRV_LVL = 0 AT LO_DRV_LVL = 0 AT LO_DRV_LVL = 0 AT 850 50 60 70 80 90 100 1510 1505 1500 1495 1490 –40°C +25°C +85°C –40°C +25°C +85°C 1350 40 1515 195 145 30 1520 –40°C +25°C +85°C –40°C +25°C +85°C LO FREQUENCY (MHz) 205 20 Figure 100. LO Frequency Settling Time, Integer Mode Loop Filter, Integer Mode 1485 1850 2350 LO FREQUENCY (MHz) Figure 98. Supply Current for VCC7 vs. LO Frequency, LO_DRV_LVL = 0, 1, 2, and 3 2850 1480 14115-386 VCC7 SUPPLY CURRENT (mA) 215 10 LOCK TIME (ms) Figure 97. LO Amplitude vs. LO Frequency, LO_DRV_LVL = 0, 1, 2, and 3 225 0 14115-388 850 LO_DRV_LVL = 3 AT –40°C LO_DRV_LVL = 3 AT +25°C LO_DRV_LVL = 3 AT +85°C 0 0.5 1.0 1.5 2.0 2.5 3.0 LOCK TIME (ms) 3.5 4.0 4.5 5.0 14115-389 –12 350 LO_DRV_LVL = 2 AT –40°C LO_DRV_LVL = 2 AT +25°C LO_DRV_LVL = 2 AT +85°C 14115-500 –10 Figure 101. LO Frequency Settling Time, Fractional Loop Filter, Fractional Mode Rev. 0 | Page 29 of 61 ADRF6614 2.5 Data Sheet –60 +85°C –40°C –70 3.18GHz 3.81GHz 4.45GHz 5.08GHz 2.0 PFD SPURS (dBc) VTUNE (V) –80 1.5 1.0 –90 –100 –110 –120 0.5 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) –140 –100 14115-187 0 1430 –60 –40 –20 0 20 40 60 80 100 OFFSET FREQUENCY (MHz) Figure 102. VCO Tuning Voltage (VTUNE) vs. LO Frequency for Lock at Cold Drift to Hot 2.5 –80 14115-189 –130 Figure 104. PFD Spurs vs. Offset Frequency for Four VCOs, Integer Mode 3.5 +85°C –40°C +85°C –40°C 3.0 2.0 VTUNE (V) 1.5 1.0 2.0 1.5 1.0 0.5 0 1430 1630 1830 2030 2230 2430 2630 2830 LO FREQUENCY (MHz) Figure 103. VTUNE vs. LO Frequency for Lock at Hot Drift to Cold 0 1525 1530 1535 1540 LO FREQUENCY (MHz) 1545 14115-617 0.5 14115-188 VTUNE (V) 2.5 Figure 105. VCO_4 VTUNE vs. LO Frequency for Lock at Hot Drift to Cold Rev. 0 | Page 30 of 61 Data Sheet ADRF6614 3.5 3.5 +85°C –40°C 3.0 2.5 2.5 2.0 1.5 2.0 1.5 1.0 1.0 0.5 0.5 0 1668 1673 1678 1683 1688 1693 1698 1703 LO FREQUENCY (MHz) 1708 0 1668 Figure 106. VCO_5 VTUNE vs. LO Frequency for Lock at Hot Drift to Cold +85°C –40°C VTUNE (V) 2.5 2.0 1.5 1.0 1535 1540 1545 14115-619 0.5 LO FREQUENCY (MHz) 1683 1688 1693 1698 1703 1708 Figure 108. VCO_5 VTUNE vs. LO Frequency for Lock at Cold Drift to Hot 3.0 1530 1678 LO FREQUENCY (MHz) 3.5 0 1525 1673 14115-620 VTUNE (V) 3.0 14115-618 VTUNE (V) +85°C –40°C Figure 107. VCO_4 VTUNE vs. LO Frequency for Lock at Cold Drift to Hot Rev. 0 | Page 31 of 61 ADRF6614 Data Sheet SPURIOUS PERFORMANCE (N × fRF) − (M × fLO) spur measurements were made using the standard evaluation board. Mixer spurious products are measured in dBc from the IF output power level. Data was measured only for frequencies less than 6 GHz; blank cells indicate frequencies that were not measured. Typical noise floor of the measurement system = −100 dBm. High Performance Mode VS = high performance mode, TA = 25°C, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection, optimum RFB and LPF settings, unless otherwise noted. Table 11. RF = 900 MHz, LO = 697 MHz M 0 N 0 1 2 3 4 5 6 7 8 9 −35.5 −55.3 −88.2