CMP04FS

a Quad Low Power, Precision Comparator CMP04 FEATURES High Gain: 200 V/mV Typ Single- or Dual-Supply Operation Input Voltage Range Includes Ground Low Power Consumption (1.5 mW/Comparator) Low Input Bias Current: 100 nA Max Low Input Offset Current: 10 nA Max Low Offset Voltage: 1 mV Max Low Output Saturation Voltage: 250 mV @ 4 mA Logic Output Compatible with TTL, DTL, ECL, MOS, and CMOS Directly Replaces LM139/LM239/LM339 Comparators PIN CONNECTIONS 14-Lead SOIC OUT 2 1 14 OUT 3 OUT 1 2 13 OUT 4 12 GND IN 1– 4 11 IN 4+ IN 1+ 5 10 IN 4– 9 IN 3+ 8 IN 3– V+ 3 IN 2– 6 4 1 2 3 IN 2+ 7 CMP04 GENERAL DESCRIPTION TYPICAL INTERFACE Four precision independent comparators comprise the CMP04. Performance highlights include a very low offset voltage, low output saturation voltage, and high gain in a single-supply design. The input voltage range includes ground for singlesupply operation and V– for split supplies. A low power supply current of 2 mA, which is independent of supply voltage, makes this the preferred comparator for precision applications requiring minimal power consumption. Maximum logic interface flexibility is offered by the open-collector TTL output. 5.0 3 12 Figure 2a. Driving CMOS 5.0 V+ 3.5␮A 100␮A 3.5␮A 3 100␮A OUTPUT Q8 Q2 Q3 Q1 +INPUT 1/4 SN7400 –INPUT Q7 Q5 10k⍀ 1/4 CMP04 12 Q4 * 1/4 CD4011 100k⍀ 1/4 CMP04 * Figure 2b. Driving TTL Q6 *SUBSTRATE DIODES Figure 1. Simplified Schematic (1/4 CMP04) Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com CMP04–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter (@ V+ = 5 V, TA = 25ⴗC, unless otherwise noted.) Symbol Conditions Input Offset Voltage Input Offset Current Input Bias Current Voltage Gain Large Signal Response Time VOS IOS IB AV tr Small Signal Response Time tr Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Saturation Voltage Output Sink Current Output Leakage Current Supply Current CMVR CMRR PSRR VOL ISINK ILEAK I+ RS = 0 Ω, RL = 5.1 kΩ, VO = 1.4 V IIN(+) – IIN(–), RL = 5.1 kΩ, VO = 1.4 V IIN(+) or IIN(–) RL ≥ 15 kΩ, V+ = 15 V2 VIN = TTL Logic Swing, VREF = 1.4 V3 VRL = 5 V, RL = 5.1 kΩ VIN = 100 mV Step3, 5 mV Overdrive VRL = 5 V, RL = 5.1 kΩ Note 4 Notes 2, 5 V+ = 5 V to 18 V2 VIN(–) ≥ 1 V, VIN(+) = 0, ISINK ≤ 4 mA VIN(–) ≥ 1 V, VIN(+) = 0, VO ≤ 1.5 V VIN(+) ≥ 1 V, VIN(–) = 0, VO = 30 V RL = ∞, All Comps V+ = 30 V Min Typ Max Unit 1 10 100 80 0.4 2 25 200 mV nA nA V/mV 1 300 ns 1.3 0 80 80 6 V+ – 1.5 100 100 250 16 0.1 0.8 400 100 2.0 µs V dB dB mV mA nA mA NOTES 1 At output switch point, V O = 1.4 V, RS = 0 Ω with V+ from 5 V, and over the full input common-mode range (0 V to V+ – 1.5 V). 2 Guaranteed by design. 3 Sample tested. 4 The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is V+ – 1.5 V, but either or both inputs can go to 30 V without damage. 5 RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +36 V or ± 18 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 36 V dc Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +36 V Operating Temperature Range CMP04FSZ . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Input Current (VIN < –3.0 V) . . . . . . . . . . . . . . . . . . . 50 mA Output Short Circuit to GND . . . . . . . . . . . . . . . . Continuous Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300°C Package Type ␪JA2 ␪JC Unit 14-Lead SOIC 120 36 °C/W NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device soldered to printed circuit board for SOIC package. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the CMP04 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –2– WARNING! ESD SENSITIVE DEVICE REV. E CMP04 ELECTRICAL CHARACTERISTICS (@ V+ = 5 V, –40ⴗC ≤ T ≤ +85ⴗC for CMP04FSZ, unless otherwise noted.) A Parameter Symbol Conditions Min Input Offset Voltage VOS Input Offset Current IOS Input Bias Current Voltage Gain Large Signal Response Time IB AV tr Small Signal Response Time tr Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Saturation Voltage CMVR CMRR PSRR VOL Output Sink Current ISINK Output Leakage Current ILEAK Supply Current I+ RS = 0 Ω, RL = 5.1 kΩ VO = 1.4 V2 IIN(+) – IIN(–) RL = 5.1 kΩ VO = 1.4 V IIN(+) or IIN(–) RL ≥ 15 kΩ, V+ = 15 V3 VIN = TTL Logic Swing VREF = 1.4 V4 VRL = 5 V, RL = 5.1 kΩ VIN = 100 mV Step4 5 mV Overdrive VRL = 5 V, RL = 5.1 kΩ Note 5 Notes 1, 3 V+ = 5 V to 18 V VIN(–) ≥ 1 V, VIN(+) = 0, ISINK ≤ 4 mA VIN(–) ≥ 1 V, VIN(+) = 0, VO ≤ 1.5 V VIN(+) ≥ 1 V, VIN(–) = 0, VO = 30 V RL = ∞, All Comps V+ = 30 V 70 0 60 80 5 5 CMP04FSZ1 Typ 1 1 4 4 4 40 125 300 300 300 1.3 1.3 1.3 Max Unit 2 2 20 20 20 200 mV mV nA nA nA nA V/mV ns ns ns µs µs µs V dB dB mV mV mA mA nA nA mA mA V+ – 1.5 100 100 250 250 16 16 0.1 0.1 1.2 1.2 700 700 200 200 3.0 3.0 NOTES 1 RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V. 2 At output switch point, V O = 1.4 V, RS = 0 Ω with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V). 3 Guaranteed by design. 4 Sample tested. 5 The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is V+ – 1.5 V, but either or both inputs can go to +30 V without damage. Specifications subject to change without notice. –18V –18V 3.6k⍀ 3.6k⍀ 14 13 12 11 10 9 8 6 7 4 1 CMP04 2 3 1 100k⍀ 2 3.6k⍀ 3 4 5 3.6k⍀ +18V ONE EACH PER BOARD +18V ZENER 5.8V TO 6.2V 1 WATT 470k⍀ 30V TO ADJACENT SOCKETS MIL-STD-883, METHOD 1015, CONDITION B Figure 3. Burn-In Circuit REV. E –3– CMP04–Typical Performance Characteristics 0.2 0.1 0 –0.1 –0.2 IOS – INPUT OFFSET CURRENT (nA) IB – INPUT BIAS CURRENT (nA) 60 TA = 0ⴗC 40 TA = +25ⴗC/70ⴗC 20 1.0 0 –1.0 –2.0 –3.0 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (ⴗC) 0 –0.3 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (ⴗC) 0 TPC 1. Offset Voltage vs. Temperature 10 25 30 35 15 20 V+ – SUPPLY VOLTAGE (VDC) 5 40 TPC 2. Input Bias Current vs. V+ and Temperature TPC 3. Input Offset Current vs. Temperature 10 1.1 160 150 SUPPLY CURRENT (mA) 140 130 120 110 100 90 80 TA = 0ⴗC 0.9 0.7 TA = +25ⴗC TA = +70ⴗC 0.5 70 0.1 60 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (ⴗC) 0 5 10 20 25 30 15 SUPPLY VOLTAGE (VDC) 35 INPUT VOLTAGE VIN (mV) 4.0 5VDC 20mV VIN 3.0 5.1k⍀ 2.0 VOUT 100mV 1.0 0 0 –50 –100 0.5 1.0 TIME (␮s) 1.5 TA = +25ⴗC 0.1 1.0 10 IO – OUTPUT SINK CURRENT (mA) 5.0 100 TPC 6. Output Voltage vs. Output Current and Temperature INPUT OVERDRIVE = 100mV TA = 25ⴗC 4.0 20mV 3.0 5mV 2.0 1.0 5VDC 0 5.1k⍀ VIN 0 VOUT –50 –100 TA = 25ⴗC 0 0.1 6.0 INPUT OVERDRIVE = 5.0mV OUTPUT VOLTAGE VO (V) OUTPUT VOLTAGE VO (V) 6.0 5.0 1.0 0.001 0.01 40 TPC 5. Supply Current vs. Supply Voltage TPC 4. Voltage Gain vs. Temperature OUT OF SATURATION 0.01 0.3 INPUT VOLTAGE VIN (mV) AV – VOLTAGE GAIN (V/mV) 2.0 VOL – SATURATION VOLTAGE (VDC) VOS – OFFSET VOLTAGE (mV) 3.0 80 0.3 2.0 0 0.5 1.0 TIME (␮s) 1.5 2.0 TPC 8. Response Time for Various Input Overdrives—Positive Transition TPC 7. Response Time for Various Input Overdrives—Negative Transition –4– REV. E CMP04 TYPICAL APPLICATIONS V+ V+ +VIN 3k⍀ 1/4 CMP04 6.2k⍀ 1M⍀ 1/4 CMP04 V+ VO VO 1M⍀ STROBE INPUT * 1M⍀ *OR LOGIC WITHOUT PULLUP RESISTOR Figure 4. Output Strobing Figure 7. Inverting Comparator with Hysteresis V+ 2R S +VREF HIGH 100k⍀ 1/4 CMP04 +VIN 75pF 4.3k⍀ V+ 0 1/4 CMP04 RS f = 186kHz VO 2R S 100k⍀ 100k⍀ 1/4 CMP04 V+ 100k⍀ +VREF LOW Figure 5. Limit Comparator Figure 8. Square Wave Oscillator V+ V+ 100k⍀ VIN1 +VREF 3k⍀ 10k⍀ 5.1k⍀ 1/4 CMP04 +VIN 100k⍀ VIN2 1N914 1/4 CMP04 VO VO 10M⍀ Figure 6. Noninverting Comparator with Hysteresis REV. E Figure 9. Comparing Input Voltages of Opposite Polarity –5– CMP04 V+ V+ V+ 0 t0 1M⍀ 10k⍀ 100pF V+ +VIN 1N914 1ms 1/4 CMP04 1M⍀ D1 1N914 R2 100k⍀ D2 1N914 15k⍀ PW t0 80pF 0 t1 V+ 1/4 CMP04 VO 0.01␮F R1 1M⍀ 1M⍀ t0 t1 0 t2 V+ 1N914 1M⍀ Figure 10. One-Shot Multivibrator Figure 12. Pulse Generator V+ V+ 39k⍀ 100k⍀ A V+ 1k⍀ 0.375V 100k⍀ 200k⍀ 3k⍀ 100k⍀ A 1/4 CMP04 f V+ 0 1 0.075V 1k⍀ 100k⍀ 3k⍀ 1/4 CMP04 f B B 0 FOR LARGE RATIOS OF R1/R2, D1 CAN BE OMITTED. 1M⍀ 1M⍀ 1k⍀ 100k⍀ C 0 1=A•B•C 0 1k⍀ 100k⍀ 1 1=A+B+C C Figure 11. AND Gate Figure 13. OR Gate V+ 1M⍀ 4V 0 560k⍀ 10M⍀ +VIN 1S 1M⍀ 100k⍀ 100k⍀ 1/4 CMP04 100pF 15k⍀ 1/4 CMP04 V+ T VO 10M⍀ 240k⍀ t0 t1 0 T = 0.3ms 62k⍀ Figure 14. One-Shot Multivibrator with Input Lockout –6– REV. E CMP04 V+ V+ 10k⍀ 15k⍀ 200k⍀ V+ V3 10k⍀ V2 VC1 V3 V1 0 3.0k⍀ 10M⍀ t0 t1 t2 t3 +VIN t4 3.0k⍀ 10M⍀ V+ V+ t0 t0 VO3 V+ 51k⍀ t4 10k⍀ 0 0 1/4 CMP04 10k⍀ 1/4 CMP04 C1 0.001␮F V2 0 1/4 CMP04 t 0 t2 VO2 V+ INPUT GATING SIGNAL 51k⍀ 10M⍀ 3.0k⍀ V+ 10k⍀ V1 0 1/4 CMP04 51k⍀ Figure 15. Time Delay Generator REV. E –7– VO1 t 0 t1 t3 CMP04 Data Sheet OUTLINE DIMENSIONS 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 16. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 CMP04FSZ CMP04FSZ-REEL 1 TA = 25°C, VOS 1 mV 1 mV Temperature Range −40°C to +85°C −40°C to +85°C Package Description 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] Package Option R-14 R-14 Z = RoHS Compliant Part. REVISION HISTORY 10/2018—Rev. D to Rev. E Changed CMP04FS and CMP04F to CMP04FSZ .... Throughout Updated Outline Dimensions .......................................................... 8 Moved Ordering Guide .................................................................... 8 Changes to Ordering Guide ............................................................. 8 3/2003—REV. C to REV. D Renumbered TPCs and Figures............................................. Global Deletion of 14-Lead CERDIP and 14-Lead PDIP Information .............................................................................. Global Changes to Features .......................................................................... 1 Changes to Pin Connections .......................................................... 1 Changes to Absolute Maximum Ratings........................................ 2 Changes to Ordering Guide ............................................................ 2 Changes to Electrical Characteristics ............................................. 3 Removal of Dice Characteristics, Wafer Test Limits, and Typical Electrical Characteristics Sections ................................................. 4 Changes to TPCs 2, 5, and 6 ............................................................ 4 Updated Outline Dimensions.......................................................... 8 ©2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00266-0-10/18(E) Rev. E | Page 8 of 8