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LT8336EV#PBF

LT8336EV#PBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    TFQFN16_EP

  • 描述:

    LT8336EV#PBF

  • 数据手册
  • 价格&库存
LT8336EV#PBF 数据手册
LT8336 40V, 2.5A, Low IQ Synchronous Step-Up Silent Switcher with PassThru FEATURES DESCRIPTION Silent Switcher® Architecture n Ultralow EMI Emissions n Optional Spread Spectrum Frequency Modulation n Integrated 40V, 2.5A Power Switches n Wide Input/Output Voltage Range: 2.7V to 40V n Low V Pin Quiescent Current: IN n 0.3µA in Shutdown n 4µA in Burst Mode® Operation n 15µA in PassThru™ Operation n 100% Duty Cycle Capability for Synchronous MOSFET n Adjustable and Synchronizable: 300kHz to 3MHz n Pulse-Skipping or Burst Mode Operation at Light Load n Output Soft-Start and Power Good Monitor n Internal Compensation n Accurate 1V Enable Pin Threshold n Small 16-Lead (3mm × 3mm) LQFN Package n AEC-Q100 Qualified for Automotive Applications The LT®8336 is a low IQ, synchronous step-up DC/DC converter. It features Silent Switcher architecture and optional spread spectrum frequency modulation to minimize EMI emissions while delivering high efficiencies at high switching frequencies. APPLICATIONS The LT8336 features output soft-start, an output power good flag and output overvoltage lockout. n n n Automotive and Industrial Power Supplies General Purpose Step-Up The wide input/output voltage range, low VIN pin quiescent current in Burst Mode operation, and 100% duty cycle capability for the synchronous MOSFET in PassThru operation (VIN ≥ VOUT), make the LT8336 ideally suited for general purpose step-up and automotive preboost applications. The LT8336 integrates 40V, 2.5A power switches, operating at a fixed switching frequency programmable between 300kHz and 3MHz and synchronizable to an external clock. Pulse-skipping or Burst Mode operation can be selected, with or without spread-spectrum frequency modulation, to optimize efficiency and EMI performance. All registered trademarks and trademarks are the property of their respective owners. Protected by U.S patents, including 10686381. TYPICAL APPLICATION High Efficiency 8V to 16V Input, 2MHz, 24V Output Boost Converter 90 0.1µF 10µF SW VIN 80 BST VOUT 24V 0.6A AT 8V VIN 1.2A AT 16V VIN VOUT LT8336 1M INTVCC RT 1µF 10µF ×2 FB SYNC/MODE GND 1k 70 60 100 50 40 20 VIN = 16V VIN = 8V Burst Mode OPERATION 10 43.2k 0 0.1 47.5k 2MHz 1 10 100 1k OUTPUT CURRENT (mA) POWER LOSS (mW) EN/UVLO PG 10k 100 EFFICIENCY (%) VIN 8V TO 16V Efficiency 6.8µH 10 1 10k 8336 TA01b 8336 TA01a Rev. A Document Feedback For more information www.analog.com 1 LT8336 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) VIN EN/UVLO NC INTVCC PG TOP VIEW VIN, VOUT, EN/UVLO...................................................40V SYNC/MODE, FB..........................................................6V PG..............................................................................10V Operating Junction Temperature Range (Notes 2, 3) LT8336E............................................. –40°C to 125°C LT8336J............................................. –40°C to 150°C LT8336H............................................. –40°C to 150°C Storage Temperature Range................... –65°C to 150°C Maximum Reflow (Package Body) Temperature....................................................... 260°C NC 16 15 14 13 12 BST SYNC/MODE 1 RT 2 11 SW 17 GND GND 3 10 SW FB 4 7 8 GND GND 6 VOUT 5 NC VOUT 9 SW NC LQFN PACKAGE 16-LEAD (3mm × 3mm) LQFN θJA = 42.8°C/W; θJCtop = 45.2°C/W; θJCbottom = 8.2°C/W (Note 4) EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION PART MARKING PART NUMBER PACKAGE* TYPE MSL RATING Au (RoHS) LQFN (Laminate Package with QFN Footprint) 3 Au (RoHS) LQFN (Laminate Package with QFN Footprint) 3 DEVICE FINISH CODE PAD FINISH LHHP e4 LHHP e4 LT8336EV#PBF LT8336JV#PBF LT8336HV#PBF TEMPERATURE RANGE (SEE NOTE 2) –40°C to 125°C –40°C to 150°C AUTOMOTIVE PRODUCTS** LT8336EV#WPBF LT8336JV#WPBF LT8336HV#WPBF • Contact the factory for parts specified with wider operating temperature ranges. Pad or ball finish code is per IPC/JEDEC J-STD-609. –40°C to 125°C –40°C to 150°C • Recommended LGA and BGA PCB Assembly and Manufacturing Procedures *The LT8336 package has the same dimensions as a standard 3mm × 3mm QFN. • LGA and BGA Package and Tray Drawings **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, EN/UVLO = 2V, unless otherwise noted. PARAMETER CONDITIONS VIN Operation Voltage VIN Quiescent Current TYP UNITS 40 V 1 10 µA µA 4 8 µA SYNC/MODE = Open, Not Switching 0.9 1.5 mA VIN = 10.1V, VOUT = 10V, FB = 1.05V (In PassThru Mode) 15 25 µA l 2.7 MAX 0.3 0.3 l EN/UVLO = 0.15V EN/UVLO = 0.15V SYNC/MODE = 0V, Not Switching 2 MIN Rev. A For more information www.analog.com LT8336 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, EN/UVLO = 2V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS E-Grade/H-Grade J-Grade l l 0.994 0.985 0.980 1.000 1.000 1.000 1.006 1.010 1.012 V V V FB Line Regulation 2.7V < VIN < 40V l 0.005 0.02 %/V FB Pin Input Current FB = 1.0V 20 nA Switching Frequency RT = 357kΩ RT = 102kΩ RT = 47.5kΩ RT = 30.1kΩ FB Regulation Voltage –20 l 1.85 Spread Spectrum Modulation Frequency as Percentage of fSW Spread Spectrum Modulation Frequency Range as Percentage of fSW Synchronizable Frequency SYNC/MODE = External Clock l 0.3 SYNC/MODE Pin Input Logic Level for Frequency Synchronization SYNC Logic Low SYNC Logic High l l 1.7 Soft-Start Time RT = 47.5kΩ EN/UVLO Threshold Voltage Falling Hysteresis EN/UVLO Input Bias Current EN/UVLO = 2V 300 1 2 3 2.15 0.45 % 20 % 3 0.4 1.4 l 0.94 kHz MHz MHz MHz MHz V V ms 1.0 100 1.06 V mV 40 nA PG Upper Threshold Offset from Regulated FB FB Falling Hysteresis l 5 8 1 12 % % PG Lower Threshold Offset from Regulated FB FB Rising Hysteresis l –12 –8 1 –5 % % 40 nA 700 2000 Ω PG Leakage Current PG = 3.5V PG Pull-Down Resistance PG = 0.1V Bottom Switch On-Resistance ISW = 1A –40 –40 l 70 Bottom Switch Current Limit l Bottom Switch Minimum Off-time 2.5 3 20 Bottom Switch Minimum On-time VIN = 9.5V, VOUT = 10V Top Switch On-Resistance ISW = 1A 20 SW Leakage Current VOUT = 40V, SW = 0V, 40V VOUT Pin Current SYNC/MODE = 0V, VOUT = 10V, Not Switching VIN = 10.1V, VOUT = 10V, FB = 1.05V (In PassThru Mode) PassThru Mode VIN to VOUT Threshold (VIN – VOUT) PassThru Mode Top Switch Reverse Current Limit mΩ 3.3 A 50 ns 80 75 –1.5 ns mΩ 1.5 μA 1 30 μA μA FB = 1.05V, VIN Rising FB = 1.05V, VIN Falling 0 –0.6 V V VIN = 9.9V, VOUT = 10V, FB = 1.05V (Top Switch Turns Off) 750 mA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8336E is guaranteed to meet performance specifications from the 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8336J/ LT8336H are guaranteed to meet performance specifications over the –40°C to 150°C operating junction temperature ranges. High junction temperatures degrade operating lifetimes; operating lifetime is de-rated for junction temperatures greater than 125°C. Note 3: These ICs include overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 4: θ values are determined by simulation per JESD51 conditions. Rev. A For more information www.analog.com 3 LT8336 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency and Power Loss vs Output Current 100 10k 100 100 50 40 30 10 VIN = 16V VIN = 8V FRONT PAGE CIRCUIT Burst Mode OPERATION 20 10 0 0.1 1 10 100 1k OUTPUT CURRENT (mA) EFFICIENCY (%) 60 70 PULSE–SKIPPING LOSS 60 50 40 0 10 PULSE–SKIPPING EFFICIENCY 30 1.08 80 1.07 EFFICIENCY (%) 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1 10 100 OUTPUT CURRENT (mA) 1k 1.04 1.03 1.02 1.01 EN/UVLO FALLING 0.99 –50 –25 OSCILLATOR FREQUENCY (MHz) OSCILLATOR FREQUENCY (MHz) 2.02 2 1.98 1.96 1.94 1.92 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 1.004 1.002 1 0.998 0.996 0.994 0.992 25 50 75 100 125 150 TEMPERATURE (°C) RT = 47.5kΩ SYNC/MODE = INTVCC 2.4 0.99 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3976 G06 Switching Waveforms, Soft-Start VOUT 10V/DIV 2.3 24V IL 1A/DIV 2.2 EN/UVLO 2V/DIV 2.1 1ms/DIV 2.0 1.9 8336 G09 VIN = 12V FRONT PAGE CIRCUIT 0 50 100 150 200 TIME (μs) 250 300 8336 G07 4 15 1.006 8336 G05 2.5 2.04 6 9 12 INDUCTOR VALUE (μH) 8336 G03 Oscillator Frequency with Spread Spectrum Modulation 2.06 3 1.008 1.05 RT = 47.5kΩ SYNC/MODE = OPEN 1.9 –50 –25 65 FB Regulation Voltage vs Temperature 1.06 Oscillator Frequency vs Temperature 2.08 0.1 EN/UVLO RISING 8336 G04 2.1 75 1.01 1 1000 ILOAD = 5mA 3.3μH: COILCRAFT XFL4020-332ME 4.7μH: COILCRAFT XFL4020-472ME 6.8μH: COILCRAFT XEL4030-682ME 10μH: COILCRAFT XAL5050-103ME 15μH: COILCRAFT XAL5050-153ME FRONT PAGE CIRCUIT 80 70 FB REGULATION VOLTAGE (V) 90 EN/UVLO THRESHOLD (V) 1.09 VIN = 12V 300kHz, L = 47μH 1MHz, L = 15μH 2MHz, L = 6.8μH 3MHz, L = 4.7μH FRONT PAGE CIRCUIT Burst Mode OPERATION VIN = 8V 85 EN/UVLO Thresholds vs Temperature 100 40 90 8336 G02 Efficiency vs Output Current at Different Switching Frequencies 50 VIN = 16V FRONT PAGE CIRCUIT 8336 G01 60 1 VIN = 12V 10 70 100 BURST LOSS 20 1 10k 95 POWER LOSS (mW) 70 100 1k 80 1k POWER LOSS (mW) EFFICIENCY (%) 80 10k BURST EFFICIENCY 90 90 Burst Mode Efficiency vs Inductor Value EFFICIENCY (%) Efficiency and Power Loss vs Output Current TA ≈ TJ = 25°C, unless otherwise noted. 8336 G08 Rev. A For more information www.analog.com LT8336 TYPICAL PERFORMANCE CHARACTERISTICS TA ≈ TJ = 25°C, unless otherwise noted. Bottom Switch Current Limit vs Temperature Switching Waveforms, Soft-Start at Different VIN Voltages Max Programmable Switching Frequency vs Input Voltage 3.5 MAX SWITCHING FREQUENCY (MHz) 3.2 VOUT AT VIN = 16V VOUT AT VIN = 12V VOUT AT VIN = 8V 0V EN/UVLO 2V/DIV 500μs/DIV 8336 G10 FRONT PAGE CIRCUIT CURRENT LIMIT (A) 3.1 VOUT 10V/DIV 3.0 2.9 2.8 2.7 2.6 2.5 –50 –25 0 3.0 2.5 2.0 1.5 1.0 0.5 0 2.70 25 50 75 100 125 150 TEMPERATURE (°C) 2.75 2.80 2.85 2.90 VIN (V) 2.95 8336 G12 8336 G11 Switching Waveforms, Current Limit at 85% Duty Cycle IL 1A/DIV IL 1A/DIV 0A 0A VSW 10V/DIV VSW 10V/DIV 500ns/DIV 300 250 500ns/DIV 8336 G13 VIN = 4.15V FRONT PAGE CIRCUIT Power Switch Voltage Drop vs Switch Current SWITCH DROP (mV) Switching Waveforms, Current Limit at 15% Duty Cycle 3.00 8336 G14 VIN = 21.5V FRONT PAGE CIRCUIT 200 TOP SWITCH 150 100 BOTTOM SWITCH 50 0 0 0.5 1 1.5 2 SWITCH CURRENT (A) 2.5 3 8336 G15 Power Switch Voltage Drop vs Temperature 160 SWITCH DROM (mV) 140 Switching Waveforms, Load Step in Pulse-Skipping Mode Operation SWITCH CURRENT = 1A IOUT 0.5A/DIV IL 1A/DIV 0A 120 100 TOP SWITCH IOUT 0.5A/DIV IL 1A/DIV 0A BOTTOM SWITCH 200μs/DIV 40 0.5A VOUT 0.5V/DIV (AC) VOUT 0.5V/DIV (AC) 80 60 0.5A Switching Waveforms, Load Step in Burst Mode Operation 8336 G17 FRONT PAGE CIRCUIT 200μs/DIV 8336 G18 FRONT PAGE CIRCUIT 20 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 8336 G16 Rev. A For more information www.analog.com 5 LT8336 TYPICAL PERFORMANCE CHARACTERISTICS Minimum On/Off Times vs Temperature 70 IL 0.5A/DIV MIN ON TIME 0A IL 0.5A/DIV 0A MIN OFF TIME VSW 10V/DIV VSW 10V/DIV MIN ON/OFF TIMES (ns) 60 50 30 20 2μs/DIV 10 0 –50 –25 Switching Waveforms, Continuous Burst Mode Operation Switching Waveforms, Full Frequency PWM Operation VOUT = 30V 40 TA ≈ TJ = 25°C, unless otherwise noted. 0 25 50 75 100 125 150 TEMPERATURE (°C) 2μs/DIV 8336 G20 VIN = 3V ILOAD = 220mA SYNC/MODE = 0V BACK PAGE CIRCUIT VIN = 3V ILOAD = 110mA SYNC/MODE = 0V BACK PAGE CIRCUIT Switching Waveforms, Light Load Low IQ Burst Mode Operation Switching Waveforms, Discontinuous Pulse-Skipping Mode 8336 G21 3976 G19 Switching Waveforms, Discontinuous Burst Mode Operation IL 0.5A/DIV 0A IL 0.5A/DIV 0A IL 0.1A/DIV 0A VSW 10V/DIV VSW 10V/DIV VSW 10V/DIV 2μs/DIV VOUT, VIN 1V/DIV IL 0.5A/DIV 500ns/DIV 8336 G23 8336 G24 VIN = 3V ILOAD = 50mA SYNC/MODE = 0V BACK PAGE CIRCUIT VIN = 3V ILOAD = 0mA SYNC/MODE = 0V BACK PAGE CIRCUIT VIN = 3V ILOAD = 10mA SYNC/MODE = OPEN BACK PAGE CIRCUIT Waveforms, PassThru Mode Operation Waveforms, Reverse Current Protection in PassThru Mode Switching Waveforms, Frequency Foldback when VIN is close to VOUT VOUT, VIN 1V/DIV VIN IL 0.5A/DIV VSW 100mA 20V/DIV 0.5A 2μs/DIV ILOAD = 0.5A VIN = 10.45V SYNC/MODE = 0V BACK PAGE CIRCUIT VIN IL 0.5A/DIV –750mA 50μs/DIV 8336 G25 VOUT, VIN 1V/DIV VOUT 10.6V VOUT VSW 20V/DIV 6 10ms/DIV 8336 G22 VOUT VIN 0.5A VSW 20V/DIV 8336 G26 SYNC/MODE = 0V BACK PAGE CIRCUIT 2μs/DIV 8336 G27 ILOAD = 0.5A VOUT = 10V SYNC/MODE = 0V BACK PAGE CIRCUIT Rev. A For more information www.analog.com LT8336 TYPICAL PERFORMANCE CHARACTERISTICS Conducted EMI Performance (CISPR25 Class 5 Average) Conducted EMI Performance (CISPR25 Class 5 Peak) 80 60 60 50 50 40 30 20 10 40 30 20 10 0 0 –10 –10 –20 0 3 6 9 12 15 18 FREQUENCY (MHz) 21 24 27 –20 30 0 3 6 9 12 15 18 FREQUENCY (MHz) 21 PAGE 18 CIRCUIT, 12V INPUT TO 24V OUTPUT AT 600mA, SSFM = ON, fSW = 2MHz TO 2.4MHz PAGE 18 CIRCUIT, 12V INPUT TO 24V OUTPUT AT 600mA, SSFM = ON, fSW = 2MHz TO 2.4MHz Radiated EMI Performance (CISPR25 Class 5 Peak) Radiated EMI Performance (CISPR25 Class 5 Average) 60 60 50 50 40 40 AMPLITUDE (dBµV/m) AMPLITUDE (dBµV/m) 8336 G28 30 20 10 0 –10 –20 CLASS 5 AVERAGE LIMIT LT8336 AVERAGE EMI 70 AMPLITUDE (dBµV) AMPLITUDE (dBµV) 80 CLASS 5 PEAK LIMIT LT8336 PEAK EMI 70 TA ≈ TJ = 25°C, unless otherwise noted. CLASS 5 PEAK LIMIT LT8336 PEAK EMI 0 100 200 300 400 500 600 FREQUENCY (MHz) 700 PAGE 18 CIRCUIT, 12V INPUT TO 24V OUTPUT AT 600mA, SSFM = ON, fSW = 2MHz TO 2.4MHz 800 900 1000 8336 G30 24 27 30 8336 G29 30 20 10 0 –10 –20 CLASS 5 AVERAGE LIMIT LT8336 AVERAGE EMI 0 100 200 300 400 500 600 FREQUENCY (MHz) 700 PAGE 18 CIRCUIT, 12V INPUT TO 24V OUTPUT AT 600mA, SSFM = ON, fSW = 2MHz TO 2.4MHz 800 900 1000 8336 G31 Rev. A For more information www.analog.com 7 LT8336 PIN FUNCTIONS SYNC/MODE (Pin 1): External Synchronization Input and Mode Selection Pin. This pin allows five selectable modes for optimization of performance: SYNC/MODE PIN INPUT CAPABLE MODE(S) OF OPERATION (1) GND or (INTVCC – 0.2V) Pulse-Skipping/SSFM (5) External Clock Pulse-Skipping/Sync where the selectable modes of operation are: Burst = low IQ, (low output ripple operation at light loads) Pulse-Skipping = skipped pulse(s) at light load (aligned clock) SSFM = spread spectrum frequency modulation for low EMI Sync = switching frequency synchronized to external clock The LT8336 automatically selects pulse-skipping mode with no spread-spectrum frequency modulation during start-up, and The SYNC/MODE pin input configurations (1) through (4) are ignored. The LT8336 automatically select low IQ operation in the PassThru mode operation, and all the SYNC/MODE pin input configurations are ignored. RT (Pin 2): Switching Frequency Adjustment Pin. The LT8336 switching frequency is programmed by connecting a resistor of the appropriate value from the RT pin to GND at Pin 3. See the Applications Information section for more detail. Do not leave the RT pin open. GND (Pins 3, 5, 8, Exposed Pad Pin 17): Ground. The exposed pad should be soldered to the PCB ground plane for good thermal and electrical performance. See the Applications Information section for sample layout. FB (Pin 4): Feedback Input Pin. This pin receives the feedback voltage from the external resistor divider between VOUT and Pin 3 GND. FB pin is one input to the error amplifier of the output voltage control loop. See the Applications Information section for sample layout. VOUT (Pins 6, 7): Output Pins. Connect one 1µF capacitor between VOUT at Pin 6 and GND at Pin 5 only, and a matching 1µF capacitor between VOUT at Pin 7 and GND 8 at Pin 8 only. These two capacitors complete the Silent Switcher configuration and must be placed as close to the IC as possible to achieve lowest EMI. Additional bulk capacitors of 2.2µF or more should be placed close to the IC with the positive terminals connected to VOUT, and negative terminals connected to ground plane. See the Applications Information section for a sample layout. SW (Pins 9, 10, 11): The SW pins are the outputs of the internal power switches. Tie these pins together and connect them to the inductor and one side of the boost capacitor CBST. BST (Pin 12): Top Switch Gate Driver Supply Pin. Place a 0.1µF capacitor (CBST) between the BST and SW pins and close to the IC. VIN (Pin 13): Input Supply Pin. This pin must be connected to the input of the power stage (the inductor’s input terminal). EN/UVLO (Pin 14): Enable and Input Undervoltage Lockout Pin. The IC is shut down when this pin is below 1V (typical). The IC draws a low VIN current of 0.3μA (typical) when this pin is below 0.15V. The IC is enabled when this pin is above 1.0V (typical). A resistor divider from VIN to GND can be used to program a VIN threshold below which the IC is shut down. See the Applications Information section for further details. Tie EN/UVLO to VIN if the shutdown feature is not used. INTVCC (Pin 15): Internal 3.5V Regulator Bypass Pin. This pin provides supply for internal drivers and control circuits. The bypass capacitor for INTVCC should be connected to the ground plane. Do not load the INTVCC pin with external circuitry. This pin must be bypassed with a 1µF or larger low ESR ceramic capacitor placed close to the pin. PG (Pins 16): Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is greater than ±8% outside the regulated voltage. PG is also pulled to ground when EN/UVLO is below 1V, INTVCC has fallen too low, or the IC enters thermal shutdown. Rev. A For more information www.analog.com LT8336 BLOCK DIAGRAM R4 R3 14 IL L VIN EN/UVLO 13 CBST CVCC CIN 15 VIN INTVCC 12 BST I_ZERO 3.5V REG AND UVLO 1V REF 1V VOUT_OVLO – + VOUT_OVLO G2 VIN_HIGH UVLO VC INTVCC 16 A4 + – A3 + – 40V VIN M2 INTVCC R1 G1 OSC A6 C1 M1 SS + + GND (3, 5, 8, 17) ±8% R2 SS FB BURST MODE DETECT A1 + – – 1V COUT3 FB FB 4 VOUT COUT1,2 PG SHDN FB + – VOUT (6, 7) SYNC/MODE SHDN VIN_HIGH SWITCHING LOGIC AND CHARGE PUMP SHDN R5 A5 I_ZERO A2 TJ > 170°C SW (9, 10, 11) VC EA RAMP GENERATOR OSC OSCILLATOR 2 RT 1 SYNC/MODE 8336 BD RT Rev. A For more information www.analog.com 9 LT8336 OPERATION The LT8336 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Referring to the Block Diagram, the Switching Logic and Charge Pump block turns on the power switch M1 through driver G1 at the start of each oscillator cycle. During the M1 switch on-phase, the inductor current IL flows through M1. A current proportional to the M1 switch current is added to a stabilizing slope compensation ramp and the resulting sum is fed into the positive terminal of the PWM comparator A1. The voltage at the negative input of A1, labeled “VC”, is set by the error amplifier EA and is an amplified version of the difference between the feedback voltage FB and the reference voltage. During the M1 on-phase, IL increases. When the signal at the positive input of A1 exceeds VC, A1 sends out a signal to the Switching Logic and Charge Pump block to turn off M1. When M1 turns off, the synchronous power switch M2 turns on until the next clock cycle begins or inductor current IL falls to zero. During the M1 off-phase, IL decreases. Through this repetitive action, the EA sets the correct IL peak current level to keep the output in regulation. VIN and VOUT are constantly monitored by the LT8336. When VIN rises above VOUT (causing A3’s output high) and at the same time VOUT is higher than its regulation voltage programmed by the FB resistor network, the LT8336 enters PassThru operation, where M2 is kept on continuously and M1 is kept off continuously, and the VOUT is essentially shorted to VIN by the inductor and M2. See Applications Information section for further details. one 1µF capacitor between VOUT at pin 6 and GND at pin 5 and a matching 1µF capacitor between VOUT at pin 7 and GND at pin 8 (see Applications Information section for further details). The EN/UVLO pin controls whether the LT8336 is enabled or is in shutdown state. A 1.0V reference and a comparator A2 with 100mV hysteresis (Block Diagram) allow the user to accurately program the supply voltage at which the IC turns on and off. See the Applications Information section for further details. The LT8336 features a variety of operation modes which can be selected by SYNC/MODE pin to optimize the converter performance based on the application requirements. The low ripple Burst Mode operation can be selected to optimize the efficiency at light loads. The spread spectrum frequency modulation function can be selected to minimize the EMI emissions. Pulling SYNC/MODE pin to ground selects Burst Mode operation. Connecting this SYNC/MODE to ground through a 50k resistor selects Burst Mode operation with spread spectrum frequency modulation. Floating SYNC/ MODE pin selects pulse-skipping operation. Connecting SYNC/MODE pin to INTVCC selects pulse-skipping operation with spread spectrum frequency modulation. If a clock is applied to the SYNC/MODE pin, the LT8336 synchronizes to an external clock frequency and operates in pulse-skipping mode. See the Applications Information section for further details. LT8336 features Silent Switcher architecture to minimize EMI emissions while delivering high efficiency. The Silent Switcher EMI cancellation loops are completed by placing 10 Rev. A For more information www.analog.com LT8336 APPLICATIONS INFORMATION Programming VIN Turn-On and Turn-Off Thresholds with the EN/UVLO Pin The falling threshold voltage and rising hysteresis voltage of the VIN pin can be calculated by Equation 1. (R3 + R4) VVIN,FALLING = 1.0V • R4 (1) (R3 + R4) VVIN,RISING = 100mV • + VVIN,FALLING R4 When in Burst Mode operation with light load currents, the current through the resistor network R3 and R4 can easily be greater than the supply current consumed by the LT8336. Therefore, large resistors can be used for R3 and R4 to minimize their effect on efficiency at light loads. EN/UVLO pin can be tied to VIN if the shutdown feature is not used, or alternatively, the pin may be tied to a logic level if shutdown control is required. The IC draws a low VIN quiescent current of 0.3µA (typical) When EN/UVLO is below 0.15V. INTVCC Regulator An internal low dropout (LDO) regulator produces the 3.5V supply from VIN that powers the drivers and the internal bias circuitry. The INTVCC pin must be bypassed to ground with a minimum of 1μF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. Applications with high VIN voltage and high switching frequency increase die temperature because of the higher power dissipation across the LDO. When VIN is lower than 2.9V, the maximum programmable switching frequency is lower due to the voltage drop across the LDO. See the Max Programmable Switching Frequency vs Input Voltage curve in the Typical Performance Characteristics section for more information. Do not connect an external load to the INTVCC pin. Light Load Current Operation—Burst Mode Operation or Pulse-Skipping To enhance the efficiency at light loads, the LT8336 features operate in low ripple Burst Mode operation. When the LT8336 is enabled for Burst Mode operation, the minimum peak inductor current is set to approximately 700mA even though the VC node (Block Diagram) indicates a lower value. In this condition, the LT8336 maintains the output regulation voltage by reducing the switching frequency instead of reducing the inductor peak current. In light load Burst Mode operation the LT8336 delivers single pulses of current to the output capacitor followed by sleep periods during which the output power is supplied by the output capacitor. This low ripple Burst Mode operation minimizes the input quiescent current and minimizes output voltage ripple. While in sleep mode the LT8336 VIN pin draws 4µA. As the output load decreases, the frequency of single current pulses decreases and the percentage of time the LT8336 is in sleep mode increases, resulting in much higher light load efficiency than for typical converters. By maximizing the time between pulses, the converter VIN pin quiescent current approaches 4μA for a typical application when there is no output load. To optimize the quiescent current performance at light loads, the current in the feedback resistor divider should be minimized as it appears to the output as load current. In order to achieve higher light load efficiency, more energy should be delivered to the output during the single small pulses in Burst Mode operation such that the LT8336 can stay in sleep mode longer between each pulse. This can be achieved by using a larger value inductor. For example, while a smaller inductor value would typically be used for a high switching frequency application, if high light load efficiency is desired, a larger inductor value should be chosen. See the Burst Mode Efficiency vs Inductor Value curve in the Typical Performance Characteristics section for more information. While in Burst Mode operation the bottom switch peak current is approximately 700mA as shown in the Switching Waveforms in Burst Mode operation curve in the Typical Performance Characteristics section. This behavior results in larger output voltage ripple compared to that in pulse-skipping mode operation which has lower bottom switch peak current. However, the output voltage ripple can be reduced proportionally by increasing the output capacitance. When adjusting output capacitance, a careful evaluation of system stability should be made to ensure adequate design margin. As the load ramps upward from zero, the switching frequency keeps increasing until reaching the switching frequency programmed by the resistor at the RT pin. The output load at which the Rev. A For more information www.analog.com 11 LT8336 APPLICATIONS INFORMATION LT8336 reaches the programmed frequency varies based on input voltage, output voltage, and inductor choice. Switching Frequency and Synchronization The choice of switching frequency is a trade-off between efficiency and component size. Low frequency operation improves efficiency by reducing the power switches’ switching losses and gate drive current. However, lower frequency operation requires a physically larger inductor. The LT8336 uses a constant-frequency architecture that can be programmed over a 300kHz to 3MHz range with a single external resistor from the RT pin to ground, as shown in Block Diagram. A table for selecting the value of RT for a given switching frequency is shown in Table 1. Figure 1 shows the RT Value vs Switching Frequency curve. Table 1. SW Frequency (fSW) vs RT Value fSW (MHz) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 RT (kΩ) 357 267 210 174 147 127 113 102 90.9 84.5 76.8 71.5 64.9 61.9 fSW (MHz) 1.7 1.8 1.9 2.0* 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 RT (kΩ) 57.6 53.6 51.1 47.5 45.2 43.2 40.2 39.2 37.4 35.7 34.0 32.4 30.9 30.1 *Programming 2MHz will ensure fSW stays above 1.85MHz (out of AM band). 12 RT(Ω) Pulse-skipping mode operation offers two major differences from Burst Mode operation. First, the internal clock stays awake at all times and all switching cycles are aligned to the clock. In this mode the internal circuitry is awake at all times, increasing quiescent current to hundred μA compared to the 4μA of VIN pin quiescent current in Burst Mode operation. Second, as the load ramps upward from zero, the switching frequency programmed by the resistor at the RT pin is reached at a lower output load than in Burst Mode operation, therefore, pulse-skipping mode operation exhibits lower output ripple as well as lower audio noise and RF interference. 1M 100k 10k 0 500 1000 1500 2000 2500 SWITCHING FREQUENCY (kHz) 3000 8336 F01 Figure 1. RT Value vs Switching Frequency The operating frequency of the LT8336 can be synchronized to an external clock source with 100ns minimum pulse width. By providing a digital clock signal to the SYNC/MODE pin, the LT8336 operates at the SYNC pulse frequency and automatically enters pulse-skipping mode operation at light load. If this feature is used, an RT resistor should be chosen to program a switching frequency as close as possible to the SYNC pulse frequency. Spread Spectrum Frequency Modulation The LT8336 features spread spectrum frequency modulation to further reduce EMI emissions. The user can select spread spectrum frequency modulation with Burst Mode operation by connecting the SYNC/MODE pin to ground through a 50k resistor, or spread spectrum frequency modulation with pulse-skipping operation by connecting the SYNC/MODE pin to INTVCC. When spectrum frequency modulation is selected, a stepped triangular frequency modulation is used to vary the internal oscillator frequency between the value programmed by the RT resistor to approximately 20% higher than that value. The modulation frequency is approximately 0.45% of the switching frequency. For example, when the LT8336 is programmed to 2MHz, and spread spectrum frequency modulation is selected, the oscillator frequency varies from 2MHz to 2.4MHz at a 9kHz rate (see Oscillator Frequency with Spread Spectrum Modulation curve in the Typical Performance Characteristics section). When operating at light load, the spread spectrum frequency modulation is more effective in pulse-skipping mode than Rev. A For more information www.analog.com LT8336 APPLICATIONS INFORMATION in Burst Mode operation, due to the fact that pulse-skipping operation maintains the programmed switching frequency down to a much lower load current as compared to Burst Mode operation. VIN to VOUT PassThru Mode Operation In the boost pre-regulator applications for automotive stop-start and cold crank, VIN is normally above the regulated VOUT voltage. In this condition, LT8336 enters PassThru operation. LT8336 is designed to have an accurate, well controlled PassThru operation with low quiescent current consumption. If VIN transiently falls below the VOUT regulation setpoint, the boost converter commences switching to maintain the output voltage in regulation. As shown in Block Diagram, VIN is compared with VOUT using the comparator A3 with 0.6V hysteresis. When VIN rises above VOUT (causing A3’s output high), and at the same time VOUT is higher than its regulation voltage programmed by the FB resistor network, the LT8336 boost converter enters PassThru operation, where the synchronous power switch M2 is kept on continuously and the power switch M1 is kept off continuously. The voltage across the boost capacitor (CBST), VBST_SW, is constantly monitored. When VBST_SW drops below 3.2V, an internal charge pump is turned on to charge VBST_SW up to 3.6V, and then turned off. In PassThru mode the VOUT is essentially shorted to VIN by the inductor and M2, and VIN pin quiescent current is limited to 15µA (typ) regardless of the SYNC/MODE pin’s configuration. VOUT pin draws 30µA (typ). A typical waveforms drawing is shown in the Typical Performance Characteristics section. Several conditions cause the LT8336 to exit from the PassThru mode operation. First, when VOUT drops below its regulation voltage programmed by the FB resistor network, LT8336 exits from PassThru mode operation and normal boost switching operation resumes to maintain the regulated VOUT voltage. Second, when VOUT is still higher than its regulation voltage but VIN drops below VOUT by the comparator A3’s hysteresis of 0.6V (typ) or more to cause A3’s output low, M2 is turned off to prevent the reverse current from VOUT to VIN from ramping up. LT8336 is back to the PassThru mode when A3’s output is high again. Third, when VOUT is still higher than its regulation voltage but M2’s reverse current (flowing from its drain to source) rises above 750mA (typ), M2 is turned off to prevent the reverse current from VOUT to VIN from ramping up. LT8336 re-enters the PassThru mode when A3’s output is high again. Waveforms for typical reverse current protection are shown in the Typical Performance Characteristics section. To ensure the PassThru mode operation works properly, the LT8336’s VIN pin must be connect to the input of the power stage (the input terminal of inductor as shown in Block Diagram). FB Resistor Network and the Quiescent Current at No-Load The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to Equation 2. ⎛V ⎞ R1 = R2 • ⎜ OUT – 1⎟ ⎝ 1V ⎠ (2) Reference designators refer to Block Diagram. The 1% resistors are recommended to maintain output voltage accuracy. If low input quiescent current and good light-load efficiency are desired, use large resistor values for the FB resistor divider. The current flowing in the divider acts as a load current, and will increase the no-load input current to the converter. When VIN < VOUT, the converter Burst Mode quiescent current at no-load can be estimated using Equation 3. ⎛ V ⎞ ⎛V ⎞ IQ ≈ 4µA + ⎜ OUT + 1µA ⎟ • ⎜ OUT ⎟ • 1.25 ⎝ R1 + R2 ⎠ ⎝ VIN ⎠ (3) where 4μA is the VIN pin quiescent current of the LT8336, and the second term is the current drawn by the feedback divider and VOUT pin (1μA) reflected to the input of the boost operating. For a 12V input, 24V output boost converter with R1 = 1M and R2 = 43.2k, it can be calculated that the converter draws approximately 64μA from the 12V supply at Rev. A For more information www.analog.com 13 LT8336 APPLICATIONS INFORMATION no-load. Note that this equation implies that the no-load current is a function of VIN. When VIN is higher than the regulated VOUT voltage, LT8336 enters PassThru operation and VOUT is essentially shorted to VIN by the inductor and M2. The converter quiescent current at no-load can be estimated using Equation 4. IQ ≈ 45µA + VIN R1 + R2 (4) where 45μA is the sum of the VIN pin and VOUT pin quiescent current of the LT8336, and the second term is the current drawn by the feedback divider. For a 25V VIN with R1 = 1M and R2 = 43.2k, it can be calculated that the converter draws approximately 70μA from the 25V supply at no-load. When using large FB resistors, a 4.7pF to 22pF phase-lead capacitor should be connected from VOUT to FB, and a careful evaluation of system stability should be made to ensure adequate design margin. waveforms in these VIN approaching VOUT conditions are shown in the Typical Performance Characteristics section. Start-Up To limit the peak switch current and VOUT overshoot during start-up, the LT8336 contains internal circuitry to provide soft-start operation (refer to the error amplifier EA in Block Diagram). During start-up, the internal soft-start circuity slowly ramps the internal SS signal from zero to 1V. When the SS voltage falls between the FB initial voltage and 1V, the LT8336 regulates the FB pin voltage to the SS voltage instead of 1V. In this way the output capacitor is charged gradually towards its final value while limiting the start-up peak switch currents. Referring to Figure  2, the start-up time TSTART_UP is the time period from EN/UVLO transitioning high to PG transitioning high, indicating VOUT has reached approximately 90% of its regulation voltage programmed by FB resistor network. When VIN > 3.6V, TSTART_UP is approximately given by Equation 5. TSTART _UP = 0.25ms + 2100 fSW (5) Overvoltage Lockout The VOUT pin voltage is constantly monitored by the LT8336. An overvoltage condition occurs when VOUT pin voltage exceeds approximately 40V. Switching is stopped at such condition. Normal switching is resumed when the VOUT pin voltage drops back to 40V or lower. When VIN < 3.6V, TSTART_UP is approximately given by Equation 6. Switching Frequency Foldback when VIN Approaches VOUT In some applications, VIN may rise to a voltage very close to VOUT. In this condition the switching regulator must operate at a very low duty cycles to keep VOUT in regulation. However, the minimum on-time limitation may prevent the switcher from attaining a sufficiently low duty cycle at the programmed switching frequency. As a result a typical boost converter may experience a large output ripple under these conditions. The LT8336 addresses this issue by adopting a switching frequency foldback function to smoothly decrease the switching frequency when its minimum on-time starts to limit the switcher from attaining a sufficiently low duty cycle. The typical switching 14 TSTART _UP = 0.25ms + 3.5V 2100 • VIN − 0.1V fSW (6) 24V VOUT 10V/DIV IL 1A/DIV EN/UVLO 2V/DIV tSTART_UP tMODE_DELAY 1ms/DIV 8336 F02 VIN = 12V FRONT PAGE CIRCUIT Figure 2. Typical Start-Up Waveforms The LT8336 selects pulse-skipping mode with no spread spectrum frequency modulation during start-up, and the SYNC/MODE pin configuration is ignored. The LT8336 Rev. A For more information www.analog.com LT8336 APPLICATIONS INFORMATION reads SYNC/MODE pin configuration after the start-up delay given by Equation 7. TMODE _DELAY = 0.22ms + 4096 fSW (7) If the LT8336 boost converter is plugged into a live supply, the VOUT could ring to twice the voltage of VIN, due to the resonant circuit composed by L, COUT1-3, and the body diode of M2 (refer to Block Diagram). If such over-shoot exceeds the VOUT rating, it must be limited to protect the load and the converter. For these situations, a small Schottky diode or silicon diode can be connected between VIN and VOUT to deactivate the resonant circuit and limit the VOUT over-shoot as shown in Figure 3. With the diode connected, the LT8336 boost is also more robust against output fault conditions such as output short circuit or overload, due to the fact that the diode diverts a great amount of output current from the LT8336. The diode can be rated for about one half to one fifth of the full load current since it only conducts current during start-up or output fault conditions. VOUT COUT3 L SW CIN VOUT COUT1,2 LT8336 VIN GND 8336 F03 Figure 3. A Simplified LT8336 Power Stage with a Diode Added Between VIN and VOUT Inductor Selection When operating in continuous conduction mode (CCM), the duty cycle can be calculated based on the output voltage (VOUT) and the input voltage (VIN). The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage given by Equation 8. DMAX = Given an operating input voltage range, and having chosen the operating frequency and ripple current in the inductor, the inductor value of the boost converter can be determined using Equation 9. L= D VIN The inductor ripple current ∆ISW has a direct effect on the choice of the inductor value, the converter’s maximum output current capability, and the light load efficiency in Burst Mode operation. Choosing smaller values of ∆ISW increases output current capability and light load efficiency in Burst Mode operation, but require large inductance values and reduce the current loop gain. Accepting larger values of ∆ISW provides fast transient response and allows the use of low inductance values, but results in higher input current ripple, greater core losses, lower light load efficiency in Burst Mode operation, and lower output current capability. Large values of ΔISW at high duty cycle operation may result in sub-harmonic oscillation. ∆ISW = 0.3A to 0.6A generally provides a good starting value for many applications, and careful evaluation of system stability should be made to ensure adequate design margin. VOUT – VIN(MIN) VOUT (8) Discontinuous conduction mode (DCM) provides higher conversion ratios at a given frequency at the cost of reduced efficiencies and higher switching currents. VIN(MIN) ∆ISW • fSW •DMAX (9) The LT8336 limits the peak switch current in order to protect the switches and the system from overload faults. The bottom switch current limit is controlled to 3A (typical) regardless of the duty cycle. The peak inductor current is equal to the LT8336 bottom switch current limit. The user should choose an inductor with sufficient saturation and RMS current ratings to handle the inductor’s peak current. Input Capacitor Selection The input ripple current in a boost converter is relatively low (compared with the output ripple current), because this current is continuous. The voltage rating of the input capacitor, CIN, should comfortably exceed the maximum input voltage. Although ceramic capacitors can be relatively tolerant of overvoltage conditions, aluminum electrolytic capacitors are not. Be sure to characterize the input voltage for any possible overvoltage transients that could apply excess stress to the input capacitors. Rev. A For more information www.analog.com 15 LT8336 APPLICATIONS INFORMATION The value of CIN is a function of the source impedance, and in general, the higher the source impedance, the higher the required input capacitance. The RMS CIN ripple current can be estimated by Equation 10. IRMS(CIN) = 0.3 • ∆IL (10) Output Capacitor Selection The output capacitor has two essential functions. First, it filters the LT8336’s discontinuous top switch current to produce the DC output. In this role, it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT8336’s control loop. The X5R or X7R type ceramic capacitors have very low equivalent series resistance (ESR), which provides low output ripple and good transient response. Transient performance can be improved with higher output capacitance and the addition of a feedforward capacitor placed between VOUT and FB. When a feedforward capacitor is used or output capacitance is adjusted, a careful evaluation of system stability should be made to ensure adequate design margin. Increasing the output capacitance will also decrease the output voltage ripple. Lower value of output capacitance can be used to save space and cost, but transient performance will suffer and loop instability may result. with an electrolytic capacitor. When choosing a capacitor, special attention should be given to capacitor's data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor, or one with a higher voltage rating, may be required. For good starting values, refer to the Typical Applications section. Board Layout The LT8336 is specifically designed to minimize EMI emissions and also to maximize efficiency when switching at high frequencies. Figure 4 shows a recommended R2 R1 R5 COUT1 16 1 CVCC VOUT COUT3 COUT2 CBST Besides the bulk output capacitors, two small output ceramic capacitors, 1µF each, should be placed as close as possible to the IC to complete the Silent Switcher cancellation loops. See the Board Layout section for more detail. XR7 or X5R capacitors are recommended for best performance across temperature and output voltage variations. Note that larger output capacitance is required when a lower switching frequency is used. If there is significant inductance to the load due to long wires or cables, additional bulk capacitance may be necessary. This can be provided RT C1 R3 R4 L CIN1 VIN GND GND 8336 F04 GROUND VIA PG SIGNAL VIA Figure 4. A Recommended PCB Layout for the LT8336 Rev. A For more information www.analog.com LT8336 APPLICATIONS INFORMATION PCB layout. For more detail and PCB design files refer to the demo board guide for the LT8336. For optimal performance the LT8336 requires the use of multiple VOUT bypass capacitors. It is recommended to connect one 1µF capacitor between VOUT at Pin 6 and GND at Pin 5 only, and a matching 1µF capacitor between VOUT at Pin 7 and GND at Pin 8 only to complete the Silent Switcher EMI cancellation loops. These two capacitors must be placed as close as possible to the IC, and the loops formed by these two capacitors should be symmetrical and as small as possible to achieve an optimized EMI cancellation performance. Capacitors with small case size, such as 0402 or 0603, are optimal due to the low parasitic inductance. Additional bulk capacitors of 2.2µF or more should be placed close to the IC with the positive terminals connected to VOUT, and negative terminals connected to ground plane. The bypass capacitors for VIN and INTVCC pins should also be connected to the ground plane. The output capacitors, along with the inductor and input capacitors, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local, unbroken power ground plane under the application circuit on the layer closest to the surface layer. The SW and BST nodes should be as small as possible. Keep the FB and RT nodes small so that the ground traces will shield them from the noise generated by the SW and BST nodes. It is recommended to use the GND at Pin 3 for the ground connection of the resistors connecting FB pin or RT Pin (refer to Figure 4). extend the ground plane as much as possible, and add many thermal vias to additional power ground planes within the circuit board. Thermal Considerations Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8336. The power ground plane should consist of large copper layers with thermal vias; these layers spread heat dissipated by the LT8336. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the junction temperature approaches its maximum temperature rating. Power dissipation within the LT8336 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. The junction temperature can be calculated by multiplying the total LT8336 power dissipation by the thermal resistance from junction to ambient and adding the ambient temperature. The LT8336 includes internal overtemperature protection that is intended to protect the device during momentary overload conditions. The overtemperature protection shuts down the LT8336 when the junction temperature exceeds 170°C (typ). The internal soft-start is triggered when the junction temperature drops below 165°C (typ). The maximum rated junction temperature is exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature (see Absolute Maximum Ratings section) may impair device reliability or permanently damage the device. The exposed pad on the bottom of the package should be soldered to the ground plane to reduce the package thermal resistance. To keep the thermal resistance low, Rev. A For more information www.analog.com 17 LT8336 TYPICAL APPLICATIONS Low IQ, Low EMI, 24V Output Boost Converter with SSFM* VIN 8V TO 16V INPUT EMI FILTER L2 0.47µH 10µF 25V X7R L1 6.8µH + 47µF 35V 10µF 25V X7R 0.1µF 1M UVLOFALLING = 7.2V SW VIN BST EN/UVLO OUTPUT EMI FILTER FB1 VOUT 162k PG 4.7pF RT INTVCC 1µF 1M FB SYNC/MODE 49.9k 0.1µF 50V X7R LT8336 GND 43.2k 1µF 50V X7R ×2 10µF 50V X7R ×2 VOUT 24V 0.6A AT 8V VIN 1.2A AT 16V VIN 0.1µF 50V X7R 47.5k 2MHz 8336 TA02a L1: COILCRAFT XEL4030-682ME L2: WURTH ELEKTRONIK 74479299147 FB1: WURTH ELEKTRONIK 742792040 *THIS CIRCUIT IS THE FRONT PAGE CIRCUIT WITH INPUT/OUTPUT FILTERS ADDED AND Burst Mode OPERATION WITH SSFM SELECTED. THE EMI PERFORMANCE IS SHOWN IN THE TYPICAL PERFORMANCE CHARACTERISTICS SECTION. 18 Rev. A For more information www.analog.com LT8336 TYPICAL APPLICATIONS 8V to 16V Input, 36V Output Boost Converter VIN 8V TO 16V L1 15µH 10µF 25V X7R 0.1µF SW VIN 1M UVLOFALLING = 7.2V BST EN/UVLO VOUT 36V 0.4A AT 8V VIN 1.6A AT 16V VIN VOUT 162k LT8336 PG 4.7pF RT INTVCC 1µF 1M FB SYNC/MODE GND 28.7k 1µF 50V X7R ×2 10µF 50V X7R ×2 102k 1MHz 8336 TA03a L: COILCRAFT XEL5050-153ME Efficiency and Power Loss vs Output Current 10k 100 90 1k 70 100 60 50 10 40 30 20 10 0 0.1 VIN = 16V VIN = 8V Burst Mode OPERATION 1 10 100 OUTPUT CURRENT (mA) POWER LOSS (mW) EFFICIENCY (%) 80 1 0.1 1k 8336 TA03b Rev. A For more information www.analog.com 19 LT8336 TYPICAL APPLICATIONS 2.7V to 28V Input, 28V Output Boost Converter VIN 2.7V TO 28V L 8.2µH 10µF 50V X7R 0.1µF SW VIN 1M UVLOFALLING = 2.7V BST EN/UVLO VOUT* 28V 0.6A VOUT 590k PG LT8336 1M 4.7pF RT INTVCC 1µF 1µF 50V X7R ×2 FB SYNC/MODE 37.4k GND 102k 1MHz L: COILCRAFT XEL5050-822ME *WHEN VIN < 8V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED. 8336 TA04a Efficiency and Power Loss vs Output Current Efficiency vs Input Voltage 10k 100 100 90 95 1k 100 60 50 10 40 20 10 0 0.1 VIN = 12V EFFICIENCY POWER LOSS Burst Mode OPERATION 1 10 100 OUTPUT CURRENT (mA) 90 EFFICIENCY (%) 70 POWER LOSS (mW) EFFICIENCY (%) 80 30 85 80 75 70 1 ILOAD = 0.2A Burst Mode OPERATION 65 1k 0.1 60 8336 F04b 20 10µF 50V X7R ×2 0 5 10 15 20 INPUT VOLTAGE (V) 25 30 8336 TA04c Rev. A For more information www.analog.com LT8336 TYPICAL APPLICATIONS Automotive Pre-Boost Converter for Stop-Start and Cold Crank with 20V Regulated Output and High Efficiency PassThru Mode VIN 6V TO 40V L 22µH 10µF 50V X7R 0.1µF SW VIN 1M BST EN/UVLO UVLOFALLING = 6V VOUT* 20V 0.6A VOUT 200k PG LT8336 1M 4.7pF RT INTVCC 1µF 1µF 50V X7R ×2 FB SYNC/MODE 43.2k GND 267k 400kHz L: COILCRAFT XEL5050-223ME *WHEN VIN > 24V, VOUT FOLLOWS VIN WHEN VIN 10V, VOUT FOLLOWS VIN WHEN VIN < 8V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT8330 1A (ISW), 60V, 2MHz High Efficiency Boost/SEPIC/ Inverting DC/DC Converter VIN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation), ISD = 
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LT8336EV#PBF
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