LTC3443
High Current Micropower
600kHz Synchronous Buck-Boost
DC/DC Converter
U
FEATURES
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DESCRIPTIO
Regulated Output with Input Above, Below or Equal
to the Output
Single Inductor, No Schottky Diodes
High Efficiency: Up to 96%
28μA Quiescent Current in Burst Mode® Operation
Up to 1.2A Continuous Output Current from a Single
Lithium-Ion
True Output Disconnect in Shutdown
2.4V to 5.5V Input Range
2.4V to 5.25V Output Range
600kHz Fixed Frequency Operation
Synchronizable Oscillator
Selectable Burst Mode or Fixed Frequency Operation
1.4V to
enable the IC and >2.4V to ensure the error amp is not
clamped from soft-start. An RC from the shutdown command signal to this pin will provide a soft-start function by
limiting the rise time of the VC pin.
GND (Pin 2): Signal Ground for the IC.
PGND (Pins 3, 6, 13 Exposed Pad): Power Ground for the
Internal NMOS Power Switches. The exposed pad must be
soldered to PCB ground for optimal thermal performance.
SW1 (Pin 4): Switch pin where the internal switches A and
B are connected. Connect inductor from SW1 to SW2. An
optional Schottky diode can be connected from this SW1
to ground. Minimize trace length to keep EMI down.
SW2 (Pin 5): Switch pin where the internal switches C
and D are connected. An optional Schottky diode can be
connected from SW2 to VOUT (it is required where
VOUT > 4.3V). Minimize trace length to keep EMI down.
MODE/SYNC (Pin 7): Burst Mode Select and Oscillator
Synchronization.
MODE/SYNC = High: Enable Burst Mode Operation.
During the period where the IC is supplying energy to
the output, the inductor peak inductor current will reach
0.8A and return to zero current on each cycle. In Burst
Mode operation the operation is variable frequency,
which provides a significant efficiency improvement at
light loads. The Burst Mode operation will continue until
the pin is driven low.
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LTC3443
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PI FU CTIO S
MODE/SYNC = Low: Disable Burst Mode operation and
maintain low noise, constant frequency operation .
PVIN (Pin 9): Power VIN Supply Pin. A 10μF ceramic capacitor is recommended as close to the PVIN and PGND pins
as possible
MODE/SYNC = External CLK : Synchronization of the
internal oscillator and Burst Mode operation disable. A
clock pulse width between 100ns and 2μs and a clock
frequency between 1.38MHz and 2.4MHz (twice the
desired frequency) is required to synchronize the IC.
VIN (Pin 10): Input Supply Pin. Internal VCC for the IC.
VC (Pin 11): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to
compensate the loop. See the section “Compensating the
Feedback Loop” for guidelines.
fOSC = fSYNC/2
FB (Pin 12): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.4V to
5.25V. The feedback reference voltage is typically 1.22V.
VOUT (Pin 8): Output of the Synchronous Rectifier. A filter
capacitor is placed from VOUT to GND. A ceramic bypass
capacitor is recommended as close to the VOUT and GND
pins as possible.
W
BLOCK DIAGRA
SW1
10
5
4
SW2
SW D
SW A
VIN
SW B
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
VOUT
ISENSE
AMP
gm = 1 k
100
–
PGND
AVERAGE
CURRENT LIMIT
+
1.22V
R1
–
PWM
COMPARATORS
–
UVLO
+
PWM
LOGIC
AND
OUTPUT
PHASING
ERROR
AMP
+
–
FB
12
CLAMP
+
–
2.4V
MODE
–
+
VCC
INTERNAL
CLAMP
THERMAL
SHUTDOWN
SUPPLY
CURRENT
LIMIT
4A
8
REVERSE
CURRENT
LIMIT
+
3.2A
VOUT
2.4V TO 5.25V
–0.4A
SW C
–
9
+
PVIN
+
VIN
2.4V TO 5.5V
VC
600kHz
OSC
11
R2
SYNC
SLEEP
Burst Mode
OPERATION
CONTROL
÷2
SHUTDOWN
SHDN/SS
RSS
VIN
1
5μs DELAY
7
MODE/SYNC
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
CSS
2
GND
6
PGND
3443 BD
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LTC3443
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OPERATIO
The LTC3443 provides high efficiency, low noise power for
applications such as portable instrumentation. The LTC
proprietary topology allows input voltages above, below or
equal to the output voltage by properly phasing the output
switches. The error amp output voltage on the VC pin determines the output duty cycle of the switches. Since the
VC pin is a filtered signal, it provides rejection of frequencies from well below the switching frequency. The low
RDS(ON), low gate charge synchronous switches provide
high frequency pulse width modulation control at high
efficiency. Schottky diodes across the synchronous switch
D and synchronous switch B are not required, but provide
a lower drop during the break-before-make time (typically
15ns). The addition of the Schottky diodes will improve peak
efficiency by typically 1% to 2%. High efficiency is achieved
at light loads when Burst Mode operation is entered and
when the IC’s quiescent current is a low 28μA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is factory trimmed to 600kHz.
The oscillator can be synchronized with an external clock
applied to the MODE/SYNC pin. A clock frequency of twice
the desired switching frequency and with a pulse width
of at least 100ns is applied. The oscillator sync range
is 690kHz to 1.2MHz (1.38MHz to 2.4MHz sync
frequency).
Error Amp
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier to obtain stability of the converter. The SHDN/SS
pin will clamp the error amp output, VC, to provide a softstart function.
Supply Current Limit
The current limit amplifier will shut PMOS switch A off
once the current exceeds 4A typical. Before the switch
current limit, the average current limit amp (3.2A typical)
will source current into the FB pin to drop the output
voltage. The current amplifier delay to output is typically
50ns.
Reverse Current Limit
The reverse current limit amplifier monitors the inductor
current from the output through switch D. Once a negative
inductor current exceeds – 400mA typical, the IC will shut
off switch D.
Output Switch Control
Figure 1 shows a simplified diagram of how the four
internal switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LTC3443 as a function of the internal control voltage, VCI.
The VCI voltage is a level shifted voltage from the output of
the error amp (VC pin) (see Figure 5). The output switches
are properly phased so the transfer between operation
modes is continuous, filtered and transparent to the user.
When VIN approaches VOUT the Buck/Boost region is
reached where the conduction time of the four switch
region is typically 150ns. Referring to Figures 1 and 2, the
various regions of operation will now be described.
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during this
mode. When the internal control voltage, VCI, is above
voltage V1, output A begins to switch. During the off time
of switch A, synchronous switch B turns on for the
remainder of the time. Switches A and B will alternate
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LTC3443
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OPERATIO
PVIN
VOUT
9
8
VOUT
PMOS D
PMOS A
SW1
SW2
4
5
NMOS B
NMOS C
3443 F01
Figure 1. Simplified Diagram of Output Switches
75%
DMAX
BOOST
A ON, B OFF
BOOST REGION
PWM CD SWITCHES
DMIN
BOOST
DMAX
BUCK
FOUR SWITCH PWM
BUCK/BOOST REGION
D ON, C OFF
PWM AB SWITCHES BUCK REGION
0%
DUTY
CYCLE
3443 F02
Figure 2. Switch Control vs Internal Control Voltage, VCI
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LTC3443
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OPERATIO
similar to a typical synchronous buck regulator. As the
control voltage increases, the duty cycle of switch A
increases until the maximum duty cycle of the converter in
Buck mode reaches DMAX_BUCK, given by:
DMAX_BUCK = 100 – D4SW %
where D4SW = duty cycle % of the four switch range.
D4SW = (150ns • f) • 100 %
where f = operating frequency, Hz.
Beyond this point the “four switch,” or Buck/Boost region
is reached.
Buck/Boost or Four Switch (VIN ~ VOUT)
When the internal control voltage, VCI, is above voltage V2,
switch pair AD remain on for duty cycle DMAX_BUCK, and
the switch pair AC begins to phase in. As switch pair AC
phases in, switch pair BD phases out accordingly. When
the VCI voltage reaches the edge of the Buck/Boost range,
at voltage V3, the AC switch pair completely phase out the
BD pair, and the boost phase begins at duty cycle D4SW.
The input voltage, VIN, where the four switch region begins
is given by:
VIN =
VOUT
V
1 – (150ns • f)
The point at which the four switch region ends is given by:
VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V
Boost Region (VIN < VOUT)
Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is above
voltage V3, switch pair CD will alternately switch to
provide a boosted output voltage. This operation is typical
to a synchronous boost regulator. The maximum duty
cycle of the converter is limited to 88% typical and is
reached when VCI is above V4.
Burst Mode OPERATION
Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
28μA. In this mode the output ripple has a variable
frequency component that depends upon load current.
During the period where the device is delivering energy to
the output, the peak current will be equal to 800mA typical
and the inductor current will terminate at zero current for
each cycle. In this mode the typical maximum average
output current is given by:
IOUT(MAX)BURST ≈
0.2 • VIN
A
VOUT + VIN
Burst Mode operation is user controlled, by driving the
MODE/SYNC pin high to enable and low to disable.
The peak efficiency during Burst Mode operation is less
than the peak efficiency during fixed frequency because
the part enters full-time 4-switch mode (when servicing
the output) with discontinuous inductor current as illustrated in Figures 3 and 4. During Burst Mode operation, the
control loop is nonlinear and cannot utilize the control
voltage from the error amp to determine the control mode,
therefore full-time 4-switch mode is required to maintain
the Buck/Boost function. The efficiency below 1mA
becomes dominated primarily by the quiescent current
and not the peak efficiency. The equation is given by:
Efficiency Burst ≈
( ηbm) • ILOAD
25μA + ILOAD
where (ηbm) is typically 80% during Burst Mode
operation.
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LTC3443
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OPERATIO
The soft-start function is combined with shutdown. When
the SHDN/SS pin is brought above typically 1V, the IC is
enabled but the EA duty cycle is clamped from the VC pin.
A detailed diagram of this function is shown in Figure 5.
The components RSS and CSS provide a slow ramping
voltage on the SHDN/SS pin to provide a soft-start
function.
PVIN
VOUT
PVIN
VOUT
9
8
9
8
4
+
SW1
dI ≈ VIN
dt
L
L
D
–
5
SW2
B
C
A
IINDUCTOR
A
800mA
4
–
dI ≈ – VOUT
L
dt
D
+
L
SW1
5
SW2
B
0mA
C
IINDUCTOR
SOFT-START
800mA
0mA
3443 F03
T1
T2
6
6
GND
GND
Figure 3. Inductor Charge Cycle During Burst Mode Operation
3443 F04
Figure 4. Inductor Discharge Cycle During Burst Mode Operation
ERROR AMP
VIN
14μA
+
VOUT
1.22V
R1
FB
–
12
VC
SOFT-START
CLAMP
TO PWM
COMPARATORS
CP1
R2
11
VCI
SHDN/SS
RSS
ENABLE SIGNAL
1
CSS
+
3443 F05
CHIP
ENABLE
–
1V
Figure 5. Soft-Start Circuitry
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APPLICATIO S I FOR ATIO
COMPONENT SELECTION
1 SHDN/SS
FB 12
2 GND
VC 11
3 PGND
VIN 10
4 SW1
PVIN 9
5 SW2
VOUT 8
6 PGND
MODE 7
VIN
VOUT
For high efficiency, choose an inductor with a high frequency core material, such as ferrite, to reduce core loses.
The inductor should have low ESR (equivalent series
resistance) to reduce the I2R losses, and must be able to
handle the peak inductor current without saturating. Molded
chokes or chip inductors usually do not have enough core
to support the peak inductor currents in the 1A to 2A
region. To minimize radiated noise, use a toroid, pot core
or shielded bobbin inductor. See Table 1 for suggested
components and Table 2 for a list of component suppliers.
Table 1. Inductor Vendor Information
3443 F06
MULTIPLE VIAS
GND
Figure 6. Recommended Component Placement. Traces Carrying
High Current are Direct. Trace Area at FB and VC Pins are Kept
Low. Lead Length to Battery Should be Kept Short. VOUT and VIN
Ceramic Capacitors Close to the IC Pins
Inductor Selection
The high frequency operation of the LTC3443 allows the
use of small surface mount inductors. The inductor current ripple is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
L>
L>
(
)
VIN(MIN) • VOUT – VIN(MIN) • 100
f • IOUT(MAX ) • %Ripple • VOUT
(
)
VOUT • VIN(MAX ) – VOUT • 100
f • IOUT(MAX ) • %Ripple • VIN(MAX )
H,
H
where f = operating frequency, Hz
%Ripple = allowable inductor current ripple, %
VIN(MIN) = minimum input voltage, V
VIN(MAX) = maximum input voltage, V
VOUT = output voltage, V
IOUT(MAX) = maximum output load current
SUPPLIER
PHONE
FAX
WEB SITE
Coilcraft
(847) 639-6400
(847) 639-1469
www.coilcraft.com
Coiltronics
(561) 241-7876
(561) 241-9339
www.coiltronics.com
Murata
USA:
(814) 237-1431
(800) 831-9172
USA:
(814) 238-0490
www.murata.com
Sumida
USA:
www.japanlink.com/
(847) 956-0666 (847) 956-0702 sumida
Japan:
81(3) 3607-5111 81(3) 3607-5144
Output Capacitor Selection
The bulk value of the capacitor is set to reduce the ripple
due to charge into the capacitor each cycle. The steady
state ripple due to charge is given by:
%Ripple _ Boost =
%Ripple _ Buck =
(
)
%
)
%
IOUT(MAX) • VOUT – VIN(MIN) • 100
2
COUT • VOUT • f
(
IOUT(MAX) • VIN(MAX) – VOUT • 100
COUT • VIN(MAX) • VOUT • f
where COUT = output filter capacitor, F
The output capacitance is usually many times larger in
order to handle the transient response of the converter.
For a rule of thumb, the ratio of the operating frequency to
the unity-gain bandwidth of the converter is the amount
the output capacitance will have to increase from the
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LTC3443
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APPLICATIO S I FOR ATIO
above calculations in order to maintain the desired transient response.
The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden ceramic capacitors, AVX TPS series tantalum capacitors or
Sanyo POSCAP are recommended.
Input Capacitor Selection
Since the VIN pin is the supply voltage for the IC it is
recommended to place at least a 4.7μF, low ESR bypass
capacitor.
Table 2. Capacitor Vendor Information
SUPPLIER
PHONE
FAX
WEB SITE
AVX
(803) 448-9411
(803) 448-1943
www.avxcorp.com
Sanyo
(619) 661-6322
(619) 661-1055
www.sanyovideo.com
Taiyo Yuden (408) 573-4150
(408) 573-4159
www.t-yuden.com
Output Voltage > 4.3V
A Schottky diode from SW to VOUT is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between the SW1 pin
and GND. A Schottky diode from SW1 to VIN should also
be added as close to the pins as possible. For the higher
input voltages, VIN bypassing becomes more critical;
therefore, a ceramic bypass capacitor as close to the VIN
and GND pins as possible is also required.
Operating Frequency Selection
Additional quiescent current due to the output switches
GATE charge is given by:
Optional Schottky Diodes
Buck: 800e–12 • VIN • f
The Schottky diodes across the synchronous switches B
and D are not required (VOUT < 4.3V), but provide a lower
drop during the break-before-make time (typically 15ns)
of the NMOS to PMOS transition, improving efficiency.
Use a Schottky diode such as a Phillips PMEG2010EA or
equivalent. Do not use ordinary rectifier diodes, since the
slow recovery times will compromise efficiency. For applications with an output voltage above 4.3V, a Schottky
diode is required from SW2 to VOUT.
Boost: 400e–12 • (VIN + VOUT) • f
Output Voltage < 2.4V
The LTC3443 can operate as a buck converter with output
voltages as low as 0.4V. The part is specified at 2.4V
minimum to allow operation without the requirement of a
Schottky diode. Synchronous switch D is powered from
VOUT and the RDS(ON) will increase at low output voltages,
therefore a Schottky diode is required from SW2 to VOUT
to provide the conduction path to the output.
Buck/Boost: f • (1200e–12 • VIN + 400e–12 • VOUT)
where f = switching frequency
Closing the Feedback Loop
The LTC3443 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(Buck, Boost, Buck/Boost), but is usually no greater than
15. The output filter exhibits a double pole response is
given by:
fFILTER _ POLE =
1
Hz
2 • π • L • COUT
where COUT is the output filter capacitor.
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LTC3443
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APPLICATIO S I FOR ATIO
The output filter zero is given by:
fFILTER _ ZERO =
1
2 • π • RESR • COUT
Hz
where RESR is the capacitor equivalent series resistance.
A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:
2
fRHPZ
1
Hz
2 • π • 32 e3 • R1 • CP1
Which is extremely close to DC
1
fZERO1 =
Hz
2 • π • RZ • CP1
1
fZERO2 =
Hz
2 • π •R1 • CZ 1
fPOLE1 ≈
VIN
=
Hz
2 • π • IOUT • L • VOUT
fPOLE2 =
1
Hz
2 • π • RZ • CP 2
The loop gain is typically rolled off before the RHP zero
frequency.
VOUT
+
ERROR
AMP
A simple Type I compensation network can be incorporated to stabilize the loop but at a cost of reduced bandwidth and slower transient response. To ensure proper
phase margin, the loop requires to be crossed over a
decade before the LC double pole.
The unity-gain frequency of the error amplifier with the
Type I compensation is given by:
fUG =
1
Hz
2 • π • R1 • CP1
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a
higher bandwidth, Type III compensation is required. Two
zeros are required to compensate for the double-pole
response.
1.22V
R1
FB
–
12
CP1
VC
11
R2
3443 F07
Figure 7. Error Amplifier with Type I Compensation
VOUT
+
ERROR
AMP
–
1.22V
R1
CZ1
FB
12
VC
CP1
RZ
R2
11
CP2
3443 F08
Figure 8. Error Amplifier with Type III Compensation
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LTC3443
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TYPICAL APPLICATIO S
Li-Ion to 3.3V at 1.2A Converter
L1
6μH
4
9
2.8V TO 4.2V
Li-Ion
D2
C1
10μF
SW2
5
8
VOUT
12
LTC3443
FB
1
11
VC
SHDN/SS
7
2
MODE/SYNC GND
3
6
PGND
PGND
10
*
SW1
D1
PVIN
VIN
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
340k
15k
220pF
2.2k
VOUT
3.3V
1.2A
C2
44μF
(2 × 22μF)
560pF
200k
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: PHILLIPS PMEG2010EA
L1: SUMIDA CDRH6D28-6R0NC
3443 TA03a
Efficiency vs Load
100
90
EFFICIENCY (%)
80
Burst Mode
OPERATION
70
60
50
40
VIN = 3.6V
VIN = 2.8V
VIN = 4.2V
30
20
10 WITH SCHOTTKY DIODES:
PHILIPS PMEG2010EA
0
0.1
1
10
100
IOUT (mA)
1000
10000
3443 TA03b
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LTC3443
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PACKAGE DESCRIPTIO
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 ±0.05
3.60 ±0.05
2.20 ±0.05
3.30 ±0.05
1.70 ± 0.05
PACKAGE OUTLINE
0.25 ± 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10
(2 SIDES)
7
R = 0.115
TYP
0.40 ± 0.10
12
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 ±0.10
(2 SIDES)
0.75 ±0.05
3.30 ±0.10
1.70 ± 0.10
6
0.25 ± 0.05
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
1
(UE12/DE12) DFN 0806 REV D
0.50 BSC
2.50 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3443fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3443
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IQ = 40μA, ISD ≤ 1μA, 10-Lead MS
LTC3411
1.25A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V,
IQ = 60μA, ISD ≤ 1μA, 10-Lead MS
LTC3412
2.5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V,
IQ = 60μA, ISD ≤ 1μA, TSSOP16E
LTC3440
600mA (IOUT) 2MHz Synchronous Buck-Boost DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V,
IQ = 25μA, ISD ≤ 1μA, 10-Lead MS
LTC3441
High Current Micropower 1MHz Synchronous Buck-Boost
DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V,
IQ = 25μA, ISD ≤ 1μA, DFN
ThinSOT is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
LT 0507 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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www.linear.com
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