LTC3783
PWM LED Driver and Boost,
Flyback and SEPIC Controller
DESCRIPTION
FEATURES
True Color PWMTM Delivers Constant Color with
3000:1 Dimming Ratio
n Fully Integrated Load FET Driver for PWM Dimming
Control of High Power LEDs
n 100:1 Dimming from Analog Inputs
n Wide FB Voltage Range: 0V to 1.23V
n Constant Current or Constant Voltage Regulation
n Low Shutdown Current: I = 20µA
Q
n 1% 1.23V Internal Voltage Reference
n 2% RUN Pin Threshold with 100mV Hysteresis
n Programmable Operating Frequency
(20kHz to 1MHz) with One External Resistor
n Synchronizable to an External Clock Up to 1.3f
OSC
n Internal 7V Low Dropout Voltage Regulator
n Programmable Output Overvoltage Protection
n Programmable Soft-Start
TM
n Can be Used in a No R
SENSE Mode for VDS < 36V
n 16-Lead DFN and TSSOP Packages
n
APPLICATIONS
n
n
n
n
n
The LTC®3783 is a current mode LED driver and boost,
flyback and SEPIC controller that drives both an N-channel
power MOSFET and an N-channel load PWM switch. When
using an external load switch, the PWMIN input not only
drives PWMOUT, but also enables controller GATE switching and error amplifier operation, allowing the controller
to store load current information while PWMIN is low.
This feature (patent pending) provides extremely fast,
true PWM load switching with no transient overvoltage
or undervoltage issues; LED dimming ratios of 3000:1
can be achieved digitally, avoiding the color shift normally
associated with LED current dimming. The FBP pin allows
analog dimming of load current, further increasing the
effective dimming ratio by 100:1 over PWM alone.
In applications where output load current must be returned
to VIN, optional constant current/constant voltage regulation controls either output (or input) current or output
voltage and provides a limit for the other. ILIM provides a
10:1 analog dimming ratio.
For low- to medium-power applications, No RSENSE mode
can utilize the power MOSFET’s on-resistance to eliminate
the current-sense resistor, thereby maximizing efficiency.
High Voltage LED Arrays
Telecom Power Supplies
42V Automotive Systems
24V Industrial Controls
IP Phone Power Supplies
The IC’s operating frequency can be set with an external
resistor over a 20kHz to 1MHz range and can be synchronized to an external clock using the SYNC pin.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
True Color PWM and No RSENSE are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
The LTC3783 is available in the 16-lead DFN and TSSOP
packages.
TYPICAL APPLICATION
350mA PWM LED Boost Application
VIN
6V TO 16V
(< TOTAL VF OF LEDs)
10µF
×2
1M
Typical Waveforms
2.2µH
ZETEX ZLLS1000
LTC3783
105k
0.1µF
10µF
10k
6k
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
GATE
VREF
FBP
SENSE
FBN
INTVCC
GND
FREQ
SYNC
237k
M1
VPWMIN
5V/DIV
VOUT
2.5V), connect this pin to the negative side of the
current-regulating resistor. Nominal voltage for this pin in
regulation is either VFBP or (VFBP – 100mV) for VILIM = 1.23V,
depending on operational mode (voltage or constant current/constant voltage) set by the voltage at VFBP .
FBP (Pin 2): Error Amplifier Noninverting Input/Positive
Current Sense Pin. This pin voltage determines the control
loop’s feedback mode (voltage or constant current/constant
voltage), the threshold of which is approximately 2V. In
voltage mode (VFBP ≤ VREF), this pin represents the desired
voltage which the regulated loop will cause FBN to follow.
In constant current/constant voltage mode (VFBP > 2.5V),
connect this pin to the positive side of the load currentsensing resistor. The acceptable input ranges for this pin
are 0V to 1.23V (voltage mode) and 2.5V to 36V (constant
current/constant voltage mode).
ILIM(Pin 3): Current Limit Pin. Sets current sense resistor offset voltage (VFBP – VFBN) in constant current mode
regulation (i.e., when VFBP > 2.5V). Offset voltage is 100mV
when VILIM = 1.23V and decreases proportionally with VILIM.
Nominal voltage range for this pin is 0.1V to 1.23V.
VREF (Pin 4): Reference Voltage Pin. Provides a buffered
version of the internal bandgap voltage, which can be
connected to FBP either directly or with attenuation.
Nominal voltage for this pin is 1.23V. This pin should
never be bypassed by a capacitor to GND. Instead, a 10k
resistor to GND should be used to lower pin impedance
in noisy systems.
FREQ (Pin 5): A resistor from the FREQ pin to ground
programs the operating frequency of the chip. The nominal
voltage at the FREQ pin is 0.615V.
SYNC (Pin 6): This input allows for synchronizing the operating frequency to an external clock and has an internal
100k pull-down resistor.
PWMIN (Pin 7): PWM Gate Driver Input. Internal 100k
pull-up resistor. While PWMIN is low, PWMOUT is low,
GATE stops switching and the external ITH network is
disconnected, saving the ITH state.
PWMOUT (Pin 8): PWM Gate Driver Output. Used for constant current dimming (LED load) or for output disconnect
(step-up power supply).
GATE (Pin 9): Main Gate Driver Output for the Boost
Converter.
INTVCC (Pin 10): Internal 7V Regulator Output. The main
and PWM gate drivers and control circuits are powered
from this voltage. Decouple this pin locally to the IC ground
with a minimum of 4.7µF low ESR ceramic capacitor.
VIN (Pin 11): Main Supply Pin. Must be closely decoupled
to ground.
SENSE (Pin 12): Current Sense Input for the Control Loop.
Connect this pin to the drain of the main power MOSFET
for VDS sensing and highest efficiency for VSENSE ≤ 36V.
Alternatively, the SENSE pin may be connected to a resistor
in the source of the main power MOSFET. Internal leadingedge blanking is provided for both sensing methods.
SS (Pin 13): Soft-Start Pin. Provides a 50µA pull-up current,
enabled and reset by RUN, which charges an optional external
capacitor. This voltage ramp translates into a corresponding
current limit ramp through the main MOSFET.
OV/FB (Pin 14): Overvoltage Pin/Voltage Feedback Pin.
In voltage mode (VFBP ≤ VREF), this input, connected to
VOUT through a resistor network, sets the output voltage
at which GATE switching is disabled in order to prevent
an overvoltage situation. Nominal threshold voltage for
the OV pin is 1.32V (VREF + 7%) with 20mV hysteresis. In
current/voltage mode (VFBP > 2.5V), this pin senses VOUT
through a resistor divider and brings the loop into voltage
regulation such that pin voltage approaches VREF = 1.23V,
provided the loop is not regulating the load current (e.g.,
[VFBP – VFBN] < 100mV for ILIM = 1.23V).
3783fb
7
LTC3783
PIN FUNCTIONS
ITH (Pin 15): Error Amplifier Output/Compensation Pin. The
current comparator input threshold increases with this control
voltage, which is the output of the gm type error amplifier.
Nominal voltage range for this pin is 0V to 1.40V.
RUN pin threshold is nominally 1.248V and the comparator
has 100mV hysteresis for noise immunity. When the RUN
pin is grounded, the IC is shut down and the VIN supply
current is kept to a low value (20µA typ).
RUN (Pin 16): The RUN pin provides the user with an accurate means for sensing the input voltage and programming the start-up threshold for the converter. The falling
Exposed Pad (Pin 17): Ground Pin. Solder to PCB ground
for electrical contact and rated thermal performance.
BLOCK DIAGRAM
VREF
SLOPE
COMP
5
BIAS
V-TO-I
OSC
CLK
S
2
1
14
13
15
7
ILIM
–
+
IVMODE
OV/FB
OV/FB
VREF
EA
A
VREF
–
–
+
1S
+
–
0
+
–
TEMP
SENSOR
(165°C)
OV
4
17
+
–
9
OT
SENSE
+
–
ITRIP
0.2V
GATE
LOGIC
R
FBP
FBN
SS_RESET
Q
SYNC
1.9V
3
GND
FREQ
0.615V
6
VREF
12
SLEEP
50mA
SS
IMAX
ITH
+
–
0.15V
V-TO-I
PWMIN
PWMOUT
8
EN
10
INTVCC
LDO
VREF
2.23V
+
–
UV
BIAS AND
START-UP
+
–
RUN
16
VREF
VIN
11
3738 BD
3783fb
8
LTC3783
OPERATION
Main Control Loop
The LTC3783 is a constant frequency, current mode controller for PWM LED as well as DC/DC boost, SEPIC and
flyback converter applications. In constant current LED
applications, the LTC3783 provides an especially wide PWM
dimming range due to its unique switching scheme, which
allows PWM pulse widths as short as several converter
switching periods.
For voltage feedback circuit operation (defined by VFBP ≤
1.23V), please refer to the Block Diagram of the IC and the
Typical Application on the first page of this data sheet. In
normal operation with PWMIN high, the power MOSFET
is turned on (GATE goes high) when the oscillator sets
the PWM latch, and is turned off when the ITRIP current
comparator resets the latch. Based on the error voltage
represented by (VFBP – VFBN), the error amplifier output
signal at the ITH pin sets the ITRIP current comparator input
threshold. When the load current increases, a fall in the
FBN voltage relative to the reference voltage at FBP causes
the ITH pin to rise, causing the ITRIP current comparator
to trip at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
When PWMIN goes low, PWMOUT goes low, the ITH switch
opens and GATE switching is disabled. Lowering PWMOUT
and disabling GATE causes the output capacitor COUT to
hold the output voltage constant in the absence of load
current. Opening the ITH switch stores the correct load
current value on the ITH capacitor CITH. As a result, when
PWMIN goes high again, both ITH and VOUT are instantly
at the appropriate levels.
In voltage feedback operation, an overvoltage comparator, OV, senses when the OV/FB pin exceeds the reference
voltage by 7% and provides a reset pulse to the main RS
latch. Because this RS latch is reset-dominant, the power
MOSFET is actively held off for the duration of an output
overvoltage condition.
For constant current/constant voltage regulation operation
(defined by VFBP > 2.5V), please refer to the Block Diagram
of the IC and Figure 11. Loop operation is similar to the
voltage feedback, except FBP and FBN now sense the
voltage across sense resistor RL in series with the load.
The ITH pin now represents the error from the desired differential set voltage, from 10mV to 100mV, for ILIM values
of 0.123V to 1.23V. That is, with VILIM = 1.23V, the loop
will regulate such that VFBP – VFBN = 100mV; lower values
of ILIM attenuate the difference proportionally. PWMIN is
still functional as above, but will only work properly if load
current can be disconnected by the PWMOUT signal.
In constant current/constant voltage operation, the OV/FB
pin becomes a voltage feedback pin, which causes the loop
to regulate such that VOV/FB = 1.23V, provided the above
current-sense voltage is not reached. In this way, the loop
regulates either voltage or current, whichever parameter
hits its preset limit first.
The nominal operating frequency of the LTC3783 is programmed using a resistor from the FREQ pin to ground
and can be controlled over a 20kHz to 1MHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the SYNC pin and can be locked
to a frequency between 100% and 130% of its nominal
value. When the SYNC pin is left open, it is pulled low by
an internal 100k resistor. With no load, or an extremely
light one, the controller will skip pulses in order to maintain
regulation and prevent excessive output ripple.
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V reference and RUN comparator allow the user to program the
supply voltage at which the IC turns on and off (the RUN
comparator has 100mV of hysteresis for noise immunity).
With the RUN pin below 1.248V, the chip is off and the
input supply current is typically only 20µA.
3783fb
9
LTC3783
OPERATION
The LTC3783 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in the Typical Application
on the first page of this data sheet. Sensing the voltage
across the power MOSFET maximizes converter efficiency
and minimizes the component count, but limits the output voltage to the maximum rating for this pin (36V). By
connecting the SENSE pin to a resistor in the source of
the power MOSFET, the user is able to program output
voltages significantly greater than 36V, limited only by
other components’ breakdown voltages.
Externally Synchronized Operation
When an external clock signal drives the SYNC pin at a
rate faster than the chip’s internal oscillator, the oscillator
will synchronize to it. When the oscillator’s internal logic
circuitry detects a synchronizing signal on the SYNC pin,
the internal oscillator ramp is terminated early and the
slope compensation is increased by approximately 25%.
As a result, in applications requiring synchronization, it
is recommended that the nominal operating frequency of
the IC be programmed to be about 80% of the external
clock frequency. Attempting to synchronize to too high
an external frequency (above 1.3fOSC) can result in inadequate slope compensation and possible subharmonic
oscillation (or jitter).
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 1. The MOSFET turn-on will synchronize to the
rising edge of the external clock signal.
2V TO 7V
MODE/
SYNC
tMIN = 25ns
0.8T
GATE
T
T = 1/fO
D = 40%
IL
3783 F01
Figure 1. MODE/SYNC Clock Input and Switching Waveforms
for Synchronized Operation
frequency operation requires more inductance for a given
amount of load current.
The LTC3783 uses a constant frequency architecture that
can be programmed over a 20kHz to 1MHz range with
a single external resistor from the FREQ pin to ground,
as shown in the application on the first page of this data
sheet. The nominal voltage on the FREQ pin is 0.615V,
and the current that flows out of the FREQ pin is used to
charge and discharge an internal oscillator capacitor. The
oscillator frequency is trimmed to 300kHz with RT = 20k.
A graph for selecting the value of RT for a given operating
frequency is shown in Figure 2.
1000
100
RT (kΩ)
The SS pin provides a soft-start current to charge an
external capacitor. Enabled by RUN, the soft-start current
is 50µA, which creates a positive voltage ramp on VSS
to which the internal ITH is limited, avoiding high peak
currents on start-up. Once VSS reaches 1.23V, the full ITH
range is established.
10
Programming the Operating Frequency
The choice of operating frequency and inductor value is
a tradeoff between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET and diode switching losses. However, lower
1
1
10
100
1000
FREQUENCY (kHz)
10000
3783 G09
Figure 2. Timing Resistor (RT) Value
3783fb
10
LTC3783
OPERATION
INTVCC Regulator Bypassing and Operation
An internal, P-channel low dropout voltage regulator produces the 7V supply which powers the gate drivers and
logic circuitry within the LTC3783 as shown in Figure 3.
The INTVCC regulator can supply up to 50mA and must be
bypassed to ground immediately adjacent to the IC pins
with a minimum of 4.7µF low ESR or ceramic capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate driver.
For input voltages that don’t exceed 8V (the absolute
maximum rating for INTVCC is 9V), the internal low dropout
regulator in the LTC3783 is redundant and the INTVCC pin
can be shorted directly to the VIN pin. With the INTVCC
pin shorted to VIN, however, the divider that programs the
regulated INTVCC voltage will draw 15µA from the input supply, even in shutdown mode. For applications that require
the lowest shutdown mode input supply current, do not
connect the INTVCC pin to VIN. Regardless of whether the
INTVCC pin is shorted to VIN or not, it is always necessary
to have the driver circuitry bypassed with a 4.7µF low ESR
ceramic capacitor to ground immediately adjacent to the
INTVCC and GND pins.
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
As a result, high input voltage applications in which a
large power MOSFET is being driven at high frequencies
can cause the LTC3783 to exceed its maximum junction
temperature rating. The junction temperature can be
estimated using the following equations:
IQ(TOT) = IQ + f • QG
PIC = VIN • (IQ + f • QG)
TJ = TA + PIC • qJA
The total quiescent current IQ(TOT) consists of the static
supply current (IQ) and the current required to charge and
discharge the gate of the power MOSFET. The 16-lead FE
package has a thermal resistance of qJA = 38°C/W and
the DHD package has an qJA = 43°C/W
As an example, consider a power supply with VIN = 12V
and VOUT = 25V at IOUT = 1A. The switching frequency is
300kHz, and the maximum ambient temperature is 70°C.
The power MOSFET chosen is the Si7884DP, which has a
maximum RDS(ON) of 10mΩ (at room temperature) and
INPUT
SUPPLY
6V TO 36V
VIN
1.230V
–
P-CH
+
CIN
R2
R1
LOGIC
7V
DRIVER
INTVCC
CVCC
4.7µF
X5R
GATE
M1
GND
3783 F03
6V-RATED
POWER
MOSFET
GND
PLACE AS CLOSE AS
POSSIBLE TO DEVICE PINS
Figure 3. Bypassing the LDO Regulator and Gate Driver Supply
3783fb
11
LTC3783
OPERATION
a maximum total gate charge of 35nC (the temperature
coefficient of the gate charge is low).
A similar analysis applies to the VFBP resistive divider, if
one is used:
IQ(TOT) = 1.2mA + 35nC • 300kHz = 12mA
VFBP = VREF •
R3
R3+R4
PIC = 12V • 12mA = 144mW
TJ = 70°C + 110°C/W • 144mW = 86°C
where R3 is subject to a similar 500nA bias current.
This demonstrates how significant the gate charge current
can be when compared to the static quiescent current in
the IC.
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked when
operating in a continuous mode at high VIN. A tradeoff
between the operating frequency and the size of the power
MOSFET may need to be made in order to maintain a reliable IC junction temperature. Prior to lowering the operating frequency, however, be sure to check with the power
MOSFET manufacturers for the latest low QG, low RDS(ON)
devices. Power MOSFET manufacturing technologies are
continually improving, with newer and better-performing
devices being introduced almost monthly.
Output Voltage Programming
In constant voltage mode, in order to regulate the output
voltage, the output voltage is set by a resistor divider according to the following formula:
R2
VOUT = VFBP • 1+
R1
where 0 ≤ VFBP ≤ 1.23V. The external resistor divider is
connected to the output as shown in Figure 4, allowing
remote voltage sensing. The resistors R1 and R2 are
typically chosen so that the error caused by the 500nA
input bias current flowing out of the FBN pin during
normal operation is less than 1%, which translates to
a maximum R1 value of about 25k at VFBP = 1.23V. For
lower FBP voltages, R1 must be reduced accordingly to
maintain accuracy, e.g., R1 < 2k for 1% accuracy when
VFBP = 100mV. More accuracy can be achieved with lower
resistances, at the expense of increased dissipation and
decreased light load efficiency.
LTC3783
R4
R3
VIN
3V TO 36V
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
GATE
VREF
FBP
SENSE
FBN
INTVCC
GND
FREQ
SYNC
VOUT
R2
R1
GND
3783 F04
Figure 4. LTC3783 Boost Application
Programming Turn-On and Turn-Off Thresholds
with the RUN Pin
The LTC3783 contains an independent, micropower voltage
reference and comparator detection circuit that remains
active even when the device is shut down, as shown in
Figure 5. This allows users to accurately program an input
voltage at which the converter will turn on and off. The
falling threshold on the RUN pin is equal to the internal
reference voltage of 1.248V. The comparator has 100mV
of hysteresis to increase noise immunity.
The turn-on and turn-off input voltage thresholds are
programed using a resistor divider according to the following formulas:
R2
VIN(OFF) = 1.248V • 1+
R1
R2
VIN(ON) = 1.348V • 1+
R1
The resistor R1 is typically chosen to be less than 1M.
3783fb
12
LTC3783
OPERATION
For applications where the RUN pin is only to be used as
a logic input, the user should be aware of the 7V Absolute
Maximum Rating for this pin! The RUN pin can be connected to the input voltage through an external 1M resistor,
as shown in Figure 5c, for “always on” operation.
Soft-Start Capacitor Selection
For proper soft-start operation, the LTC3783 should have
a sufficiently large soft-start capacitor, CSS, attached to
the SS pin. The minimum soft-start capacitor size can be
estimated on the basis of output voltage, capacitor size
and load current. In addition, PWM operation reduces the
effective SS capacitor value by the dimming ratio.
CSS(MIN) >
2 • dimming ratio • 50µA •COUT • VOUT •RDS(ON)/SENSE
assuming 50% ripple current, where RDS(ON)/SENSE
represents either the RDS(ON) of the switching MOSFET
or RSENSE, whichever is used on the SENSE pin. Dimming
ratio is described by 1/DPWM as shown in Figure 6.
Application Circuits
A basic LTC3783 PWM-dimming LED application is shown
on the first page of this data sheet.
Operating Frequency and PWM Dimming Ratio
The minimum operating frequency, fOSC, required for proper
operation of a PWM dimming application depends on the
minimum PWM frequency, fPWM, the dimming ratio 1/DPWM,
and N, the number of fOSC cycles per PWM cycle:
150mV •1.2V
fOSC >
N • fPWM
DPWM
VIN
+
R2
RUN
+
RUN
COMPARATOR
BIAS AND
START-UP
CONTROL
6V
INPUT
SUPPLY
–
OPTIONAL
FILTER
CAPACITOR
R1
1.248V
µPOWER
REFERENCE
GND
–
3783 F05a
Figure 5a. Programming the Turn-On and Turn-Off Thresholds Using the RUN Pin
+
RUN
COMPARATOR
RUN
EXTERNAL
LOGIC CONTROL
+
VIN
R2
1M
RUN
+
6V
INPUT
SUPPLY
–
6V
1.248V
RUN
COMPARATOR
3483 F05c
–
–
GND
1.248V
3483 F05b
Figure 5b. On/Off Control Using External Logic
Figure 5c. External Pull-Up Resistor on
RUN Pin for “Always On” Operation
3783fb
13
LTC3783
OPERATION
Figure 6 illustrates these various quantities in relation to
one another.
Typically, in order to avoid visible flicker, fPWM should be
greater than 120Hz. Assuming inductor and capacitor
sizing which is close to discontinuous operation, 2 fOSC
cycles are sufficient for proper PWM operation. Thus,
within the 1MHz rated maximum fOSC, a dimming ratio
of 1/DPWM = 3000 is possible.
DPWM/fPWM
1/fPWM
PWMIN
the output current needs to be reflected back to the input
in order to dimension the power MOSFET properly. Based
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
IOUT(MAX)
IIN(MAX) =
1–DMAX
The peak input current is:
c IOUT(MAX)
IIN(PEAK) = 1+ •
2 1–DMAX
The maximum duty cycle, DMAX, should be calculated at
minimum VIN.
#=N
GATE
3783 F06
1/fOSC
Figure 6. PWM Dimming Parameters
Boost Converter: Duty Cycle Considerations
For a boost converter operating in a continuous conduction
mode (CCM), the duty cycle of the main switch is:
V +V –V
D = OUT D IN
VOUT + VD
where VD is the forward voltage of the boost diode. For
converters where the input voltage is close to the output
voltage, the duty cycle is low, and for converters that
develop a high output voltage from a low input voltage,
the duty cycle is high. The maximum output voltage for a
boost converter operating in CCM is:
VIN(MIN)
VOUT(MAX) =
– VD
1–DMAX
The maximum duty cycle capability of the LTC3783 is
typically 90%. This allows the user to obtain high output
voltages from low input supply voltages.
Boost Converter: The Peak and Average Input Currents
The control circuit in the LTC3783 is measuring the input
current (either by using the RDS(ON) of the power MOSFET
or by using a sense resistor in the MOSFET source), so
Boost Converter: Ripple Current ∆IL and the ‘c’ Factor
The constant ‘c’ in the equation above represents the
percentage peak-to-peak ripple current in the inductor,
relative to its maximum value. For example, if 30% ripple
current is chosen, then c = 0.3, and the peak current is
15% greater than the average.
For a current mode boost regulator operating in CCM,
slope compensation must be added for duty cycles above
50% in order to avoid subharmonic oscillation. For the
LTC3783, this ramp compensation is internal. Having an
internally fixed ramp compensation waveform, however,
does place some constraints on the value of the inductor
and the operating frequency. If too large an inductor is
used, the resulting current ramp (∆IL) will be small relative
to the internal ramp compensation (at duty cycles above
50%), and the converter operation will approach voltage
mode (ramp compensation reduces the gain of the current
loop). If too small an inductor is used, but the converter is
still operating in CCM (near critical conduction mode), the
internal ramp compensation may be inadequate to prevent
subharmonic oscillation. To ensure good current mode
gain and to avoid subharmonic oscillation, it is recommended that the ripple current in the inductor fall in the
range of 20% to 40% of the maximum average current.
For example, if the maximum average input current is 1A,
choose a ∆IL between 0.2A and 0.4A, and correspondingly
a value ‘c’ between 0.2 and 0.4.
3783fb
14
LTC3783
OPERATION
Boost Converter: Inductor Selection
Given an operating input voltage range, and having chosen
the operating frequency and ripple current in the inductor,
the inductor value can be determined using the following
equation:
VIN(MIN)
L=
• DMAX
∆IL • f
been shown to contribute significantly to EMI. Any attempt
to damp it with a snubber will degrade the efficiency.
OUTPUT
VOLTAGE
200mV/DIV
INDUCTOR
CURRENT
1A/DIV
where :
∆IL =
c •IOUT(MAX)
1– DMAX
Remember that most boost converters are not short-circuit
protected. Under a shorted output condition, the inductor
current is limited only by the input supply capability. For
applications requiring a step-up converter that is shortcircuit protected, please refer to the applications section
covering SEPIC converters.
The minimum required saturation current of the inductor
can be expressed as a function of the duty cycle and the
load current, as follows:
c IOUT(MAX)
IL(SAT) > 1+ •
2 1– DMAX
The saturation current rating for the inductor should be
checked at the minimum input voltage (which results in the
highest inductor current) and maximum output current.
Boost Converter: Operating in Discontinuous Mode
Discontinuous mode operation occurs when the load current is low enough to allow the inductor current to run out
during the off-time of the switch, as shown in Figure 7.
Once the inductor current is near zero, the switch and diode
capacitances resonate with the inductance to form damped
ringing at 1MHz to 10MHz. If the off-time is long enough,
the drain voltage will settle to the input voltage.
Depending on the input voltage and the residual energy in
the inductor, this ringing can cause the drain of the power
MOSFET to go below ground where it is clamped by the body
diode. This ringing is not harmful to the IC and it has not
MOSFET
DRAIN
VOLTAGE
20V/DIV
1µs/DIV
3783 F07
Figure 7. Discontinuous Mode Waveforms
Boost Converter: Power MOSFET Selection
The power MOSFET can serve two purposes in the LTC3783:
it represents the main switching element in the power path,
and its RDS(ON) can represent the current sensing element
for the control loop. Important parameters for the power
MOSFET include the drain-to-source breakdown voltage
BVDSS, the threshold voltage VGS(TH), the on-resistance
RDS(ON) versus gate-to-source voltage, the gate-to-source
and gate-to-drain charges QGS and QGD, respectively, the
maximum drain current ID(MAX) and the MOSFET’s thermal
resistances qJC and qJA.
The gate drive voltage is set by the 7V INTVCC low drop
regulator. Consequently, 6V rated MOSFETs are required
in most high voltage LTC3783 applications. If low input
voltage operation is expected (e.g., supplying power
from a lithium-ion battery or a 3.3V logic supply), then
sublogic-level threshold MOSFETs should be used. Pay
close attention to the BVDSS specifications for the MOSFETs
relative to the maximum actual switch voltage in the application. Many logic-level devices are limited to 30V or
less, and the switch node can ring during the turn-off of
the MOSFET due to layout parasitics. Check the switching
waveforms of the MOSFET directly across the drain and
source terminals using the actual PC board layout for
excessive ringing.
3783fb
15
LTC3783
OPERATION
During the switch on-time, the IMAX comparator limits the
absolute maximum voltage drop across the power MOSFET
to a nominal 150mV, regardless of duty cycle. The peak
inductor current is therefore limited to 150mV/RDS(ON).
The relationship between the maximum load current, duty
cycle, and the RDS(ON) of the power MOSFET is:
1–DMAX
RDS(ON) < 150mV •
c
1+ •IOUT(MAX) • rT
2
The rT term accounts for the temperature coefficient of
the RDS(ON) of the MOSFET, which is typically 0.4%/°C.
Figure 8 illustrates the variation of normalized RDS(ON)
over temperature for a typical power MOSFET.
ρT NORMALIZED ON RESISTANCE
2.0
1.5
1.0
0.5
0
–50
50
100
0
JUNCTION TEMPERATURE (°C)
150
3783 F08
Figure 8. Normalized RDS(ON) vs Temperature
Another method of choosing which power MOSFET to
use is to check what the maximum output current is for a
given RDS(ON), since MOSFET on-resistances are available
in discrete values.
1– DMAX
IO(MAX) = 150mV •
c
1+ • RDS(ON) • rT
2
It is worth noting that the 1 - DMAX relationship between
IO(MAX) and RDS(ON) can cause boost converters with a
wide input range to experience a dramatic range of maximum input and output currents. This should be taken into
consideration in applications where it is important to limit
the maximum current drawn from the input supply, and
also to avoid triggering the 150mV IMAX comparator, as
this condition can result in excessive noise.
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
In order to calculate the junction temperature of the power
MOSFET, the power dissipated by the device must be known.
This power dissipation is a function of the duty cycle, the
load current, and the junction temperature itself (due to
the positive temperature coefficient of its RDS(ON). As a
result, some iterative calculation is normally required to
determine a reasonably accurate value. Since the controller
is using the MOSFET as both a switching and a sensing
element, care should be taken to ensure that the converter
is capable of delivering the required load current over all
operating conditions (line voltage and temperature), and
for the worst-case specifications for VSENSE(MAX) and the
RDS(ON) of the MOSFET listed in the manufacturer’s data
sheet.
The power dissipated by the MOSFET in a boost converter
is:
2
IOUT(MAX)
PFET =
•RDS(ON) •DMAX • rT +
1–DMAX
IOUT(MAX)
k • VOUT 1.85 •
•CRSS • f
1–DMAX
The first term in the equation above represents the I2R
losses in the device, and the second term, the switching
losses. The constant k = 1.7 is an empirical factor inversely
related to the gate drive current and has the dimension
of 1/current.
3783fb
16
LTC3783
OPERATION
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + PFET • qJA
for a given output ripple voltage. The effects of these three
parameters (ESR, ESL and bulk C) on the output voltage
ripple waveform are illustrated in Figure 9 for a typical
boost converter.
The qJA to be used in this equation normally includes the
qJC for the device plus the thermal resistance from the
case to the ambient temperature (qCA). This value of TJ
can then be compared to the original, assumed value used
in the iterative calculation process.
VOUT
(AC)
∆VCOUT
∆VESR
Boost Converter: Output Diode Selection
To maximize efficiency, a fast switching diode with low
forward drop and low reverse leakage is desired. The output
diode in a boost converter conducts current during the
switch off-time. The peak reverse voltage that the diode
must withstand is equal to the regulator output voltage.
The average forward current in normal operation is equal
to the output current, and the peak current is equal to the
peak inductor current.
c IOUT(MAX)
ID(PEAK) = IL(PEAK) = 1+ •
2 1– DMAX
The power dissipated by the diode is:
PD = IOUT(MAX) • VD
and the diode junction temperature is:
TJ = TA + PD • qJA
The qJA to be used in this equation normally includes the
qJC for the device plus the thermal resistance from the
board to the ambient temperature in the enclosure.
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased
dissipation.
Boost Converter: Output Capacitor Selection
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct component
3783 F09
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
Figure 9. Output Ripple Voltage
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging ∆V.
For the purpose of simplicity we will choose 2% for the
maximum output ripple, to be divided equally between the
ESR step and the charging/discharging ∆V. This percentage
ripple will change, depending on the requirements of the
application, and the equations provided below can easily
be modified.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the following equation:
V
ESRCOUT < 0.01• OUT
IIN(PEAK)
where :
c IOUT(MAX)
IIN(PEAK) = 1+ •
2 1– DMAX
For the bulk C component, which also contributes 1% to
the total ripple:
IOUT(MAX)
COUT >
0.01• VOUT • f
3783fb
17
LTC3783
OPERATION
For many designs it is possible to choose a single capacitor
type that satisfies both the ESR and bulk C requirements
for the design. In certain demanding applications, however,
the ripple voltage can be improved significantly by connecting two or more types of capacitors in parallel. For
example, using a low ESR ceramic capacitor can minimize
the ESR setup, while an electrolytic capacitor can be used
to supply the required bulk C.
Once the output capacitor ESR and bulk capacitance have
been determined, the overall ripple voltage waveform
should be verified on a dedicated PC board (see Board
Layout section for more information on component placement). Lab breadboards generally suffer from excessive
series inductance (due to inter-component wiring), and
these parasitics can make the switching waveforms look
significantly worse than they would be on a properly
designed PC board.
The output capacitor in a boost regulator experiences
high RMS ripple currents. The RMS output capacitor
ripple current is:
I RMS(COUT) ; I OUT(MAX) •
VOUT – VIN(MIN)
VIN(MIN)
Note that the ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
Boost Converter: Input Capacitor Selection
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input, and hence, the input current
waveform is continuous (see Figure 10). The input voltage source impedance determines the size of the input
capacitor, which is typically in the range of 10µF to 100µF.
A low ESR capacitor is recommended, although it is not
as critical as for the output capacitor.
IIN
IL
3783 F10
Figure 10. Inductor and Input Currents
The RMS input capacitor ripple current for a boost
converter is:
IRMS(CIN) ; 0.3 •
VIN(MIN)
L•f
•DMAX
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter, and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
Boost Converter Design Example
The design example given here will be for the circuit shown
in Figure 1. The input voltage is 12V, and the output voltage
is 25V at a maximum load current of 0.7A (1A peak).
1. The duty cycle is:
V +V –V
25+ 0.4 – 12
D = OUT D IN =
= 53%
VOUT + VD
25+ 0.4
2. The operating frequency is chosen to be 1MHz to
maximize the PWM dimming range. From Figure 2, the
resistor from the FREQ pin to ground is 6k.
3. An inductor ripple current of 40% of the maximum load
current is chosen, so the peak input current (which is also
the minimum saturation current) is:
0.7
c IOUT(MAX)
IIN(PEAK) = 1+ •
= 1.2 •
= 1.8A
2 1– DMAX
1– 0.53
The inductor ripple current is:
IOUT(MAX)
0.7
∆IL = c •
= 0.4 •
= 0.6A
1− DMAX
1− 0.53
3783fb
18
LTC3783
OPERATION
And so the inductor value is:
VIN(MIN)
12V
L=
• DMAX =
• 0.53 = 11µH
∆I
•
f
0.6A
•
1MHz
L
4. RSENSE should be:
RSENSE =
0.5 • VSENSE(MAX) 0.5 • 150mV
=
= 42mΩ
IIN(PEAK)
1.8A
5. The diode for this design must handle a maximum DC
output current of 0.7A and be rated for a minimum reverse
voltage of VOUT , or 25V. A 1A, 40V diode from Zetex was
chosen for its specifications, especially low leakage at
higher temperatures, which is important for maintaining
dimming range.
6. Voltage and value permitting, the output capacitor usually consists of some combination of low ESR ceramics.
Based on a maximum output ripple voltage of 1%, or
250mV, the bulk C needs to be greater than:
IOUT(MAX)
0.7A
COUT >
=
= 3µF
0.01•
V
•
f
0.01•
25V
•
1MHz
OUT
The RMS ripple current rating for this capacitor needs
to exceed:
VOUT – VIN(MIN)
IRMS(COUT) = IOUT(MAX) •
VIN(MIN)
= 0.7A •
25V – 12V
= 0.7A
12V
Based on value and ripple current, and taking physical
size into account, a surface mount ceramic capacitor is a
good choice. A 4.7µF TDK C5750X7R1H475M will satisfy
all requirements in a compact package.
7. The soft-start capacitor should be:
2 • dimming ratio • 50µA • COUT • VOUT • RDS(ON)/SENSE
150mV • 1.2V
2 • 3000 • 50µA • 4.7µF • 25V • 42mΩ
>
= 8µF
150mV • 1.2V
CSS(MIN) >
8. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design and lab setup, 20µF was found
to be satisfactory.
PC Board Layout Checklist
1. In order to minimize switching noise and improve output load regulation, the GND pad of the LTC3783 should
be connected directly to 1) the negative terminal of the
INTVCC decoupling capacitor, 2) the negative terminal of
the output decoupling capacitors, 3) the bottom terminals
of the sense resistors or the source of the power MOSFET,
4) the negative terminal of the input capacitor, and 5) at
least one via to the ground plane immediately under the
exposed pad. The ground trace on the top layer of the PC
board should be as wide and short as possible to minimize
series resistance and inductance.
2. Beware of ground loops in multiple layer PC boards. Try
to maintain one central ground node on the board and use
the input capacitor to avoid excess input ripple for high
output current power supplies. If the ground plane is to
be used for high DC currents, choose a path away from
the small-signal components.
3. Place the CVCC capacitor immediately adjacent to the
INTVCC and GND pins on the IC package. This capacitor
carries high di/dt MOSFET gate-drive currents. A low ESR
and ESL 4.7µF ceramic capacitor works well here.
4. The high di/dt loop from the bottom terminal of the output
capacitor, through the power MOSFET, through the boost
diode and back through the output capacitors should be
kept as tight as possible to reduce inductive ringing. Excess
inductance can cause increased stress on the power MOSFET
and increase HF noise on the output. If low ESR ceramic
capacitors are used on the output to reduce output noise,
place these capacitors close to the boost diode in order to
keep the series inductance to a minimum.
3783fb
19
LTC3783
OPERATION
5. Check the stress on the power MOSFET by measuring its
drain-to-source voltage directly across the device terminals
(reference the ground of a single scope probe directly to the
source pad on the PC board). Beware of inductive ringing
which can exceed the maximum specified voltage rating of
the MOSFET. If this ringing cannot be avoided and exceeds the
maximum rating of the device, either choose a higher voltage
device or specify an avalanche-rated power MOSFET.
6. Place the small-signal components away from high
frequency switching nodes. All of the small-signal components should be placed on one side of the IC and all
of the power components should be placed on the other.
This also allows the use of a pseudo-Kelvin connection for
the signal ground, where high di/dt gate driver currents
flow out of the IC ground pad in one direction (to bottom
plate of the INTVCC decoupling capacitor) and small-signal
currents flow in the other direction.
divider resistors near the LTC3783 in order to keep the
high impedance FBN node short.
9. For applications with multiple switching power converters connected to the same input supply, make sure that
the input filter capacitor for the LTC3783 is not shared
with any other converters. AC input current from another
converter could cause substantial input voltage ripple, and
this could interfere with the operation of the LTC3783. A
few inches of PC trace or wire (L ~ 100nH) between the
CIN of the LTC3783 and the actual source VIN should be
sufficient to prevent current-sharing problems.
Returning the Load to VIN: A Single Inductor
Buck-Boost Application
7. If a sense resistor is used in the source of the power
MOSFET, minimize the capacitance between the SENSE
pin trace and any high frequency switching nodes. The
LTC3783 contains an internal leading-edge blanking time
of approximately 160ns, which should be adequate for
most applications.
As shown in Figure 11, due to its available high side current
sensing mode, the LTC3783 is also well-suited to a boost
converter in which the load current is returned to VIN,
hence providing a load voltage (VOUT – VIN) which can be
greater or less than the input voltage VIN. This configuration
allows for complete overlap of input and output voltages,
with the disadvantages that only the load current, and not
the load voltage, can be tightly regulated. The switch must
be rated for a VDS(MAX) equal to VIN + VLOAD.
8. For optimum load regulation and true remote sensing,
the top of the output resistor should connect independently to the top of the output capacitor (Kelvin connection), staying away from any high dV/dt traces. Place the
The design of this circuit resembles that of the boost
converter above, and the procedure is much the same,
except VOUT is now (VIN + VLOAD), and the duty cycles
and voltages must be adjusted accordingly.
VIN
10µF, 50V
×2
UMK432C106MM
1M
PMEG6010
LTC3783
PWM
5V AT 0Hz TO 10Hz
100k
1µF
4.7µF
20k
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
GATE
VREF
FBP
SENSE
FBN
INTVCC
GND
FREQ
SYNC
10µH
SUMIDA
CDRH8D28-100
RL 9V TO 26V
0.28Ω
LED STRING 1-4 EA
LUMILEDS LHXL-BW02
EACH LED IS 3V TO 4.2V
AT 350mA
VOUT
40.2k
0V TO
1.23V
FAIRCHILD
FDN5630
10µF, 50V
C5750X7R1H106M
CERAMIC
4.7µF
0.05Ω
1k
GND
3783 F11
Figure 11. Single Inductor Buck-Boost Application with Analog Dimming and Low Frequency PWM Dimming
3783fb
20
LTC3783
OPERATION
Similar to the boost converter, which can be dimmed via
the digital PWMIN input or the analog FBP pin, the buckboost can be dimmed via the PWMIN pin or the analog
ILIM pin, which adjusts the offset voltage to which the loop
will drive (VFBP – VFBN). In the case of the buck-boost,
however, the dimming ratio cannot be as high as in the
boost converter, since there is no load switch to preserve
the VOUT level while PWMIN is low.
Using the LTC3783 for Buck Applications
As shown in Figure 12, high side current sensing also allows the LTC3783 to control a functional buck converter
when load voltage is always sufficiently less than VIN. In
this scheme the input voltage to the inductor is lowered
by the load voltage. The boost converter now sees a
VIN’ = VIN – VLOAD, meaning the controller is now boosting
from (VIN – VLOAD) to VIN.
VIN
6V TO 36V
LED STRING
LTC3783
RUN
VIN
PWMIN OV/FB
ITH PWMOUT
SS
ILIM
GATE
VREF
FBP
SENSE
FBN
INTVCC
GND
FREQ
SYNC
GND
3783 F12
Figure 12. LED Buck Application
3783fb
21
LTC3783
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHD Package
16-Lead Plastic DFN (5mm × 4mm)
(Reference LTC DWG # 05-08-1707)
0.70 ± 0.05
4.50 ± 0.05
3.10 ± 0.05
2.44 ± 0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.34 ± 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
5.00 ± 0.10
(2 SIDES)
R = 0.20
TYP
4.00 ± 0.10
(2 SIDES)
9
R = 0.115
TYP
0.40 ± 0.10
16
2.44 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
8
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ± 0.05
0.00 – 0.05
(DHD16) DFN 0504
4.34 ± 0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJGD-2) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3783fb
22
LTC3783
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
6.60 ± 0.10
4.50 ± 0.10
9
2.94
(.116)
6.40
2.94
(.252)
(.116)
BSC
SEE NOTE 4
0.45 ± 0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BC) TSSOP 0204
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3783fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3783
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT 1618
Monolithic 1.4MHz Boost Regulator
Constant-Current/Constant-Voltage, 1A Switch
LTC1871
Boost, Flyback, SEPIC Controller
No RSENSE, 2.5V ≤ VIN ≤ 36V, 92% Duty Cycle
LT3477
3A DC/DC LED Driver with Rail-to-Rail Current Sense
2.5V ≤ VIN ≤ 25V: Buck, Buck-Boost and Boost Topologies
LTC3780
High Power Buck-Boost Controller
4-Switch, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 30V
LTC3782
2-Phase Boost Controller
High Power, 6V ≤ VIN ≤ 40V, 150kHz to 500kHz
LTC3827/LTC3827-1
Low IQ Current Dual Controllers
2-Phase, 80µA IQ, 0.8V ≤ VOUT ≤ 10V, 4V ≤ VIN ≤ 36V
LTC4002
Standalone 2A Li-Ion Battery Charger
1- and 2-Cell, 4.7V ≤ VIN ≤ 22V, 3 Hour Timer
®
3783fb
24 Linear Technology Corporation
LT 0208 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2008