19-3059; Rev 5; 6/11
KIT
ATION
EVALU
E
L
B
A
IL
AVA
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Features
The MAX7313 I2C-compatible serial interfaced peripheral provides microprocessors with 16 I/O ports. Each
I/O port can be individually configured as either an
open-drain current-sinking output rated at 50mA and
5.5V, or a logic input with transition detection. A 17th
port can be used for transition detection interrupt, or as
a general-purpose output. The outputs are capable of
driving LEDs, or providing logic outputs with external
resistive pullup up to 5.5V.
o 400kbs, 2-Wire Serial Interface, 5.5V Tolerant
PWM current drive is integrated with 8 bits of control.
Four bits are global control and apply to all LED outputs
to provide coarse adjustment of current from fully off to
fully on with 14 intensity steps. Each output then has
individual 4-bit control, which further divides the globally set current into 16 more steps. Alternatively, the current control can be configured as a single 8-bit control
that sets all outputs at once.
o Supports Hot Insertion
o Two-Phase LED Blinking
o High Output Current (50mA max Per Port)
o Outputs are 5.5V-Rated Open Drain
o Inputs are Overvoltage Protected to 5.5V
o Transition Detection with Interrupt Output
o 1.2µA (typ), 3.6µA (max) Standby Current
o Small 4mm x 4mm TQFN Package
o -40°C to +125°C Temperature Range
o All Ports Can Be Configured as Inputs or Outputs
Ordering Information
PART
24 TQFN-EP*
MAX7313AEG+
-40°C to +125°C
24 QSOP
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed Pad.
P13
P12
P11
15
14
13
SCL 19
12 P10
SDA 20
11 P9
V+ 21
10 P8
MAX7313ATG
INT/O16 22
AD1 23
AD2 24
Typical Application Circuit appears at end of data sheet.
*EP
+
1
P0
Notebook Computers
16
2
3
4
5
6
P5
RGB LED Drivers
17
P4
Keypad Backlights
18
P3
Portable Equipment
P14
TOP VIEW
P15
Pin Configurations
P2
LED Status Indication
PIN-PACKAGE
-40°C to +125°C
Applications
LCD Backlights
TEMP RANGE
MAX7313ATG+
P1
Each output has independent blink timing with two blink
phases. All LEDs can be individually set to be on or off
during either blink phase, or to ignore the blink control.
The blink period is controlled by a register.
The MAX7313 supports hot insertion. All port pins, the
INT output, SDA, SCL, and the slave-address inputs
ADO-2 remain high impedance in power-down (V+ =0V)
with up to 6V asserted upon them.
The MAX7313 is controlled through the 2-wire
I2C/SMBus serial interface, and can be configured to
any one of 64 I2C addresses.
o Overall 8-Bit PWM LED Intensity Control
Global 16-Step Intensity Control
Individual 16-Step Intensity Controls
AD0
The MAX7313 is pin and software compatible with the
MAX7311, PCA9535, and PCA9555.
o 2V to 3.6V Operation
9
GND
8
P7
7
P6
TQFN
4mm x 4mm
*CONNECT EP TO GND
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX7313
General Description
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND)
V+ .............................................................................-0.3V to +4V
SCL, SDA, AD0, AD1, AD2, P0–P15 ........................-0.3V to +6V
INT/O16 ....................................................................-0.3V to +8V
DC Current on P0–P15, INT/O16 ........................................55mA
DC Current on SDA.............................................................10mA
Maximum GND Current ....................................................350mA
Continuous Power Dissipation (TA = +70°C)
24-Pin QSOP (derate 9.5mW/°C over +70°C)..............761mW
24-TQFN (derate 20.8mW/°C over +70°C) ................1666mW
Operating Temperature Range (TMIN to TMAX)-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETER
Operating Supply Voltage
Output Load External Supply
Voltage
Standby Current
(Interface Idle, PWM Disabled)
Supply Current
(Interface Idle, PWM Enabled)
Supply Current
(Interface Running, PWM
Disabled)
Supply Current
(Interface Running, PWM
Enabled)
SYMBOL
TYP
MAX
UNITS
2
3.6
V
VEXT
0
5.5
V
SCL and SDA at V+; other
digital inputs at V+ or GND;
PWM intensity control disabled
TA = +25°C
I+
TA = +25°C
I+
SCL and SDA at V+; other
digital inputs at V+ or GND;
PWM intensity control enabled
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control disabled
TA = +25°C
I+
I+
VIH
Input Low Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P15
VIL
Input Leakage Current
SDA, SCL, AD0, AD1, AD2,
P0–P15
IIH, IIL
2
MIN
V+
Input High Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P15
Input Capacitance
SDA, SCL, AD0, AD1, AD2,
P0–P15
CONDITIONS
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control enabled
1.2
TA = -40°C to +85°C
2.3
2.8
TA = TMIN to TMAX
3.6
8.5
TA = -40°C to +85°C
15.1
16.5
TA = TMIN to TMAX
µA
17.2
50
TA = -40°C to +85°C
95.3
99.2
TA = TMIN to TMAX
µA
102.4
TA = +25°C
57
110.2
TA = -40°C to +85°C
117.4
TA = TMIN to TMAX
122.1
0.7 ✕
V+
Input = GND or V+
µA
µA
V
-0.2
8
_______________________________________________________________________________________
0.3 ✕
V+
V
+0.2
µA
pF
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = + 25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TA = +25°C
V+ = 2V, ISINK = 20mA
TYP
MAX
0.15
0.26
TA = -40°C to +85°C
0.3
TA = TMIN to TMAX
0.32
TA = +25°C
Output Low Voltage
P0–P15, INT/O16
VOL
V+ = 2.5V, ISINK = 20mA
0.13
TA = -40°C to +85°C
PWM Clock Frequency
VOLSDA
V
0.28
TA = +25°C
Output Low-Voltage SDA
0.23
0.26
TA = TMIN to TMAX
V+ = 3.3V, ISINK = 20mA
UNITS
0.12
0.23
TA = -40°C to +85°C
0.24
TA = TMIN to TMAX
0.26
ISINK = 6mA
0.4
fPWM
32
V
kHz
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
kHz
Serial Clock Frequency
fSCL
Bus Free Time Between a STOP and a START
Condition
tBUF
1.3
µs
Hold Time, Repeated START Condition
tHD, STA
0.6
µs
Repeated START Condition Setup Time
tSU, STA
0.6
µs
STOP Condition Setup Time
tSU, STO
Data Hold Time
tHD, DAT
0.6
µs
Data Setup Time
tSU, DAT
180
ns
SCL Clock Low Period
tLOW
1.3
µs
SCL Clock High Period
tHIGH
0.7
µs
(Note 2)
0.9
µs
Rise Time of Both SDA and SCL Signals, Receiving
tR
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of Both SDA and SCL Signals, Receiving
tF
(Notes 3, 4)
20 +
0.1Cb
300
ns
(Notes 2, 3, 5)
20 +
0.1Cb
250
ns
400
pF
Fall Time of SDA Transmitting
tF.TX
Pulse Width of Spike Suppressed
tSP
(Notes 2, 6)
Capacitive Load for Each Bus Line
Cb
(Notes 2, 3)
50
ns
_______________________________________________________________________________________
3
MAX7313
ELECTRICAL CHARACTERISTICS (continued)
TIMING CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Interrupt Valid
tIV
Figure 10
6.5
µs
Interrupt Reset
tIR
Figure 10
1
µs
Output Data Valid
tDV
Figure 10
5
µs
Input Data Setup Time
tDS
Figure 10
100
ns
Input Data Hold Time
tDH
Figure 10
1
µs
Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 x VDD.
Note 5: ISINK ≤ 6mA. Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 x VDD.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
6
5
4
3
2
V+ = 2V
PWM ENABLED
V+ = 2.7V
V+ = 3.6V
PWM ENABLED
PWM
V+ = 2V
V+ = 2.7V
PWM DISABLED PWM DISABLED DISABLED
1
50
V+ = 3.6V
40
V+ = 2.7V
30
20
V+ = 2V
10
0
0
4
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
MAX7313 toc03
60
SUPPLY CURRENT (µA)
7
MAX7313 toc02
8
70
SUPPLY CURRENT (µA)
9
V+ = 3.6V
PWM ENABLED
MAX7313 toc01
10
SUPPLY CURRENT vs. TEMPERATURE
(PWM ENABLED; fSCL = 400kHz)
SUPPLY CURRENT vs. TEMPERATURE
(PWM DISABLED; fSCL = 400kHz)
STANDBY CURRENT vs. TEMPERATURE
STANDBY CURRENT (µA)
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
V+ = 3.6V
V+ = 2.7V
V+ = 2V
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
V+ = 2V
0.3
0.2
V+ = 3.6V
0.1
0
0.4
0.3
V+ = 2V
0.2
0.1
V+ = 2.7V
1.025
MAX7313 toc06
0.5
V+ = 3.6V
1.000
0.975
V+ = 2V
V+ = 2.7V
0.950
0.925
V+ = 3.6V
NORMALIZED TO V+ = 3.3V, TA = +25°C
0.900
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
SCOPE SHOT OF 2 OUTPUT PORTS
SCOPE SHOT OF 2 OUTPUT PORTS
MAX7313 toc07
SINK CURRENT vs. VOL
MAX7313 toc08
MASTER INTENSITY SET TO 1/15
0.35
MASTER INTENSITY SET TO 14/15
OUTPUT 1
2V/div
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
VOL (V)
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
OUTPUT 1 0.30
2V/div
0.25
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 15/16
V+ = 2V
V+ = 2.7V
0.20
V+ = 3.3V
0.15
OUTPUT 2
2V/div
0.10
OUTPUT 2
2V/div
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 14/15
V+ = 3.6V
0.05
ONLY ONE OUTPUT LOADED
0
2ms/div
2ms/div
MAX7313 toc09
0.4
ALL OUTPUTS LOADED
PWM CLOCK FREQUENCY
V+ = 2.7V
1.050
MAX7313 toc05
0.5
0.6
PORT OUTPUT LOW VOLTAGE VOL (V)
MAX7313 toc04
PORT OUTPUT LOW VOLTAGE VOL (V)
0.6
PWM CLOCK FREQUENCY
vs. TEMPERATURE
PORT OUTPUT LOW VOLTAGE WITH 20mA
LOAD CURRENT vs. TEMPERATURE
PORT OUTPUT LOW VOLTAGE WITH 50mA
LOAD CURRENT vs. TEMPERATURE
0
10
20
30
40
50
SINK CURRENT (mA)
_______________________________________________________________________________________
5
MAX7313
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
MAX7313
Pin Description
PIN
NAME
FUNCTION
QSOP
TQFN-EP
1
22
INT/O16
21, 2, 3
18, 23, 24
AD0, AD1,
AD2
4–11, 13–20
1–8, 10–17
P0–P15
12
9
GND
Ground. Do not sink more than 350mA into the GND pin.
22
19
SCL
I2C-Compatible Serial Clock Input
23
20
SDA
I2C-Compatible Serial Data I/O
24
21
V+
Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic
capacitor.
—
—
EP
Exposed Pad (TQFN only). Internally connected to GND. Connect to a large
analog ground plane to maximize thermal performance. Not intended to use
as an electrical connection point.
Output Port. Open-drain output rated at 7V, 50mA. Configurable as interrupt
output or general-purpose output.
Address Inputs. Sets device slave address. Connect to either GND, V+,
SCL, or SDA to give 64 logic combinations. See Table 1.
Input/Output Ports. P0–P15 are open-drain I/Os rated at 5.5V, 50mA.
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
CONFIGURATION
REGISTER
D
Q
FF
WRITE
CONFIGURATION
PULSE
CK
Q
OUTPUT PORT
REGISTER DATA
OUTPUT
PORT
REGISTER
D
Q
FF
WRITE PULSE
CK
Q
I/O PIN
Q2
INPUT PORT
REGISTER
D
Q
GND
INPUT PORT
REGISTER DATA
FF
READ PULSE
CK
Q
TO INT
Figure 1. Simplified Schematic of I/O Ports
Functional Overview
The MAX7313 is a general-purpose input/output (GPIO)
peripheral that provides 16 I/O ports, P0–P15, controlled through an I2C-compatible serial interface. A
17th output-only port, INT/O16, can be configured as
an interrupt output or as a general-purpose output port.
All output ports sink loads up to 50mA connected to
external supplies up to 5.5V, independent of the
6
MAX7313’s supply voltage. The MAX7313 is rated for a
ground current of 350mA, allowing all 17 outputs to sink
20mA at the same time. Figure 1 shows the output
structure of the MAX7313. The ports default to inputs on
power-up.
Port Inputs and Transition Detection
Input ports registers reflect the incoming logic levels of
the port pins, regardless of whether the pin is defined
_______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Port Output Control and LED Blinking
The two blink phase 0 registers set the output logic levels of the 16 ports P0–P15 (Table 8). These registers
control the port outputs if the blink function is disabled.
A duplicate pair of registers, the blink phase 1 registers, are also used if the blink function is enabled
(Table 9). In blink mode, the port outputs can be
flipped between using the blink phase 0 registers and
the blink phase 1 registers using software control (the
blink flip flag in the configuration register) (Table 4).
PWM Intensity Control
The MAX7313 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity control. PWM intensity control can be enabled on an output-by-output basis, allowing the MAX7313 to provide
any mix of PWM LED drives and glitch-free logic outputs (Table 10). PWM can be disabled entirely, in
which case all output ports are static and the MAX7313
operating current is lowest because the internal oscillator is turned off.
PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 13, 14). The
4-bit master control provides 16 levels of overall intensity control, which applies to all PWM-enabled output
ports. The master control sets the maximum pulse
width from 1/15 to 15/15 of the PWM time period. The
individual settings comprise a 4-bit number further
reducing the duty cycle to be from 1/16 to 15/16 of the
time window set by the master control.
For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the control software and provide 240 steps of intensity control
(Tables 10 and 13).
Standby Mode
When the serial interface is idle and the PWM intensity
control is unused, the MAX7313 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX7313, like all I2C slaves, has to monitor every
transmission.
Serial Interface
Serial Addressing
The MAX7313 operates as a slave that sends and
receives data through an I2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and
from the MAX7313 and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX7313 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX7313 SCL line operates
SDA
tSU,STA
tSU,DAT
tLOW
tBUF
tHD,STA
tSU,STO
tHD,DAT
tHIGH
SCL
tHD,STA
tR
tF
START CONDITION
REPEATED START CONDITION
STOP
CONDITION
START
CONDITION
Figure 2. 2-Wire Serial Interface Timing Details
_______________________________________________________________________________________
7
MAX7313
as an input or an output. Reading an input ports register latches the current-input logic level of the affected
eight ports. Transition detection allows all ports configured as inputs to be monitored for changes in their
logic status. The action of reading an input ports register samples the corresponding 8 port bits’ input conditions. This sample is continuously compared with the
actual input conditions. A detected change in input
condition causes the INT/O16 interrupt output to go
low, if configured as an interrupt output. The interrupt is
cleared either automatically if the changed input
returns to its original state, or when the appropriate
input ports register is read.
The INT/O16 pin can be configured as either an interrupt output or as a 17th output port with the same static
or blink controls as the other 16 ports (Table 4).
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX7313
7-bit slave address plus R/W bit, a register address
byte, one or more data bytes, and finally a STOP condition (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7313, the device generates the acknowledge bit because the MAX7313 is
the recipient. When the MAX7313 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
SDA
SCL
S
P
START
CONDITION
STOP
CONDITION
Figure 3. START and STOP Conditions
Slave Address
The MAX7313 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. The R/W bit is low for a write command, high
for a read command.
SDA
SCL
The slave address bits A6 through A0 are selected by
the address inputs AD0, AD1, and AD2. These pins can
be connected to GND, V+, SDA, or SCL. The MAX7313
has 64 possible slave addresses (Table 1) and, therefore, a maximum of 64 MAX7313 devices can be controlled independently from the same interface.
DATA LINE STABLE; CHANGE OF DATA
DATA VALID
ALLOWED
Figure 4. Bit Transfer
SCL
Message Format for Writing the MAX7313
A write to the MAX7313 comprises the transmission of
the MAX7313’s slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX7313 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX7313 takes no further action
beyond storing the command byte.
CLOCK PULSE
FOR ACKNOWLEDGE
START
CONDITION
1
2
8
9
SDA BY
TRANSMITTER
SDA BY
RECEIVER
S
Figure 5. Acknowledge
SDA
A6
MSB
A5
A4
A3
A2
A1
A0
R/W
LSB
SCL
Figure 6. Slave Address
8
_______________________________________________________________________________________
ACK
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
PIN AD2
PIN AD1
MAX7313
Table 1. MAX7313 I2C Slave Address Map
DEVICE ADDRESS
PIN AD0
A6
A5
A4
A3
A2
A1
A0
0
GND
SCL
GND
0
0
1
0
0
0
GND
SCL
V+
0
0
1
0
0
0
1
GND
SDA
GND
0
0
1
0
0
1
0
GND
SDA
V+
0
0
1
0
0
1
1
V+
SCL
GND
0
0
1
0
1
0
0
V+
SCL
V+
0
0
1
0
1
0
1
V+
SDA
GND
0
0
1
0
1
1
0
V+
SDA
V+
0
0
1
0
1
1
1
GND
SCL
SCL
0
0
1
1
0
0
0
GND
SCL
SDA
0
0
1
1
0
0
1
GND
SDA
SCL
0
0
1
1
0
1
0
GND
SDA
SDA
0
0
1
1
0
1
1
V+
SCL
SCL
0
0
1
1
1
0
0
V+
SCL
SDA
0
0
1
1
1
0
1
V+
SDA
SCL
0
0
1
1
1
1
0
V+
SDA
SDA
0
0
1
1
1
1
1
GND
GND
GND
0
1
0
0
0
0
0
GND
GND
V+
0
1
0
0
0
0
1
GND
V+
GND
0
1
0
0
0
1
0
GND
V+
V+
0
1
0
0
0
1
1
V+
GND
GND
0
1
0
0
1
0
0
V+
GND
V+
0
1
0
0
1
0
1
V+
V+
GND
0
1
0
0
1
1
0
V+
V+
V+
0
1
0
0
1
1
1
GND
GND
SCL
0
1
0
1
0
0
0
GND
GND
SDA
0
1
0
1
0
0
1
GND
V+
SCL
0
1
0
1
0
1
0
GND
V+
SDA
0
1
0
1
0
1
1
V+
GND
SCL
0
1
0
1
1
0
0
V+
GND
SDA
0
1
0
1
1
0
1
V+
V+
SCL
0
1
0
1
1
1
0
V+
V+
SDA
0
1
0
1
1
1
1
_______________________________________________________________________________________
9
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 1. MAX7313 I2C Slave Address Map (continued)
PIN AD2
10
PIN AD1
DEVICE ADDRESS
PIN AD0
A6
A5
A4
A3
A2
A1
A0
0
SCL
SCL
GND
1
0
1
0
0
0
SCL
SCL
V+
1
0
1
0
0
0
1
SCL
SDA
GND
1
0
1
0
0
1
0
SCL
SDA
V+
1
0
1
0
0
1
1
SDA
SCL
GND
1
0
1
0
1
0
0
SDA
SCL
V+
1
0
1
0
1
0
1
SDA
SDA
GND
1
0
1
0
1
1
0
SDA
SDA
V+
1
0
1
0
1
1
1
SCL
SCL
SCL
1
0
1
1
0
0
0
SCL
SCL
SDA
1
0
1
1
0
0
1
SCL
SDA
SCL
1
0
1
1
0
1
0
SCL
SDA
SDA
1
0
1
1
0
1
1
SDA
SCL
SCL
1
0
1
1
1
0
0
SDA
SCL
SDA
1
0
1
1
1
0
1
SDA
SDA
SCL
1
0
1
1
1
1
0
SDA
SDA
SDA
1
0
1
1
1
1
1
SCL
GND
GND
1
1
0
0
0
0
0
SCL
GND
V+
1
1
0
0
0
0
1
SCL
V+
GND
1
1
0
0
0
1
0
SCL
V+
V+
1
1
0
0
0
1
1
SDA
GND
GND
1
1
0
0
1
0
0
SDA
GND
V+
1
1
0
0
1
0
1
SDA
V+
GND
1
1
0
0
1
1
0
SDA
V+
V+
1
1
0
0
1
1
1
SCL
GND
SCL
1
1
0
1
0
0
0
SCL
GND
SDA
1
1
0
1
0
0
1
SCL
V+
SCL
1
1
0
1
0
1
0
SCL
V+
SDA
1
1
0
1
0
1
1
SDA
GND
SCL
1
1
0
1
1
0
0
SDA
GND
SDA
1
1
0
1
1
0
1
SDA
V+
SCL
1
1
0
1
1
1
0
SDA
V+
SDA
1
1
0
1
1
1
1
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
S
SLAVE ADDRESS
0
D15
D14
D13
A
D12
D11
D10
D9
D8
COMMAND BYTE
R/W
MAX7313
COMMAND BYTE IS STORED ON RECEIPT OF
STOP CONDITION
ACKNOWLEDGE FROM MAX7313
A
P
ACKNOWLEDGE FROM MAX7313
Figure 7. Command Byte Received
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
D15 D14 D13 D12 D11 D10
D9
ACKNOWLEDGE FROM MAX7313
D8
D7
D6
D5
D4
D3
D2
D1
D0
ACKNOWLEDGE FROM MAX7313
S
SLAVE ADDRESS
0
A
COMMAND BYTE
A
DATA BYTE
A
P
A
P
1
BYTE
AUTOINCREMENT MEMORY ADDRESS
R/W
Figure 8. Command and Single Data Byte Received
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
D15 D14 D13 D12 D11 D10
D9
ACKNOWLEDGE FROM MAX7313
D8
D7
D6
D5
D4
D3
D2
D1
D0
ACKNOWLEDGE FROM MAX7313
S
SLAVE ADDRESS
0
A
COMMAND BYTE
R/W
A
DATA BYTE
N
BYTES
AUTOINCREMENT MEMORY ADDRESS
Figure 9. n Data Bytes Received
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX7313 selected by the command byte (Figure
8). If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX7313 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 registers or blink phase 1 registers) is given in
Figure 10.
Message Format for Reading
The MAX7313 is read using the MAX7313’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configuring the MAX7313’s command byte by performing a
write (Figure 7). The master can now read n consecu-
tive bytes from the MAX7313 with the first data byte
being read from the register addressed by the initialized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports registers is
shown in Figure 10 reflecting the states of the ports.
Operation with Multiple Masters
If the MAX7313 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7313 should
use a repeated start between the write, which sets the
MAX7313’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX7313’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7313’s address pointer, then master
1’s delayed read can be from an unexpected location.
______________________________________________________________________________________
11
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)
SCL
1
2
3
4
5
6
7
8
9
SDA S A6 A5 A4 A3 A2 A1 A0
0
A
SLAVE ADDRESS
COMMAND BYTE
0
0
0
0
0
0
0
1
R/W ACKNOWLEDGE FROM SLAVE
START CONDITION
A MSB
DATA1
ACKNOWLEDGE FROM SLAVE
LSB
A MSB
LSB A
DATA2
ACKNOWLEDGE FROM SLAVE
P7–P0
P
STOP
CONDITION
DATA1 VALID
tDV
P15– P8
DATA2 VALID
tDV
READ FROM INPUT PORTS REGISTERS
SCL
1
2
3
4
5
6
7
8
9
SLAVE ADDRESS
COMMAND BYTE
SDA S A6 A5 A4 A3 A2 A1 A0 1
A MSB
DATA1
LSB A MSB
DATA6
LSB NA P
STOP CONDITION
DATA1
P7–P0
ACKNOWLEDGE FROM MASTER
R/W ACKNOWLEDGE FROM SLAVE
START CONDITION
DATA2
tDH
DATA3
DATA4
DATA5
P15–P8
NO ACKNOWLEDGE FROM
MASTER
DATA6
tDS
INTERRUPT VALID/RESET
SCL
1
2
3
4
5
6
7
8
SLAVE ADDRESS
9
COMMAND BYTE
SDA S A6 A5 A4 A3 A2 A1 A0 1
A MSB
DATA2
LSB A MSB
DATA4
LSB NA P
STOP CONDITION
START CONDITION
P7–P0
R/W ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM MASTER
NO ACKNOWLEDGE FROM
MASTER
DATA2
DATA1
P15–P8
DATA3
DATA4
INT
tIV
tIR tIV
tIR
Figure 10. Read, Write, and Interrupt Timing Diagrams
Command Address Autoincrementing
The command address stored in the MAX7313 circulates around grouped register functions after each data
byte is written or read (Table 2).
Device Reset
If a device reset input is needed, consider the
MAX7314. The MAX7314 includes a RST input, which
clears any transaction to or from the MAX7314 on the
serial interface and configures the internal registers to
the same state as a power-up reset.
12
Detailed Description
Initial Power-Up
On power-up all control registers are reset and the
MAX7313 enters standby mode (Table 3). Power-up
status makes all ports into inputs and disables both the
PWM oscillator and blink functionality.
Configuration Register
The configuration register is used to configure the PWM
intensity mode, interrupt, and blink behavior, operate
the INT/O16 output, and read back the interrupt status
(Table 4).
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
MAX7313
Table 2. Register Address Map
ADDRESS CODE
(HEX)
REGISTER
AUTOINCREMENT
ADDRESS
Read input ports P7–P0
0x00
0x01
Read input ports P15–P8
0x01
0x00
0x03
Blink phase 0 outputs P7–P0
0x02
Blink phase 0 outputs P15–P8
0x03
0x02
Ports configuration P7–P0
0x06
0x07
Ports configuration P15–P8
0x07
0x06
Blink phase 1 outputs P7–P0
0x0A
0x0B
Blink phase 1 outputs P15–P8
0x0B
0x0A
Master, O16 intensity
0x0E
0x0E (no change)
Configuration
0x0F
0x0F (no change)
Outputs intensity P1, P0
0x10
0x11
Outputs intensity P3, P2
0x11
0x12
Outputs intensity P5, P4
0x12
0x13
Outputs intensity P7, P6
0x13
0x14
Outputs intensity P9, P8
0x14
0x15
Outputs intensity P11, P10
0x15
0x16
Outputs intensity P13, P12
0x16
0x17
Outputs intensity P15, P14
0x17
0x10
Ports Configuration
The 16 I/O ports P0 through P15 can be configured to
any combination of inputs and outputs using the ports
configuration registers (Table 5). The INT/O16 output
can also be configured as an extra general-purpose
output using the configuration register (Table 4).
Input Ports
The input ports registers are read only (Table 6). They
reflect the incoming logic levels of the ports, regardless
of whether the port is defined as an input or an output
by the ports configuration registers. Reading an input
ports register latches the current-input logic level of the
affected eight ports. A write to an input ports register is
ignored.
Transition Detection
All ports configured as inputs are always monitored for
changes in their logic status. The action of reading an
input ports register or writing to the configuration register samples the corresponding 8 port bits’ input condition (Tables 4, 6). This sample is continuously
compared with the actual input conditions. A detected
change in input condition causes an interrupt condition.
The interrupt is cleared either automatically if the
changed input returns to its original state, or when the
appropriate input ports register is read, updating the
compared data (Figure 10). Randomly changing a port
from an output to an input may cause a false interrupt
to occur if the state of the input does not match the
content of the appropriate input ports register. The
interrupt status is available as the interrupt flag INT in
the configuration register (Table 4).
The input status of all ports are sampled immediately
after power-up as part of the MAX7313’s internal initialization, so if all the ports are pulled to valid logic levels
at that time an interrupt does not occur at power-up.
INT/O16 Output
The INT/O16 output pin can be configured as either the
INT output that reflects the interrupt flag logic state or
as a general-purpose output O16. When used as a
general-purpose output, the INT/O16 pin has the same
blink and PWM intensity control capabilities as the
other ports.
Set the interrupt enable I bit in the configuration register
to configure INT/O16 as the INT output (Table 4). Clear
interrupt enable to configure INT/O16 as the O16. O16
logic state is set by the 2 bits O1 and O0 in the configuration register. O16 follows the rules for blinking selected by the blink enable flag E in the configuration
register. If blinking is disabled, then interrupt output
control O0 alone sets the logic state of the INT/O16 pin.
______________________________________________________________________________________
13
Table 3. Power-Up Configuration
REGISTER FUNCTION
ADDRESS
CODE
(HEX)
POWER-UP CONDITION
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
1
Blink phase 0 outputs P7–P0
High-impedance outputs
0x02
1
1
1
1
1
1
1
Blink phase 0 outputs P15–P8
High-impedance outputs
0x03
1
1
1
1
1
1
1
1
Ports configuration P7–P0
Ports P7–P0 are inputs
0x06
1
1
1
1
1
1
1
1
Ports configuration P15–P8
Ports P15–P8 are inputs
0x07
1
1
1
1
1
1
1
1
Blink phase 1 outputs P7–P0
High-impedance outputs
0x0A
1
1
1
1
1
1
1
1
Blink phase 1 outputs P15–P8
High-impedance outputs
0x0B
1
1
1
1
1
1
1
1
Master, O16 intensity
PWM oscillator is disabled;
O16 is static logic output
0x0E
0
0
0
0
1
1
1
1
Configuration
INT/O16 is interrupt output;
blink is disabled;
global intensity is enabled
0x0F
0
0
0
0
1
1
0
0
Outputs intensity P1, P0
P1, P0 are static logic outputs
0x10
1
1
1
1
1
1
1
1
Outputs Intensity P3, P2
P3, P2 are static logic outputs
0x11
1
1
1
1
1
1
1
1
Outputs intensity P5, P4
P5, P4 are static logic outputs
0x12
1
1
1
1
1
1
1
1
Outputs intensity P7, P6
P7, P6 are static logic outputs
0x13
1
1
1
1
1
1
1
1
Outputs intensity P9, P8
P9, P8 are static logic outputs
0x14
1
1
1
1
1
1
1
1
Outputs intensity P11, P10
P11, P10 are static logic outputs
0x15
1
1
1
1
1
1
1
1
Outputs intensity P13, P12
P13, P12 are static logic outputs
0x16
1
1
1
1
1
1
1
1
Outputs intensity P15, P14
P15, P14 are static logic outputs
0x17
1
1
1
1
1
1
1
1
Table 4. Configuration Register
D2
D1
D0
BLINK
ENABLE
D3
O1
O0
I
G
B
E
X
X
X
X
X
X
0
X
X
X
X
X
X
1
X
X
X
X
X
X
0
1
X
X
X
X
X
X
1
1
Write device configuration
0
Read back device configuration
1
Disable blink
—
X
Enable blink
—
X
—
—
Flip blink register (see text)
D4
BLINK FLIP
0x0F
D5
GLOBAL
INTENSITY
CONFIGURATION
D6
INTERRUPT
ENABLE
D7
INTERRUPT
OUTPUT
CONTROL
AS GPO
R/W
14
REGISTER DATA
INT
—
ADDRESS
CODE
(HEX)
REGISTER
INTERRUPT
STATUS
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
X
O
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
REGISTER DATA
D3
D2
D1
D0
O0
I
G
B
E
X
X
X
X
0
X
X
X
X
X
X
X
1
X
X
X
X
X
X
0
X
X
X
X
X
X
X
1
X
X
X
—
X
X
X
0
0
X
X
0
INT/O16 output is high impedance (blink
is disabled)
—
X
X
X
1
0
X
X
0
INT/O16 output is low during blink phase 0
—
X
X
X
0
0
X
X
1
INT/O16 output is high impedance during
blink phase 0
—
X
X
X
1
0
X
X
1
INT/O16 output is low during blink phase 1
—
X
X
0
X
0
X
X
1
INT/O16 output is high impedance during
blink phase 1
—
X
X
1
X
0
X
X
1
Read-back data change interrupt status
—data change is not detected, and
INT/O16 output is high when interrupt
enable (I bit) is set
1
0
0
X
X
X
X
X
X
Read-back data change interrupt status
—data change is detected, and INT/O16
output is low when interrupt enable (I bit)
is set
1
1
0
X
X
X
X
X
X
R/W
CONFIGURATION
Write device configuration
0
Read back device configuration
1
Disable global intensity control—intensity
is set by registers 0x10–0x17 for ports P0
through P15 when configured as outputs,
and by D3–D0 of register 0x0E for
INT/O16 when INT/O16 pin is configured
as an output port
—
X
Enable global intensity control—intensity
for all ports configured as outputs is set
by D3–D0 of register 0x0E
—
Disable data change interrupt—INT/O16
output is controlled by the O0 and O1 bits
—
Enable data change interrupt—INT/O16
output is controlled by port input data
change
—
INT/O16 output is low (blink is disabled)
INT
0x0F
—
O1
INTERRUPT
STATUS
BLINK
ENABLE
D4
BLINK FLIP
D5
GLOBAL
INTENSITY
D6
INTERRUPT
ENABLE
D7
X
O
INTERRUPT
OUTPUT
CONTROL
AS GPO
ADDRESS
CODE
(HEX)
REGISTER
X = Don’t care.
______________________________________________________________________________________
15
MAX7313
Table 4. Configuration Register (continued)
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 5. Ports Configuration Registers
REGISTER
R/W
Ports configuration P7–P0
(1 = input, 0 = output)
0
Read back ports configuration P7–P0
1
Ports configuration P15–P8
(1 = input, 0 = output)
0
Read back ports configuration P15–P8
1
ADDRESS
CODE
(HEX)
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
0x06
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
0x07
OP15
OP14
OP13
OP12
OP11
OP10
OP9
OP8
D2
D1
D0
Table 6. Input Ports Registers
REGISTER
R/W
ADDRESS
CODE
(HEX)
REGISTER DATA
D7
D6
D5
D4
D3
Read input ports P7–P0
1
0x00
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
Read input ports P15–P8
1
0x01
IP15
IP14
IP13
IP12
IP11
IP10
IP9
IP8
If blinking is enabled, then both interrupt output controls O0 and O1 set the logic state of the INT/O16 pin
according to the blink phase. PWM intensity control for
O16 is set by the 4 global intensity bits in the master
and O16 intensity register (Table 13).
The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the state of the blink flip flag is
ignored, and the blink phase 0 registers alone control
the output ports.
Blink Mode
Blink Phase Registers
In blink mode, the output ports can be flipped between
using either the blink phase 0 registers or the blink phase
1 registers. Flip control is by software control (the blink
flip flag B in the configuration register) (Table 4). If hardware flip control is needed, consider the MAX7314, which
includes a BLINK input, as well as software control.
The blink function can be used for LED effects by programming different display patterns in the two sets of
output port registers, and using the software or hardware controls to flip between the patterns.
If the blink phase 1 registers are written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern programmed into the blink phase 0 registers. This technique can be further extended by driving the BLINK
input with a PWM signal to modulate the LED current to
provide fading effects.
The blink mode is enabled by setting the blink enable
flag E in the configuration register (Table 4). When blink
mode is enabled, the state of the blink flip flag sets the
phase, and the output ports are set by either the blink
phase 0 registers or the blink phase 1 registers (Table 7).
When the blink function is disabled, the two blink phase
0 registers set the logic levels of the 16 ports (P0 through
P15) when configured as outputs (Table 8). A duplicate
pair of registers called the blink phase 1 registers are
also used if the blink function is enabled (Table 9). A
logic high sets the appropriate output port high impedance, while a logic low makes the port go low.
Reading a blink phase register reads the value stored
in the register, not the actual port condition. The port
output itself may or may not be at a valid logic level,
depending on the external load connected.
Table 7. Blink Controls
BLINK
ENABLE
FLAG E
BLINK
FLIP
FLAG B
BLINK
FUNCTION
OUTPUT
REGISTERS
USED
0
X
Disabled
Blink phase 0
registers
Blink phase 0
registers
0
1
Enabled
1
X = Don’t care.
16
______________________________________________________________________________________
Blink phase 1
registers
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
PWM Intensity Control
The MAX7313 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity control or other applications such as PWM trim DACs.
PWM can be disabled entirely for all the outputs. In this
case, all outputs are static and the MAX7313 operating
current is lowest because the internal PWM oscillator is
turned off.
The MAX7313 can be configured to provide any combination of PWM outputs and glitch-free logic outputs.
Each PWM output has an individual 4-bit intensity control (Table 14). When all outputs are to be used with the
same PWM setting, the outputs can be controlled
together instead using the global intensity control
(Table 13). Table 10 shows how to set up the MAX7313
to suit a particular application.
Using PWM Intensity Controls with Blink Disabled
When blink is disabled (Table 7), the blink phase 0 registers specify each output’s logic level during the PWM
on-time (Table 8). The effect of setting an output’s blink
phase 0 register bit to 0 or 1 is shown in Table 11. With
its output bit set to zero, an LED can be controlled with
16 intensity settings from 1/16th duty through fully on,
but cannot be turned fully off using the PWM intensity
control. With its output bit set to 1, an LED can be controlled with 16 intensity settings from fully off through
15/16th duty.
PWM Timing
The PWM control uses a 240-step PWM period, divided
into 15 master intensity timeslots. Each master intensity
timeslot is divided further into 16 PWM cycles (Figure 11).
The master intensity operates as a gate, allowing the individual output settings to be enabled from 1 to 15 timeslots
per PWM period (Figures 12, 13, 14) (Table 13).
Using PWM Intensity Controls with Blink Enabled
When blink is enabled (Table 7), the blink phase 0 registers and blink phase 1 registers specify each output’s
logic level during the PWM on-time during the respective
Table 8. Blink Phase 0 Registers
REGISTER
R/W
Write outputs P7–P0 phase 0
0
Read back outputs P7–P0 phase 0
1
Write outputs P15–P8 phase 0
0
Read back outputs P15–P8 phase 0
1
ADDRESS
CODE
(HEX)
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
0x02
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
0x03
OP15
OP14
OP13
OP12
OP11
OP10
OP9
OP8
Table 9. Blink Phase 1 Registers
REGISTER
R/W
Write outputs P7–P0 phase 1
0
Read back outputs P7–P0 phase 1
1
Write outputs P15–P8 phase 1
0
Read back outputs P15–P8 phase 1
1
ADDRESS
CODE
(HEX)
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
0x0A
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
0x03
OP15
OP14
OP13
OP12
OP11
OP10
OP9
OP8
______________________________________________________________________________________
17
MAX7313
Each output’s individual 4-bit intensity control only
operates during the number of timeslots gated by the
master intensity. The individual controls provide 16
intensity settings from 1/16 through 16/16 (Table 14).
Figures 15, 16, and 17 show examples of individual
intensity control settings. The highest value an individual or global setting can be set to is 16/16. This setting
forces the output to ignore the master control, and follow the logic level set by the appropriate blink phase
register bit. The output becomes a glitch-free static output with no PWM.
The 17th output, O16, is controlled through 2 bits in the
configuration register, which provide the same static or
blink control as the other 16 output ports.
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 10. PWM Application Scenarios
APPLICATION
RECOMMENDED CONFIGURATION
All outputs static without PWM
Set the master, O16 intensity register 0x0E to any value 0x00 to 0x0F.
The global intensity G bit in the configuration register is don't care.
The output intensity registers 0x10 through 0x17 are don't care.
A mix of static and PWM outputs, with PWM
outputs using different PWM settings
Set the master, O16 intensity register 0x0E to any value from 0x10 to 0xFF.
Clear global intensity G bit to 0 in the configuration register to disable global intensity
control.
For the static outputs, set the output intensity value to 0xF.
For the PWM outputs, set the output intensity value in the range 0x0 to 0xE.
A mix of static and PWM outputs, with PWM
outputs all using the same PWM setting
As above. Global intensity control cannot be used with a mix of static and PWM
outputs, so write the individual intensity registers with the same PWM value.
All outputs PWM using the same PWM
setting
Set the master, O16 intensity register 0x0E to any value except from 0x10 to 0xFF.
Set global intensity G bit to 1 in the configuration register to enable global intensity
control.
The master, O16 intensity register 0x0E is the only intensity register used.
The output intensity registers 0x10 through 0x17 are don't care.
ONE PWM PERIOD IS 240 CYCLES OF THE 32kHz PWM
OSCILLATOR. A PWM PERIOD CONTAINS 15 MASTER
INTENSITY TIMESLOTS
14
15
1
15 16 1
2
2
3
3
4
5
4
6
7
5
8
6
7
8
9
9 10 11 12 13 14 15 16
1
10
11
12
13
14
15
1
2
2
EACH MASTER INTENSITY
TIMESLOT CONTAINS 16
PWM CYCLES
Figure 11. PWM Timing
.
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
.
.
Figure 12. Master Set to 1/15
Figure 14. Master Set to 15/15
.
14 15 1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 1
2
.
Figure 13. Master Set to 14/15
18
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
1
2
3
4
5
6
7
8
MAX7313
MASTER INTENSITY TIMESLOT
NEXT MASTER INTENSITY TIMESLOT
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Figure 15. Individual (or Global) Set to 1/16
MASTER INTENSITY TIMESLOT
1
2
3
4
5
6
7
8
NEXT MASTER INTENSITY TIMESLOT
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Figure 16. Individual (or Global) Set to 15/16
MASTER INTENSITY TIMESLOT CONTROL IS IGNORED
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Figure 17. Individual (or Global) Set to 16/16
Table 11. PWM Intensity Settings (Blink Disabled)
PWM DUTY CYCLE
OUTPUT BLINK PHASE 0
REGISTER BIT = 0
HIGH TIME
1/16
15/16
0x1
2/16
0x2
0x3
PWM DUTY CYCLE
OUTPUT BLINK PHASE 0
REGISTER BIT = 1
LOW TIME
HIGH TIME
15/16
1/16
14/16
14/16
2/16
3/16
13/16
13/16
3/16
4/16
12/16
12/16
4/16
0x4
5/16
11/16
11/16
5/16
0x5
6/16
10/16
0x6
7/16
9/16
0x7
8/16
8/16
0x8
9/16
7/16
0x9
10/16
6/16
0xA
11/16
5/16
Lowest PWM intensity
Increasing PWM intensity
LOW TIME
0x0
LED BEHAVIOR WHEN
OUTPUT BLINK PHASE 0
REGISTER BIT = 0
(LED IS ON WHEN
OUTPUT IS LOW)
10/16
6/16
9/16
7/16
8/16
8/16
7/16
9/16
6/16
10/16
5/16
11/16
4/16
12/16
3/16
13/16
LED BEHAVIOR WHEN
OUTPUT BLINK PHASE 0
REGISTER BIT = 1
(LED IS ON WHEN
OUTPUT IS LOW)
Highest PWM intensity
Increasing PWM intensity
OUTPUT
(OR
GLOBAL)
INTENSITY
SETTING
0xB
12/16
4/16
0xC
13/16
3/16
0xD
14/16
2/16
2/16
14/16
0xE
15/16
1/16
Highest PWM intensity
1/16
15/16
Lowest PWM intensity
0xF
Static low
Static low
Full intensity, no PWM
(LED on continuously)
Static high
impedance
Static high
impedance
LED off continuously
______________________________________________________________________________________
19
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
blink phases (Tables 8 and 9). The effect of setting an
output’s blink phase x register bit to 0 or 1 is shown in
Table 12. LEDs can be flipped between either directly on
and off, or between a variety of high/low PWM intensities.
Global/O16 Intensity Control
The 4 bits used for output O16’s PWM individual intensity setting also double as the global intensity control
(Table 13). Global intensity simplifies the PWM settings
when the application requires them all to be the same,
such as for backlight applications, by replacing the 17
individual settings with 1 setting. Global intensity is
enabled with the Global Intensity flag G in the configuration register (Table 4). When global PWM control is
used, the 4 bits of master intensity and 4 bits of global
intensity effectively combine to provide an 8 bit, 240step intensity control applying to all outputs.
It is not possible to apply global PWM control to a subset of the ports, and use the others as logic outputs. To
mix static logic outputs and PWM outputs, individual
PWM control must be selected (Table 10).
Applications Information
Hot Insertion
I/O ports P0–P15, interrupt output INT/016, and serial
interface SDA, SCL, AD0–2 remain high impedance
with up to 6V asserted on them when the MAX7313 is
powered down (V+ = 0V). The MAX7313 can therefore
be used in hot-swap applications.
Output Level Translation
The open-drain output architecture allows the ports to
level translate the outputs to higher or lower voltages
than the MAX7313 supply. An external pullup resistor
can be used on any output to convert the high-impedance logic-high condition to a positive voltage level.
The resistor can be connected to any voltage up to
5.5V. For interfacing CMOS inputs, a pullup resistor
value of 220kΩ is a good starting point. Use a lower
resistance to improve noise immunity, in applications
where power consumption is less critical, or where a
faster rise time is needed for a given capacitive load.
Table 12. PWM Intensity Settings (Blink Enabled)
OUTPUT
(OR
GLOBAL)
INTENSITY
SETTING
20
PWM DUTY CYCLE
OUTPUT BLINK
PHASE X
REGISTER BIT = 0
PWM DUTY CYCLE
OUTPUT BLINK
PHASE X
REGISTER BIT = 1
LOW
TIME
HIGH
TIME
LOW
TIME
HIGH
TIME
0x0
1/16
15/16
15/16
1/16
0x1
2/16
14/16
14/16
2/16
0x2
3/16
13/16
13/16
3/16
0x3
4/16
12/16
12/16
4/16
0x4
5/16
11/16
11/16
5/16
0x5
6/16
10/16
10/16
6/16
0x6
7/16
9/16
9/16
7/16
0x7
8/16
8/16
8/16
8/16
0x8
9/16
7/16
7/16
9/16
0x9
10/16
6/16
6/16
10/16
0xA
11/16
5/16
5/16
11/16
0xB
12/16
4/16
4/16
12/16
0xC
13/16
3/16
3/16
13/16
0xD
14/16
2/16
2/16
14/16
0xE
15/16
1/16
1/16
15/16
0xF
Static low
Static low
Static high Static high
impedance impedance
EXAMPLES OF LED BLINK BEHAVIOR
(LED IS ON WHEN OUTPUT IS LOW)
BLINK PHASE 0
REGISTER BIT = 0
BLINK PHASE 0
REGISTER BIT = 1
BLINK PHASE 1
REGISTER BIT = 1
BLINK PHASE 1
REGISTER BIT = 0
Phase 0: LED on at low intensity
Phase 1: LED on at high intensity
Phase 0: LED on at high intensity
Phase 1: LED on at low intensity
Output is half intensity during both blink phases
Phase 0: LED on at high intensity
Phase 1: LED on at low intensity
Phase 0: LED on at low intensity
Phase 1: LED on at high intensity
Phase 0: LED on continuously
Phase 1: LED off continuously
Phase 0: LED off continuously
Phase 1: LED on continuously
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
REGISTER
R/W
ADDRESS
CODE
(HEX)
REGISTER DATA
D7
D6
D5
MSB
MASTER AND GLOBAL INTENSITY
D4
D3
LSB
MSB
MASTER INTENSITY
Write master and global intensity
0
Read back master and global intensity
1
Master intensity duty cycle is 0/15 (off);
internal oscillator is disabled;
all outputs will be static with no PWM
D2
D1
D0
LSB
O16 INTENSITY
M3
M2
M1
M0
G3
G2
G1
G0
—
0
0
0
0
—
—
—
—
Master intensity duty cycle is 1/15
—
0
0
0
1
—
—
—
—
Master intensity duty cycle is 2/15
—
0
0
1
0
—
—
—
—
Master intensity duty cycle is 3/15
—
0
0
1
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0X0E
Master intensity duty cycle is 13/15
—
1
1
0
1
—
—
—
Master intensity duty cycle is 14/15
—
1
1
1
0
—
—
—
—
Master intensity duty cycle is 15/15 (full)
—
1
1
1
1
—
—
—
—
O16 intensity duty cycle is 1/16
—
—
—
—
—
0
0
0
0
O16 intensity duty cycle is 2/16
—
—
—
—
—
0
0
0
1
O16 intensity duty cycle is 3/16
—
—
—
—
—
0
0
1
0
—
—
—
—
—
—
—
—
—
—
O16 intensity duty cycle is 14/16
—
—
—
—
—
1
1
0
1
O16 intensity duty cycle is 15/16
—
—
—
—
—
1
1
1
0
O16 intensity duty cycle is 16/16
(static output, no PWM)
—
—
—
—
—
1
1
1
1
Compatibility with MAX7311
The MAX7313 is pin compatible and software compatible
with the standard register structure used by MAX7311,
PCA9535, and PCA9555. However, some MAX7311 functions are not implemented in the MAX7313, and the
MAX7313’s PWM and blink functionality is not supported
in the MAX7311. Software compatibility is clearly not
100%, but the MAX7313 was designed so the subset
(omitted) features default to the same power-up behavior
as the MAX7311, PCA9535, and PCA9555, and superset
features do not use existing registers in a different way. In
practice, many applications can use the MAX7313 as a
drop-in replacement for the MAX7311.
Driving LED Loads
When driving LEDs, a resistor in series with the LED
must be used to limit the LED current to no more than
50mA. Choose the resistor value according to the following formula:
RLED = (VSUPPLY - VLED - VOL) / ILED
where:
RLED is the resistance of the resistor in series with the
LED (Ω).
VSUPPLY is the supply voltage used to drive the LED (V).
VLED is the forward voltage of the LED (V).
VOL is the output low voltage of the MAX7313 when
sinking ILED (V).
ILED is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 14mA from a
5V supply, RLED = (5 - 2.2 - 0.25) / 0.014 = 182Ω.
______________________________________________________________________________________________________
21
MAX7313
Table 13. Master, O16 Intensity Register
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 14. Output Intensity Registers
REGISTER
ADDRESS
CODE
(HEX)
R/W
D7
D6
D5
MSB
OUTPUTS P1, P0 INTENSITY
D4
D3
LSB
MSB
OUTPUT P1 INTENSITY
Write output P1, P0 intensity
0
Read back output P1, P0 intensity
1
Output P1 intensity duty cycle is 1/16
Output P1 intensity duty cycle is 2/16
Output P1 intensity duty cycle is 3/16
—
0
0
—
—
—
—
Output P1 intensity duty cycle is 14/16
—
1
1
Output P1 intensity duty cycle is 15/16
—
1
D2
D1
D0
LSB
OUTPUT P0 INTENSITY
P1I3
P1I2
P1I1
P1I0
P0I3
P0I2
P0I1
P0I0
—
0
0
0
0
—
—
—
—
—
0
0
0
1
—
—
—
—
1
0
—
—
—
—
—
—
—
—
—
—
0
1
—
—
—
—
1
1
0
—
—
—
—
1
1
1
1
—
—
—
—
0X10
Output P1 intensity duty cycle is 16/16
(static logic level, no PWM)
—
Output P0 intensity duty cycle is 1/16
—
—
—
—
—
0
0
0
0
Output P0 intensity duty cycle is 2/16
—
—
—
—
—
0
0
0
1
Output P0 intensity duty cycle is 3/16
—
—
—
—
—
0
0
1
0
—
—
—
—
—
—
—
—
—
—
Output P0 intensity duty cycle is 14/16
—
—
—
—
—
1
1
0
1
Output P0 intensity duty cycle is 15/16
—
—
—
—
—
1
1
1
0
Output P0 intensity duty cycle is 16/16
(static logic level, no PWM)
—
—
—
—
—
1
1
1
1
LSB
MSB
MSB
OUTPUTS P3, P2 INTENSITY
Write output P3, P2 intensity
0
Read back output P3, P2 intensity
1
0x11
OUTPUT P3 INTENSITY
P3I3
P3I2
P3I1
MSB
OUTPUTS P5, P4 INTENSITY
Write output P5, P4 intensity
0
Read back output P5, P4 intensity
1
0x12
P5I2
P5I1
MSB
Write output P7, P6 intensity
0
Read back output P7, P6 intensity
1
0x13
P2I3
LSB
MSB
P7I3
P7I2
P7I1
P4I3
LSB
MSB
P7I0
P2I2
P2I1
P2I0
LSB
OUTPUT P4 INTENSITY
P5I0
OUTPUT P7 INTENSITY
LSB
OUTPUT P2 INTENSITY
P3I0
OUTPUT P5 INTENSITY
P5I3
OUTPUTS P7, P6 INTENSITY
22
REGISTER DATA
P4I2
P4I1
P4I0
LSB
OUTPUT P6 INTENSITY
P6I3
P6I2
______________________________________________________________________________________
P6I1
P6I0
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
ADDRESS
CODE
(HEX)
R/W
REGISTER
REGISTER DATA
D7
D6
D5
MSB
OUTPUTS P9, P8 INTENSITY
Write output P9, P8 intensity
0
Read back output P9, P8 intensity
1
P9I3
P9I2
P911
MSB
Write output P11, P10 intensity
0
Read back output P11, P10 intensity
1
P11I3
P11I2
P11I1
MSB
Write output P13, P12 intensity
0
Read back output P13, P12 intensity
1
P13I3
P13I2
P13I1
MSB
Write output P15, P14intensity
0
Read back output P15, P14 intensity
1
MSB
P9I0
P8I3
LSB
MSB
P15I3
P15I2
P15I1
D0
LSB
P812
P11I0
P10I3
LSB
MSB
P811
P810
LSB
P10I2
P10I1
P10I0
LSB
OUTPUT P12 INTENSITY
P13I0
P12I3
LSB
MSB
P15I0
D1
OUTPUT P10 INTENSITY
OUTPUT P15 INTENSITY
0x17
D2
OUTPUT P8 INTENSITY
OUTPUT P13 INTENSITY
0x16
OUTPUTS P15, P14 INTENSITY
LSB
OUTPUT P11 INTENSITY
0x15
OUTPUTS 13, P12 INTENSITY
D3
OUTPUT P9 INTENSITY
0x14
OUTPUTS P11, P10 INTENSITY
D4
P12I2
P12I1
P12I0
LSB
OUTPUT P14 INTENSITY
P14I3
P14I2
P14I1
P14I0
See master, O16 intensity register (Table 13).
OUTPUT O16 INTENSITY
Table 15. MAX7311, PCA9535, and PCA9555 Register Compatibility
MAX7311,
PCA9535,
PCA9555
REGISTER
ADDRESS
MAX7313 IMPLEMENTATION
MAX7311, PCA9535,
PCA9555
IMPLEMENTATION
COMMENTS
Inputs P15–P0
0x00, 0x01
Inputs registers
Implemented
Same functionality
Outputs P15–P0
0x02, 0x03
Blink phase 0 registers
Implemented
Same functionality
Polarity inversion
0x04, 0x05
Not implemented; register writes are
ignored; register reads return 0x00
Implemented;
power-up default is
0x00
If polarity inversion feature
is unused, MAX7313
defaults to correct state
Configuration
0x06, 0x07
Ports configuration registers
Not implemented
Same functionality
No registers
0x0B, 0x0C
Blink phase 1 registers
Not implemented
No register
0x0E
Master, O16 intensity register
Not implemented
No register
0x0F
Configuration register
Not implemented
No registers
0x10–0x17
Outputs intensity registers
Not implemented
Power-up default disables
the blink and intensity
(PWM) features
______________________________________________________________________________________
23
MAX7313
Table 14. Output Intensity Registers (continued)
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Driving Load Currents Higher than 50mA
The MAX7313 can be used to drive loads drawing more
than 50mA, like relays and high-current white LEDs, by
paralleling outputs. Use at least one output per 50mA of
load current; for example, a 5V 330mW relay draws
66mA and needs two paralleled outputs to drive it.
Ensure that the paralleled outputs chosen are controlled
by the same blink phase register, i.e., select outputs
from the P0 through P7 range, or the P8 through P15
range. This way, the paralleled outputs are turned on
and off together. Do not use output O16 as part of a
load-sharing design. O16 cannot be switched at the
same time as any of the other outputs because it is controlled by a different register.
The MAX7313 must be protected from the negative
voltage transient generated when switching off inductive loads, such as relays, by connecting a reversebiased diode across the inductive load (Figure 18). The
peak current through the diode is the inductive load’s
operating current.
2V TO 3.6V
5V
0.047µF
V+
µC
P0
P1
SDA
SCL
SDA
MAX7313
P2
BAS16
P3
SCL
P4
P5
I/O
INT/O16
P6
P7
P8
P9
AD0
AD1
AD2
P10
P11
P12
P13
P14
GND
P15
Power-Supply Considerations
The MAX7313 operates with a power-supply voltage of
2V to 3.6V. Bypass the power supply to GND with at
least 0.047µF as close to the device as possible.
For the QFN version, connect the underside exposed
pad to GND.
24
Figure 18. Diode-Protected Switching Inductive Load
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
5V
3.3V
0.047µF
V+
µC
P0
P1
SDA
SDA
SCL
SCL
MAX7313
P2
P3
P4
P5
I/O
INT/O16
P6
P7
P8
P9
AD0
AD1
AD2
INPUT 1
INPUT 2
P10
P11
INPUT 3
INPUT 4
INPUT 5
P12
P13
P14
GND
5V 3.3V
P15
OUTPUT 10
OUTPUT 11
Chip Information
Pin Configurations (continued)
PROCESS: BiCMOS
TOP VIEW
Package Information
+
INT/O16 1
24 V+
AD1 2
23 SDA
AD2 3
22 SCL
P0 4
21 AD0
P1 5
MAX7313AEG
20 P15
P2 6
19 P14
P3 7
18 P13
P4 8
17 P12
P5 9
16 P11
P6 10
15 P10
P7 11
14 P9
GND 12
13 P8
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
24 TQFN
T2444+4
21-0139
90-0022
24 QSPI
E24+1
21-0055
90-0172
QSOP
______________________________________________________________________________________
25
MAX7313
Typical Application Circuit
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Revision History
REVISION
NUMBER
REVISION
DATE
5
6/11
DESCRIPTION
Added lead(Pb)-free parts to Ordering Information and corrected error in Table 9
PAGES
CHANGED
1, 17
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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