OP283GP

a FEATURES Single-Supply – +3 Volts to +36 Volts Wide Bandwidth – 5 MHz Low Offset Voltage – 50 1.5 5 46 2 10 0.4 0.1 Hz to 10 Hz f = 1 kHz, VCM = 2.5 V ELECTRICAL CHARACTERISTICS (@ V = +3.0 V, T = +25 C unless otherwise noted) S A Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short Circuit Limit POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Gain Bandwidth Product NOISE PERFORMANCE Voltage Noise Density Symbol VOS IB IOS CMRR AVO VOH VOL ISC Conditions VCM = 1.5 V, VOUT = 1.5 V, –40°C ≤ TA ≤ +85°C VCM = 1.5 V, VOUT = 1.5 V, –40°C ≤ TA ≤ +85°C VCM = 1.5 V, VOUT = 1.5 V, –40°C ≤ TA ≤ +85°C Min Typ 0.3 350 11 Max 1.0 1.25 600 750 ± 50 +1.5 Units mV mV nA nA nA nA V dB V/mV V mV mA mA 0 VCM = 0 V to 1.5 V, –40°C ≤ TA ≤ +85°C RL = 2 kΩ, 0.2 ≤ VO ≤ 1.8 V RL = 2 kΩ to GND RL = 2 kΩ to GND Source Sink VS = +2.5 V to +3.5 V, –40°C ≤ TA ≤ +85°C –40°C ≤ TA ≤ +85°C, VO = 1.5 V 70 100 +2.0 103 260 2.25 90 25 30 125 PSRR ISY GBP en 60 113 1.2 5 1.5 dB mA MHz nV/√Hz f = 1 kHz, VCM = 1.5 V 10 –2– REV. B OP183/OP283 ELECTRICAL CHARACTERISTICS (@ V = S 15.0 V, TA = +25 C unless otherwise noted) Min Typ 0.01 Max 1.0 1.25 600 750 ± 50 +13.5 Units mV mV nA nA nA V dB V/mV µV/°C nA/°C mV V V mA mA Ω Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift Long Term Offset Voltage OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Limit Open -Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier Supply Voltage Range DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Symbol VOS IB IOS CMRR AVO ∆VOS/∆T ∆ I B/ ∆ T VOS VOH VOL ISC ZOUT PSRR ISY VS SR BWp tS GBP φm en p-p en in Conditions –40°C ≤ TA ≤ +85°C –40°C ≤ TA ≤ +85°C –40 ≤ TA ≤ +85°C –15 VCM = –15 V to +13.5 V, –40°C ≤ TA ≤ +85°C R L = 2 kΩ 70 100 86 1000 3 –1.6 300 400 11 Note 1 RL = 2 kΩ to GND, –40°C ≤ TA ≤ +85°C RL = 2 kΩ to GND, –40°C ≤ TA ≤ +85°C Source Sink f = 1 MHz, AV = +1 VS = ± 2.5 V to ± 18 V, –40°C ≤ TA ≤ +85°C VS = ± 18 V, VO = 0 V, –40°C ≤ TA ≤ +85°C +13.9 14.1 –14.05 30 50 15 1.5 –13.9 70 112 1.2 1.75 ± 18 dB mA V V/µs kHz µs MHz degrees µV p-p nV/√Hz pA/√Hz +3 R L = 2 kΩ 1% Distortion To 0.01% 10 15 50 1.5 5 56 2 10 0.4 0.1 Hz to 10 Hz f = 1 kHz NOTES 1 Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125 °C, with an LTPD of 1.3. Specifications subject to change without notice. WAFER TEST LIMITS Parameter Offset Voltage Input Bias Current Input Offset Current Common-Mode Rejection Power Supply Rejection Ratio Large Signal Voltage Gain Output Voltage High Output Voltage Low Supply Current/Amplifier (@ VS = +5.0 V, TA = +25 C unless otherwise noted) Symbol VOS IB IOS CMRR PSRR AVO VOH VOL ISY Conditions VS = ± 15 V, VO = 0 V VCM = 2.5 V VCM = 2.5 V VCM = 0 V to 3.5 V V = ± 2.5 V to ± 18 V RL = 2 kΩ, 0.2 ≤ VO ≤ 3.8 V R L = 2 kΩ R L = 2 kΩ VS = ± 15 V, VO = 0 V, RL = ∞ Limit 1.0 ± 600 ± 50 70 70 100 4.0 75 1.5 Units mV max nA max nA max dB min dB min V/mV min V min mV max mA max NOTE Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. REV.B –3– OP183/OP283 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Differential Input Voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 V Output Short-Circuit Duration to GND . . . . . . . . . . . . Indefinite Storage Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range OP183/OP283G . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Junction Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 60 Sec) . . . . . . . . . . +300°C Package Type 8-Pin Plastic DIP (P) 8-Pin SOIC (S) θJA3 103 158 θJC 43 43 Units °C/W °C/W DICE CHARACTERISTICS V+ OUT NULL NULL –IN IN+ V– OP183 Die Size 0.058 X 0.063 Inch, 3,717 Sq. Mils Substrate (Die Backside) Is Connected to V–. Transistor Count, 30. NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For supply voltages less than ± 7 V, the absolute maximum input voltage is equal to the supply voltage. Maximum input current should not exceed 2 mA. 3 θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for P-DIP packages; θJA is specified for device soldered in circuit board for SOIC packages. V+ OUTB –INB +INB ORDERING GUIDE Model OP183GP OP183GS OP283GP OP283GS Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 8-Pin Plastic DIP 8-Pin SOIC 8-Pin Plastic DIP 8-Pin SOIC Package Option N-8 SO-8 N-8 SO-8 OUTA –INA +INA V– OP283 Die Size 0.063 X 0.092 Inch, 5,796 Sq. Mils Substrate (Die Backside) Is Connected to V–. Transistor Count, 55. –4– REV. B Typical Characteristics–OP183/OP283 80 70 60 QUANTITY 80 VS = +5V 300X OP AMPS 70 60 VS = ±15V 300X OP AMPS 160 140 120 VS = +5V 590X OP AMPS QUANTITY 40 30 20 10 0 –600 –400 –200 0 +200 +400 +600 INPUT OFFSET VOLTAGE – µV 40 30 20 10 0 –600 –400 –200 0 +200 +400 +600 INPUT OFFSET VOLTAGE – µV QUANTITY 50 50 100 80 60 40 20 0 –600 –400 –200 0 +200 +400 +600 INPUT OFFSET VOLTAGE – µV Figure 1. OP183 Input Offset Voltage Distribution @ +5 V Figure 2. OP183 Input Offset Voltage Distribution @ ± 15 V Figure 3. OP283 Input Offset Voltage Distribution @ +5 V 160 140 120 VS = ±15V 590X OP AMPS QUANTITY – Amplifiers 160 140 120 100 80 60 40 20 0 –600 –400 –200 0 +200 +400 +600 160 ≤–40°C ≤ TA ≤ +85°C 300X OP AMPS PLASTIC PACKAGE 140 ≤–40°C ≤ TA ≤ +85°C 300X OP AMPS PLASTIC PACKAGE QUANTITY – Amplifiers 120 100 80 60 40 20 0 QUANTITY 100 80 60 40 20 0 INPUT OFFSET VOLTAGE – µV 0 2 4 6 8 10 12 0 2 4 6 8 10 12 TCVOS – µV/°C TCVOS – µV/°C Figure 4. OP283 Input Offset Voltage Distribution @ ± 15 V Figure 5. OP183 Input Offset Voltage Drift (TCVOS) Distribution @ +5 V Figure 6. OP183 Input Offset Voltage Drift (TCVOS) Distribution @ ± 15 V 200 180 160 QUANTITY – Amplifiers 200 180 160 QUANTITY – Amplifiers 3 140 120 100 80 60 40 20 0 0 2 4 6 8 10 12 14 16 TCVOS – µV/°C 140 120 100 80 60 40 20 0 0 2 4 6 8 10 12 14 16 TCVOS – µV/°C MAXIMUM OUTPUT SWING – Voltsp-p ≤–40°C ≤ TA ≤ +85°C 590X OP AMPS PLASTIC PACKAGE ≤–40°C ≤ TA ≤ +85°C 590X OP AMPS PLASTIC PACKAGE 2 1 ΩTA = +25°C RL = 2kΩ VS = +3V 0 1k 10k 100k 1M 10M FREQUENCY – Hz Figure 7. OP283 Input Offset Voltage Drift (TCVOS) Distribution @ +5 V Figure 8. OP283 Input Offset Voltage Drift (TCVOS) Distribution @ ± 15 V Figure 9. OP183/OP283 Maximum Output Swing vs. Frequency @ +3 V REV.B –5– OP183/OP283–Typical Characteristics 5 MAXIMUM OUTPUT SWING – Volts p-p 30 MAXIMUM OUTPUT SWING – Volts p-p 1 OUTPUT VOLTAGE ∆ TO RAIL – Volts 4 25 20 100m SINK 3 15 2 ΩTA = +25°C RL = 2kΩ VS = +5V 1k 10 ΩTA = +25°C RL = 2kΩ 5 VS = ±15V 0 1k 10m SOURCE 1 0 10k 100k FREQUENCY – Hz 1M 10M 1m 10k 100k 1M 10M 1µ 10µ 100µ 1m 10m FREQUENCY – Hz LOAD CURRENT – Amps Figure 10. OP183/OP283 Maximum Output Swing vs. Frequency @ +5 V Figure 11. OP183/OP283 Maximum Output Swing vs. Frequency @ ± 15 V Figure 12. Output Voltage vs. Sink & Source Current 600 500 1.50 SUPPLY CURRENT\AMPLIFIER – mA TA = +25°C VS = ±15V INPUT BIAS CURRENT – nA INPUT BIAS CURRENT – nA 500 400 VS = ±15V & VS = +5V 1.25 ∞VS = ±18V RL = ∞ 400 1.00 VS = +3V RL = ∞ VS = +5V RL = ∞ 300 VS = +3V 300 0.75 200 200 0.50 100 100 0.25 0 –15 –10 –5 0 5 10 13.5 0 –75 –50 –25 0 25 50 75 100 125 0 –75 –50 –25 0 25 50 75 100 125 COMMON-MODE VOLTAGE – Volts TEMPERATURE – °C TEMPERATURE – °C Figure 13. Input Bias Current vs. Common-Mode Voltage Figure 14. Input Bias Current vs. Temperature Figure 15. Supply Current per Amplifier vs. Temperature 1.50 60 60 SUPPLY CURRENT\AMPLIFIER – mA SHORT CIRCUIT CURRENT – mA TA = +25°C 1.25 50 –ISC SHORT CIRCUIT CURRENT – mA 50 –ISC 40 1.00 40 0.75 30 +ISC 30 +ISC 20 0.50 20 0.25 10 10 0 0 ±2.5 ±5 ±7.5 ±10 ±12.5 ±15 ±17.5 ±20 SUPPLY VOLTAGE – Volts 0 –75 –50 –25 0 25 50 75 100 125 0 –75 –50 –25 0 25 50 75 100 125 TEMPERATURE – °C TEMPERATURE – °C Figure 16. Supply Current per Amplifier vs. Supply Voltage Figure 17. Short-Circuit Current vs. Temperature @ +5 V Figure 18. Short-Circuit Current vs. Temperature @ ± 15 V –6– REV. B OP183/OP283 140 140 POWER SUPPLY REJECTION – dB TA = +25°C VS = ±15V 90 COMMON-MODE REJECTION – dB 120 100 80 60 40 20 0 100 120 100 TA = +25°C VS = ±15V 80 70 60 ΩTA = +25°C VS = +3V RL = 10kΩ GAIN +PSRR 80 60 –PSRR 40 20 0 GAIN – dB 50 40 30 20 PHASE 10 45 0 10k 100k 1M –45 10M PHASE MARGIN = 43° 90 0 1k 10k 100k 1M 100 1k 10k 100k 1M –10 1k FREQUENCY – Hz FREQUENCY – Hz FREQUENCY – Hz Figure 19. Common-Mode Rejection vs. Frequency Figure 20. Power Supply Rejection vs. Frequency Figure 21. Open-Loop Gain and Phase vs. Frequency @ +3 V 90 80 70 60 GAIN GAIN – dB GAIN – dB 90 60 GAIN 50 40 30 20 PHASE 10 0 –10 1k 10k 100k 1M PHASE MARGIN = 56° OPEN-LOOP GAIN – V/mV ΩTA = +25°C VS = +5V RL = 10kΩ 80 70 ΩTA = +25°C VS = ±15V RL = 10kΩ 1000 900 800 700 600 500 400 300 200 100 0 –75 ΩVS = ±15V OR VS = +3V RL = 2kΩ –50 –25 0 25 50 75 100 125 ΩVS = +5V RL = 2kΩ 50 40 30 20 PHASE 10 0 –10 1k 10k 100k 1M 45 0 –45 10M PHASE MARGIN = 46° PHASE – Degrees 90 90 45 0 –45 10M FREQUENCY – Hz FREQUENCY – Hz PHASE – Degrees 135 135 TEMPERATURE – °C Figure 22. Open-Loop Gain and Phase vs. Frequency @ +5 V Figure 23. Open-Loop Gain and Phase vs. Frequency @ ± 15 V Figure 24. Open-Loop Gain vs. Temperature 50 40 TA = +25°C VS = ±15V AV = +100 25 30 TA = +25°C VS = ±15V OR VS = +3V, +15V Hz 20 CLOSED-LOOP GAIN – dB SLEW RATE – V/µs 30 20 AV = +10 10 0 AV = +1 –10 –20 1k ΩVS = ±15V RL = 2kΩ ± SLEW RATE VOLTAGE NOISE DENSITY – nV/ 25 20 15 15 10 5 ΩVS = ±5V RL = 2kΩ ± SLEW RATE 10 5 10k 100k FREQUENCY – Hz 1M 10M 0 –75 –50 –25 0 0 25 50 75 100 125 10 100 1k 10k TEMPERATURE – °C FREQUENCY – Hz Figure 25. Closed-Loop Gain vs. Frequency Figure 26. Slew Rate vs. Temperature Figure 27. Voltage Noise Density vs. Frequency REV.B –7– PHASE – Degrees 135 OP183/OP283–Typical Characteristics 6.0 TA = +25°C VS = ±15V OR VS = +3\+5V IMPEDANCE – Ω 100 SMALL SIGNAL OVERSHOOT – % 80 90 80 70 60 50 40 30 20 10 CURRENT NOISE DENSITY – pA/ 5.0 TA = +25°C VS = ±15V 70 60 50 40 30 20 10 0 ΩTA = +25°C V S = ±15V R L = 2kΩ NEGATIVE EDGE Hz 4.0 AV = +10 3.0 2.0 AV = +1 1.0 POSITIVE EDGE 0 100 200 300 0 10 100 1k 10k FREQUENCY – Hz 0 100 1k 10k 100k 1M FREQUENCY – Hz CAPACITANCE – pF Figure 28. Current Noise Density vs. Frequency Figure 29. Closed-Loop Output Impedance vs. Frequency Figure 30. Small Signal Overshoot vs. Load Capacitance 1S 100 90 100 90 100 90 10 0% 10 0% 10 0% 5V 1µS 50mV 200nS 5mV Figure 31. Large Signal Performance @ ± 15 V Figure 32. Small Signal Performance @ ± 15 V Figure 33. 0.1 Hz to 10 Hz Noise @ ± 2.5 V O P283 V S = ± 2.5V 1S DISTORTION – % 100 90 RF = 0 AV = +1 V IN = 1 V RM S 8 0kHz LOW PASS FILTER 600 Ω 1k Ω 2k Ω 5k Ω 10 Ω 10 0% NO LOAD 5mV FREQUENCY – Hz Figure 34. 0.1 Hz to 10 Hz Noise @ ± 15 V Figure 35. THD + Noise vs. Frequency for Various Loads –8– REV. B OP183/OP283 APPLICATIONS OP183 Offset Adjust Figure 36 shows how the OP183’s offset voltage can be adjusted by connecting a potentiometer between Pins 1 and 5, and connecting the wiper to VEE. The recommended value for the potentiometer is 10 kΩ. This will give an adjustment range of approximately ± 1 mV. If larger adjustment span is desired, a 50 k Ω potentiometer will yield a range of ± 2.5 mV. VCC +5V SUPPLY +5 Volt Only Stereo DAC for Multimedia The OP283’s low noise and single supply capability are ideally suited for stereo DAC audio reproduction or sound synthesis applications such as multimedia systems. Figure 38 shows an 18-bit stereo DAC output setup that is powered from a single +5 volt supply. The low noise preserves the 18-bit dynamic range of the AD1868. For DACs that operate on dual supplies, the OP283 can also be powered from the same supplies. 3 7 1 VL AD1868 18-BIT DAC VBL 16 3 15 Ω7.68k Ω 330pF 13 Ω7.68kΩ Ω9.76kΩ 2 8 1/2 OP283 4 100pF 1 Ω47kΩ 220µF LEFT CHANNEL OUTPUT OP183 2 1 4 5 6 VOS 2 LL 3 18-BIT DL SERIAL REG. CK 5 6 7 8 DR 18-BIT LR SERIAL REG. DGND VBR 18-BIT DAC VS VREF VOR VEE 4 VREF VOL 14 AGND 12 11 10 Ω7.68kΩ 9 330pF Ω9.76kΩ 5 6 1/2 OP283 7 Ω47kΩ 100pF 220µF RIGHT CHANNEL OUTPUT Ω7.68kΩ Figure 36. OP183 Offset Adjust Phase Reversal The OP183 family is protected against phase reversal as long as both of the inputs are within the range of the positive supply and the negative supply minus 0.6 volts. However if there is a possibility of either input going beyond these limits, then the inputs should be protected with a series resistor to limit input current to 2 mA. Direct Access Arrangement The OP183/OP283 can be used in a single supply Direct Access Arrangement (DAA) as is shown in Figure 37. This figure shows a portion of a typical DAA capable of operating from a single +5 volt supply and it should also work on +3 volt supplies with minor modifications. Amplifiers A2 and A3 are configured so that the transmit signal TXA is inverted by A2 and is not inverted by A3. This arrangement drives the transformer differentially so that the drive to the transformer is effectively doubled over a single amplifier arrangement. This application takes advantage of the OP183/283’s ability to drive capacitive loads, and to save power in single supply applications. 300pF Figure 38. +5 Volt Only 18-Bit Stereo DAC Low Voltage Headphone Amplifiers Figure 39 shows a stereo headphone output amplifier for the AD1849 16-bit SoundPort ® Stereo Codec device. The pseudoreference voltage is derived from the common-mode voltage generated internally by the AD1849, thus providing a convenient bias for the headphone output amplifiers. ΩOPTIONAL GAIN 1kΩ V REF Ω5kΩ +5V 10µF LOUT1L 31 L VOLUME CONTROL Ω10kΩ 1/2 OP283 Ω47kΩ Ω16Ω 220µF HEADPHONE LEFT AD1849 V REF +5V Ω37.4kΩ 0.1µF RXA 0.0047µF Ω3.3kΩ A2 Ω475Ω LOUT1R 29 1/2 OP283 A1 OP283 Ω20kΩ CMOUT 19 Ω10kΩ 1/2 OP283 R VOLUME CONTROL Ω5kΩ Ω1kΩ OPTIONAL GAIN Ω47kΩ Ω20kΩ Ω16Ω 220µF HEADPHONE RIGHT OP283 Ω22.1kΩ 0.1µF TXA Ω20kΩ Ω20kΩ Ω20kΩ A3 2.5VREF 750pF 0.33µF 10µF V REF Figure 39. Headphone Output Amplifier for Multimedia Sound Codec SoundPort is a registered trademark of Analog Devices Inc. OP283 Figure 37. Direct Access Arrangement REV.B –9– OP183/OP283 Low Noise Microphone Amplifier for Multimedia The OP183 family is ideally suited as a low noise microphone preamp for low voltage audio applications. Figure 40 shows a gain of 100 stereo preamp for the AD1849 16-bit SoundPort Stereo Codec chip. The common-mode output buffer serves as a “phantom power” driver for the microphones. Ω10kΩ +5V bandwidth and is not sensitive to false-ground perturbations. The simple false-ground circuit shown achieves good rejection of low frequency interference using standard off-the-shelf components. Amplifier A3 biases A1 and A2 to the middle of their input common-mode range. When operating on a +3 V supply, the center of the OP283’s common-mode range is 0.75 V. This notch filter effectively squelches 60 Hz pickup at a filter Q of 0.75. To reject 50 Hz interference, simply change the resistors in the twin-T section (R1 through R5) from 2.67 k Ω to 3.16 kΩ. The filter section uses an OP283 dual op amp in a twin-T configuration whose frequency selectivity is very sensitive to the relative matching of the capacitors and resistors in the twin-T section. Mylar is the material of choice for the capacitors, and the relative matching of the capacitors and resistors determines the filter’s pass band symmetry. Using 1% resistors and 5% capacitors produces satisfactory results. A Low Voltage Frequency Synthesizer for Wireless Transceiver The OP183’s low noise and the low voltage operation capability serves well for the loop filter of a frequency synthesizer. Figure 42 shows a typical application in a radio transceiver. The phase noise performance of the synthesizer depends on low noise contribution from each component in the loop as the noise is amplified by the frequency division factor of the prescaler. 10µF LEFT ELECTRET CONDENSER MIC INPUT Ω50Ω 1/2 OP283 17 MINL Ω20Ω Ω10kΩ Ω100Ω AD1849 +5V 19 CMOUT 1/2 OP213 Ω100Ω Ω20Ω 10µF Ω10kΩ Ω50Ω 1/2 OP283 15 MINR RIGHT ELECTRET CONDENSER MIC INPUT Ω10kΩ Figure 40. Low Noise Stereo Microphone Amplifier for Multimedia Sound CODEC A +3 Volt 50 Hz/60 Hz Active Notch Filter with False Ground To process ac signals, it may be easier to use a false-ground bias rather than the negative supply as a reference ground. This would reject the power-line frequency interference which oftentimes can obscure low frequency physiological signals, such as heart rates, blood pressures, EEGs, ECGs, et cetera. Ω R2 2.67kΩ +3V ΩR1 2.67kΩ 8 C1 1µF C2 1µF CRYSTAL +3V OP183 REFERENCE OSCILLATOR PHASE DETECTOR PRESCALER ÷ VCONTROL RF OUT VCO VARACTER DIODE 900MHz 2 1/2 OP283 5 VO A1 VIN ΩR6 10kΩ 3 4 1 ΩR3 2.67kΩ ×C3 2µF (1µF × 2) ΩR4 2.67kΩ Ω R5 1.33kΩ (2.67kΩ ÷ 2) Figure 42. A Low Voltage Frequency Synthesizer for a Wireless Transceiver 7 A2 6 1/2 OP283 ΩR8 1kΩ ΩR7 1kΩ The resistors used in the low-pass filter should be of low to moderate values to reduce noise contribution due to the input bias current as well as the resistors themselves. The filter cutoff frequency should be chosen to optimize the loop constant. ΩR11 10kΩ Ω Q = 0.75 NOTE: FOR 50Hz APPLICATIONS CHANGE R1–R4 TO 3.1k Ω AND R5 TO 1.58k Ω (3.16kΩ ÷ 2). +3V ΩR9 75kΩ 2 C5 0.015µF 1 ΩR12 70Ω A3 3 ΩR10 25kΩ C4 1µF OP183 A1, A2, AND A3 = 1/2 OP283 0.75V C6 1µF Figure 41. +3 Volt Supply 50 Hz/60 Hz Notch Filter with Pseudo Ground Figure 41 shows a 50 Hz/60 Hz active notch filter for eliminating line noise in patient monitoring equipment. It has several kilohertz –10– REV. B OP183/OP283 7 QB9 QB10 RB4 RB5 RB6 QB11 RB3 Q7 QB6 QB7 QB8 Q8 R9 Q12 R1 Q1 Z1 R2 QD2 2 JB1 Q2 3 QD1 R8 6 Q4 QB5A CB1 QB4 B A 1 QB3 R10 QB1 RB1 R3LT R3A CC1 QB2 RB2 R3AT R3B R4B R4AT R4LT QB12 R4A R11 QB13 Q10 QB14 5 R7 Q11 Q3 QD3 CF1 R5 Q5 Q6 CC3 CC2 CO 4 Figure 43. OP183 Simplified Schematic * OP283 SPICE Macro-model Rev. A, 9/93 * JCB/ADI * * Copyright 1993 by Analog Devices * * Refer to “README.DOC” file for License Statement. * Use of this model indicates your acceptance of the terms and * provisions in the License Statement. * * Node assignments * noninverting input * | inverting input * | | positive supply * | | | negative supply * ||| | output * ||| | | .SUBCKT OP283 2 1 99 50 45 * * INPUT STAGE AND POLE AT 600 kHz * I1 99 8 1E-4 Q1 4 1 6 QP Q2 5 3 7 QP CIN 1 2 1.5PF R1 50 4 1591 R2 50 5 1591 C1 4 5 83.4E-12 R3 6 8 1075 R4 7 8 1075 IOS 1 2 12.5E-9 EOS 3 2 POLY(1) (15,98) 25E-6 1 DC1 2 36 DZ DC2 1 36 DZ * * GAIN STAGE AND DOMINANT POLE AT 10 Hz * EREF 98 0 POLY(2) (99,0) (50,0) 0 0.5 0.5 REV.B G1 98 9 (4,5) 6.28E-4 R5 9 98 1.59E9 C2 9 98 10E-12 D1 9 10 DX D2 11 9 DX E1 10 98 POLY(1) 99 98 -1.35 1.03 V2 50 11 –0.63 * * COMMON MODE STAGE WITH ZERO AT 353 Hz * ECM 14 98 POLY(2) (1,98) (2,98) 0 3.5 3.5 R7 14 15 1E6 C4 14 15 3.75E-11 R8 15 98 1 * *POLE AT 20 MHz * GP2 98 31 (9,98) 1E-6 RP2 31 98 1E6 CP2 31 98 7.96E-15 * *ZERO AT 1.5 MHz * EZ1 32 98 (31,98) 1E6 RZ1 32 33 1E6 RZ2 33 98 1 CZ1 32 33 106E-15 * *POLE AT 10 MHz * GP10 98 40 (33,98) 1E-6 RP10 40 98 1E6 CP10 40 98 15.9E-15 * * OUTPUT STAGE * RO1 99 45 140 –11– OP183/OP283 RO2 G7 G8 G9 D7 D8 V7 V8 GSY FSY D9 45 45 50 98 60 62 61 98 99 99 40 50 99 45 60 61 60 98 62 50 50 41 140 (99,40) 7.14E-3 (40,50) 7.14E-3 (45,40) 7.14E-3 DX DX DC 0 DC 0 (99,50)5E-6 POLY(2) V7 V8 1.075E-3 1 1 DX D10 42 40 DX V5 41 45 1.2 V6 45 42 1.5 * * MODELS USED * .MODEL DX D .MODEL DZ D(IS=1E-15 BV=7.0) .MODEL QP PNP(BF=143) .ENDS OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 8 PIN 1 1 4 5 0.280 (7.11) 0.240 (6.10) 0.430 (10.92) 0.348 (8.84) 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.100 (2.54) BSC 0.060 (1.52) 0.015 (0.38) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.130 (3.30) MIN SEATING PLANE 0.015 (0.381) 0.008 (0.204) 0.022 (0.558) 0.014 (0.356) 0.070 (1.77) 0.045 (1.15) 8-Lead Narrow-Body SO (SO-8) 8 5 0.1574 (4.00) 0.1497 (3.80) PIN 1 1 4 0.2440 (6.20) 0.2284 (5.80) 0.1968 (5.00) 0.1890 (4.80) 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC 8° 0° 0.0196 (0.50) x 45° 0.0099 (0.25) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) –12– REV. B PRINTED IN U.S.A. C1858a–3–2/96