OP200GP

a FEATURES Low Input Offset Voltage: 75 V Max Low Offset Voltage Drift, Over –55 C < TA < +125 C: 0.5 V/ C Max Low Supply Current (Per Amplifier): 725 A Max High Open-Loop Gain: 5000 V/mV Min Low Input Bias Current: 2 nA Max Low Noise Voltage Density: 11 nV/√Hz at 1 kHz Stable with Large Capacitive Loads: 10 nF Typ Pin Compatible to OP221, MC1458, and LT1013 with Improved Performance Available in Die Form GENERAL DESCRIPTION Dual Low Offset, Low Power Operational Amplifier OP200 PIN CONNECTIONS 16-Lead SOIC (S-Suffix) –IN A 1 +IN A 2 NC 3 V– 4 NC 5 +IN B 6 + 16 OUT A NC NC V+ NC NC OUT B NC NC 8 NC = NO CONNECT The OP200 is the first monolithic dual operational amplifier to offer OP77 type precision performance. Available in the industrystandard 8-lead pinout, the OP200 combines precision performance with the space and cost savings offered by a dual amplifier. The OP200 features an extremely low input offset voltage of less than 75 µV with a drift below 0.5 µV/°C, guaranteed over the full military temperature range. Open-loop gain of the OP200 exceeds 5,000,000 into a 10 kΩ load; input bias current is under 2 nA; CMR is over 120 dB and PSRR below 1.8 µV/V. On-chip Zener zap trimming is used to achieve the extremely low input offset voltage of the OP200 and eliminates the need for offset pulling. Power consumption of the OP200 is very low, with each amplifier drawing less than 725 µA of supply current. The total current drawn by the dual OP200 is less than one-half that of a single OP07, yet the OP200 offers significant improvements over this industry-standard op amp. The voltage noise density of the OP200, 11 nV/√Hz at 1 kHz, is half that of most competitive devices. 8-Lead PDIP (P-Suffix) 8-Lead CERDIP (Z-Suffix) OUT A 1 –IN A 2 +IN A 3 V– 4 A –+ B +– 8 7 6 5 The OP200 is pin compatible with the OP221, LM158, MC1458/1558, and LT1013. The OP200 is an ideal choice for applications requiring multiple precision op amps and where low power consumption is critical. For a quad precision op amp, see the OP400. V+ BIAS VOLTAGE LIMITING NETWORK +IN –IN REV. B Figure 1. Simplified Schematic (One of two amplifiers is shown.) Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved. – –IN B 7 – 15 14 13 12 11 10 9 + V+ OUT B –IN B +IN B OUT V– OP200–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter Input Offset Voltage Long-Term Input Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density* Input Noise Current Input Noise Current Density Input Resistance Differential Mode Input Resistance Common Mode Large Signal Voltage Gain *Sample tested. Specifications subject to change without notice. (VS = ± 15 V, TA = 25 C, unless otherwise noted.) Min OP200A/E Typ Max 25 0.1 75 Min OP200G Typ 80 0.1 1.0 2.0 0.05 0.1 0.5 36 18 22 11 15 0.4 10 125 3000 1500 7000 3200 3.5 5.0 Max 200 Unit µV µV/mo nA nA µVp-p nV/√Hz pAp-p pA/√Hz MΩ GΩ Symbol VOS Conditions IOS IB en p-p en in p-p in RIN RINCM AVO VCM = 0 V VCM = 0 V 0.1 Hz to 10 Hz fO = 10 Hz fO = 1000 Hz 0.1 Hz to 10 Hz fO = 10 Hz 0.05 0.1 0.5 22 11 15 0.4 10 125 VO – ± 10 V R L = 1 0 kΩ R L = 2 kΩ 5000 2000 12000 3700 M/mV –2– REV. B OP200 ELECTRICAL CHARACTERISTICS (V = 15 V, –55 C ≤ T ≤ +125 C for OP200A, unless otherwise noted.) S A Parameter Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large Signal Voltage Gain Symbol VOS TCVOS IOS IB AVO Conditions Min OP200A Typ 45 0.2 Max 125 0.5 2.5 5.0 Unit µV µV/°C nA nA V/mV V/mV V dB µV/V V V VCM = 0 V VCM = 0 V VO = 1 0 V RL = 10 Ω R L = 2 kΩ VCM = ± 12 V VS = +3 V to +18 V RL = 10 kΩ R L = 2 kΩ No Load AV = 1 ± 12 ± 11 3000 1000 ± 12 115 0.15 0.9 9000 2700 ± 12.5 130 0.2 ± 12.4 ± 12 600 8 Input Voltage Range* Common-Mode Rejection Power Supply Rejection Ratio Output Voltage Swing Supply Current Per Amplifier Capacitive Load Stability *Guaranteed by CMR test. Specifications subject to change without notice. IVR CMR PSRR VO ISY 3.2 775 µA nF ELECTRICAL CHARACTERISTICS (V = S 15 V, TA = 25 C, unless otherwise noted.) Min ± 12 OP200A/E Typ ± 13 135 0.4 ± 12 ± 11 ± 12.6 ± 12.2 570 0.1 0.15 500 123 145 3.2 123 725 0.1 1.8 ± 12 ± 11 Max Min ± 12 110 OP200G Typ ± 13 130 0.6 ± 12.6 ± 12.2 570 0.15 500 145 3.2 10 725 5.6 Max Unit V dB µV/V V V µA V/µS kHz dB pF nF Parameter Input Voltage Range Common-Mode Rejection Power Supply Rejection Ratio Output Voltage Swing Supply Current Per Amplifier Slew Rate Gain Bandwidth Product Channel Separation2 1 Symbol IVR CMR PSRR VO Conditions VCM = ± 12 V VS = ± 3 V to ± 18 V RL= 10 kΩ RL = 2 kΩ No Load 120 ISY SR GBWP CS AV = 1 VO = 20 V p-p fO = 10 Hz AV = 1 No Oscillations Input Capacitance Capacitive Load Stability CIN 10 NOTES 1 Guaranteed by CMR test. 2 Guaranteed but not 100% tested. Specifications subject to change without notice. REV. B –3– OP200–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (V = ±15 V, –40 C ≤ T ≤ +85 C, unless otherwise noted.) S A Parameter Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large-Signal Voltage Gain Input Voltage Range* Common-Mode Rejection Power Supply Rejection Ratio Output Voltage Swing Supply Current Per Amplifier Capacitive Load Stability *Guaranteed by CMR test. Symbol VOS TCVOS IOS IB AVO Conditions Min OP200E Typ 35 0.2 Max 100 0.5 2.5 5.0 Min OP200G Typ 110 0.6 0.1 0.5 Max 300 2.0 6.0 10.0 Unit µV µV/°C nA nA V/mV V/mV V dB VCM = 0 V VCM = 0 V VO = ± 10 V RL= 10 kΩ R L = 2 kΩ 3000 1500 ± 12 VCM = ± 12 V VS = ± 3 V to ± 18 V RL = 10 kΩ R L = 2 kΩ No Load AV = 1 No Oscillations ± 12 ± 11 115 0.08 03 10000 3200 ± 12.5 130 0.15 ± 12.4 ± 12 600 10 10 2000 1000 ± 12 105 3.2 ± 12 ± 11 775 5000 2500 ± 12.5 130 0.3 ± 12.4 ± 12.2 600 10 10 775 10.0 IVR CMR PSRR VO µV/V V V µA nF nF ISY Specifications subject to change without notice. –4– REV. B OP200 1/2 OP200 V1 20Vp-p @ 10Hz 100 10k 50k 50 1/2 OP200 V2 1/2 OP200 1/2 OP200 eOUT TO SPECTRUM ANALYZER CHANNEL SEPARATION = 20 LOG V1 V2/1000 eOUT(nV/ Hz) = 2 eOUT(nV/ Hz) 101 Figure 2. Channel Separation Test Circuit Figure 3. Noise Test Schematic ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 30 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous Storage Temperature Range P, S, Z-Package . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range OP200A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C OP200E . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C OP200G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Package Type 8-Lead CERDIP (Z) 8-Lead Plastic DIP (P) 16-Lead SOIC (S) JA 2 JC Package TA = 25 C VOS Max ( V) 75 75 200 200 200 CERDIP 8-Lead OP200AZ OP200EZ OP200GP OP200GS OP200GS-REEL Operating Temperature Range MIL XIND XIND XIND XIND Plastic Unit °C/W °C/W °C/W For military processed devices, please refer to the Standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp 148 96 92 16 37 27 SMD Part Number 5962-8859301M2A 5962-8859301MPA ADI Equivalent OP200ARCMDA OP200AZMDA NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for CERDIP and PDIP packages; JA is specified for device soldered to printed circuit board for SOIC package. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP200 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. B –5– OP200 –Typical Performance Characteristics 60 TA = 25 C VS = 15V 2 V 3 VS = 50 15V INPUT BIAS CURRENT – nA 2 VS = 15V CHANGE IN OFFSET VOLTAGE – INPUT OFFSET VOLTAGE – V 40 1 30 0 –1 1 20 10 0 –75 –50 –25 0 25 50 75 TEMPERATURE – C –2 5 0 1 2 3 TIME – Minutes 4 5 100 125 –3 0 25 50 75 –75 –50 –25 TEMPERATURE – C 100 125 TPC 1. Warm-Up Drift TPC 2. Input Offset Voltage vs. Temperature TPC 3. Input Bias Current vs. Temperature 300 VS = INPUT OFFSET CURRENT – pA 1.0 140 COMMON-MODE REJECTION – dB TA = 25 C VS = 15V 15V INPUT BIAS CURRENT – nA 0.8 250 120 100 80 60 40 20 0 TA = 25 C VS = 15V 200 0.6 150 100 0.4 50 0.2 0 –75 –50 –25 0 25 50 75 TEMPERATURE – C 100 125 0 –15 –10 –5 0 5 10 COMON-MODE VOLTAGE – V 15 1 10 100 1k FREQUENCY – Hz 10k 100k TPC 4. Input Offset Current vs. Temperature TPC 5. Input Bias Current vs. Common-Mode Voltage TPC 6. Common-Mode Rejection vs. Frequency 100 1000 VOLTAGE NOISE DENSITY – nV/ Hz CURRENT NOISE DENSITY – fA/ Hz TA = 25 C VS = 15V TA = 25 C VS = 15V 10 1 10 100 FREQUENCY – Hz 1k 100 1 10 100 FREQUENCY – Hz 1k TPC 7. Voltage Noise Density vs. Frequency TPC 8. Current Noise Density vs. Frequency TPC 9. 0.1 to 10 Hz Noise –6– REV. B OP200 1.18 TOTAL SUPPLY CURRENT – mA 1.16 140 POWER SUPPLY REJECTION – nA 1.16 TOTAL SUPPLY CURRENT – mA TWO AMPLIFIERS TA = 25 C TWO AMPLIFIERS VS = 15V 1.15 120 100 80 60 40 20 0 0.1 POSITIVE SUPPLY NEGATIVE SUPPLY 1.14 1.14 1.12 1.13 1.10 1.08 1.06 2 6 10 14 SUPPLY VOLTAGE – V 16 1.12 TA = 25 C 1 10 100 1k FREQUENCY – Hz 10k 100k 1.11 –75 –50 –25 0 25 50 75 TEMPERATURE – C 100 125 TPC 10. Total Supply Current vs. Supply Voltage TPC 11. Total Supply Current vs. Temperature TPC 12. Power Supply Rejection vs. Frequency 0.7 POWER SUPPLY REJECTION – V/V 6000 VS = 15V RL = 2k OPEN-LOOP GAIN – dB 140 120 100 80 60 PHASE 40 20 0 GAIN 90 135 180 0 TA = 25 C VS = 15V PHASE SHIFT – Degrees 0.6 5000 OPEN-LOOP GAIN – V/mV 0.5 4000 0.4 3000 0.3 2000 0.2 0.1 –75 –50 1000 0 –75 –50 –25 0 25 50 75 TEMPERATURE – C 100 125 –25 0 25 50 75 TEMPERATURE – C 100 125 –20 10 100 1k 10k FREQUENCY – Hz 100k 1M TPC 13. Power Supply Rejection vs. Temperature TPC 14. Open-Loop Gain vs. Temperature TPC 15. Open-Loop Gain and Phase Shift vs. Frequency OUTPUT SWING – V p-p AT 1% Distortion 140 120 100 GAIN – dB 30 TA = 25 C VS = 15V 1 TA = 25 C VS = 15V AV = 1000 AV = 100 AV = 10 AV = 100 AV = 10 25 DISTORTION – % 20 15 0.1 80 60 40 AV = 1 10 0.01 TA = 25 C VS = 15V VOUT = 10V p-p RL = 2k AV = 1 20 0 10 5 100 1k 10k FREQUENCY – Hz 100k 1M 0 10 100 1k 10k FREQUENCY – Hz 100k 0.001 100 1k FREQUENCY – Hz 10k TPC 16. Closed-Loop Gain vs. Frequency TPC 17. Maximum Output Swing vs. Frequency TPC 18. Total Harmonic Distortion vs. Frequency REV. B –7– OP200 50 45 40 29 150 TA = 25 C VS = 15V SHORT-CIRCUIT CURRENT – mA TA = 25 C VS = 15V FALLING OVERSHOOT – % 35 30 25 20 15 10 5 0 0 0.5 1.0 1.5 1.0 1.5 CAPACITIVE LOAD – nF 3.0 RISING 27 26 SINKING 25 24 SOURCING 23 22 0 1 2 3 TIME – Minutes 4 5 CHANNEL SEPARATION – dB 28 140 130 120 110 100 90 10 100 1k 10k FREQUENCY – Hz 100k TPC 19. Overshoot vs. Capacitive Load TPC 20. Short-Circuit Current vs. Time TPC 21. Channel Separation vs. Frequency TPC 22. Large Signal Transient Response TPC 23. Small Signal Transient Response TPC 24. Small Signal Transient Response CLOAD = 1 nF APPLICATIONS INFORMATION The OP200 is inherently stable at all gains and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply decoupling is highly recommended. Proper supply decoupling reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP200. APPLICATIONS Dual Low-Power Instrumentation Amplifier +15V 3 VIN 5 1/2 OP200AZ 6 20k 5k RG VOUT = 5 + 40000 VIN + VREF RG 5k 7 2 4 –15V 20k 8 1/2 OP200AZ 1 VOUT VREF A dual instrumentation amplifier that consumes less than 33 mW of power per channel is shown in Figure 4. The linearity of the instrumentation amplifier exceeds 16 bits in gains of 5 to 200 and is better than 14 bits in gains from 200 to 1000. CMRR is above 115 dB (gain = 1000). Offset voltage drift is typically 0.2 µV/°C over the military temperature range, which is comparable to the best monolithic instrumentation amplifiers. The bandwidth of the low power instrumentation amplifier is a function of gain and is shown below: Gain 5 10 100 1000 Bandwidth 150 kHz 67 kHz 7.5 kHz 500 Hz –8– Figure 4. Dual Low Power Instrumentation Amplifier The output signal is specified with respect to the reference input, which is normally connected to analog ground. The reference input can be used to offset the output from –10 V to +10 V if required. REV. B OP200 Precision Absolute Value Amplifier Precision Current Pump The circuit in Figure 5 is a precision absolute value amplifier with an input impedance of 10 MΩ. The high gain and low TCVOS of the OP200 ensure accurate operation with microvolt input signals. In this circuit, the input always appears as a common-mode signal to the op amps. The CMR of the OP200 exceeds 120 dB, yielding an error of less than 2 ppm. +15 C2 0.1pF R1 1k 6 1/2 OP200AZ 5 D1 1N4148 R2 2k 7 VOUT R3 1k Maximum output current of the precision current pump shown in Figure 6 is ± 10 mA. Voltage compliance is ± 10 V with ± 15 V supplies. Output impedance of the current transmitter exceeds 3 MΩ with linearity better than 16 bits. R1 10k VIN R2 10k R3 10k 1/2 OP200EZ 3 1 R5 100 +15 8 7 1/2 OP200EZ 6 4 IOUT = VIN RS = VIN = 10mA/V 100 5 IOUT 2 3 C1 30pF 8 1/2 1 OP200AZ R4 1k D1 1N4148 0V < VOUT < 10V VIN 2 4 C2 0.1pF –15 Figure 6. Precision Current Pump –15 Dual 12-Bit Voltage Output DAC Figure 5. Precision Absolute Value Amplifier The dual output DAC shown in Figure 7 is capable of providing untrimmed 12-bit accurate operation over the entire military temperature range. Offset voltage, bias current, and gain errors of the OP200 contribute less than 1/10 of an LSB error at 12 bits over the military temperature range. 5V 21 VDD DAC-8222EW 10V REFERENCE VOLTAGE 4 VREFA DAC A 1/2 DAC8212AV RFBA 3 8 IOUTA 2 2 – 1/2 OP200AZ 1 OUTA 3 DAC DATA BUS PINS 6(MSB) – 17(LSB) 23 RFBB 22 VREFB DAC B 1/2 DAC8212AV IOUTB 24 6 4 –15V – 1/2 OP200AZ 7 OUTB DAC CONTROL 18 DAC A/DAC B 19 CS 20 WR DGND 5 AGND 1 5 Figure 7. Dual 12-Bit Voltage Output DAC REV. B –9– OP200 Dual Precision Voltage Reference +5V –2.5V R2 10k R1 22k D1 1N914 8 1/2 OP200AZ 3 2 REF43A 4 5 6 6 1/2 OP200AZ 7 4 –5V R4 5k R3 10k 2 A dual OP200 and a REF43, a 2.5 V reference, can be used to build a ± 2.5 V precision voltage reference. Maximum output current from each reference is ± 10 mA with load regulation under 25 µV/mA. Line regulation is better than 15 µV/V and output voltage drift is under 20 µV/°C. Output voltage noise from 0.1 Hz to 10 Hz is typically 75 µV p-p. R1 and D1 ensure correct start-up. Programmable High Resolution Window Comparator The programmable window comparator shown in Figure 9 is easily capable of 12-bit accuracy over the full military temperature range. A dual CMOS 12-bit DAC, the DAC8212, is used in the voltage switching mode to set the upper and lower thresholds (DAC A and DAC B, respectively). –2.5V Figure 8. Dual Precision Voltage Reference VIN 21 VDD 15V 8 10V REFERENCE 2 IOUTA DAC A 1/2 DAC8212AV RREFA 4 R1 10k DAC DATA BUS PINS 6(MSB) – 17(LSB) 3 + 1/2 OP200AZ 1 D1 1N4148 5V R3 10k R4 10k OUTB 2 – + 1/2 OP200AZ 7 TTL OUT Q1 2N2222 –15V 4 R2 10k D2 1N4148 24 IOUTB DAC B 1/2 DAC8212AV RREFB 22 5 – DAC CONTROL SIGNALS 18 DAC A/DAC B 19 CS 20 WR DGND 5 AGND 1 Figure 9. Programmable High Resolution Window Comparator –10– REV. B OP200 OUTLINE DIMENSIONS 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Z-Suffix Dimensions shown in inches and (millimeters) 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) P-Suffix Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 8 0.055 (1.40) MAX 5 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 8 5 PIN 1 1 4 0.310 (7.87) 0.220 (5.59) 1 4 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 15 0 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37) 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.100 (2.54) BSC 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16-Lead Standard Small Outline Package [SOIC] Wide Body (RW-16) S-Suffix Dimensions shown in millimeters and (inches) 10.50 (0.4134) 10.10 (0.3976) 16 9 7.60 (0.2992) 7.40 (0.2913) 1 8 10.65 (0.4193) 10.00 (0.3937) 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 0.75 (0.0295) 0.25 (0.0098) 45 COPLANARITY 0.10 SEATING PLANE 8 0.33 (0.0130) 0 0.20 (0.0079) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. B –11– OP200 Revision History Location 2/04—Data Sheet changed from REV. A to REV. B. Page OP200F deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Changes to Figure 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4/02—Data Sheet changed from REV. 0 to REV. A. C00322–0–2/04(B) Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 –12– REV. B