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AO4290A

AO4290A

  • 厂商:

    AOSMD(美国万代)

  • 封装:

    SO8_150MIL

  • 描述:

    MOSFET N-CH 100V 15.5A 8SOIC

  • 数据手册
  • 价格&库存
AO4290A 数据手册
AO4290A 100V Channel AlphaSGT TM General Description Product Summary VDS • Trench Power AlphaSGTTM technology • Low RDS(ON) • Logic Driven • RoHS and Halogen-Free Compliant Applications ID (at VGS=10V) 100V 15.5A RDS(ON) (at VGS=10V) < 6.4mΩ RDS(ON) (at VGS=4.5V) < 7.6mΩ 100% UIS Tested 100% Rg Tested • Synchronous Rectification for Quick Charger 3.0 • Synchronous Rectification for AC/DC adapter and DC/DC brick power SOIC-8 Top View D D D Top View Bottom View D D G 1 8 2 7 3 6 4 5 G PIN1 S S S S PIN1 Orderable Part Number Package Type Form Minimum Order Quantity AO4290A SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage VGS TA=25°C Continuous Drain Current Pulsed Drain Current C Avalanche energy L=0.1mH VDS Spike 10µs TA=25°C Power Dissipation B C Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.1.0: July 2016 Steady-State Steady-State A IAS 44 A EAS 97 mJ VSPIKE 120 V 3.1 W 2.0 TJ, TSTG Symbol t ≤ 10s V 62 PD TA=70°C ±20 12 IDM Avalanche Current C Units V 15.5 ID TA=70°C Maximum 100 RθJA RθJL -55 to 150 Typ 31 59 16 www.aosmd.com °C Max 40 75 24 Units °C/W °C/W °C/W Page 1 of 5 AO4290A Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V 100 Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA 1 TJ=55°C 1.3 ±100 nA 1.75 2.3 V 5.3 6.4 9.5 11.5 7.6 RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=13.5A 6.1 gFS Forward Transconductance VDS=5V, ID=15.5A 90 VSD Diode Forward Voltage IS=1A, VGS=0V IS Maximum Body-Diode Continuous Current TJ=125°C 0.68 DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=50V, f=1MHz f=1MHz µA 5 VGS=10V, ID=15.5A Coss Units V VDS=100V, VGS=0V IDSS Max mΩ S 1 V 4 A 4525 pF 345 pF 22.5 pF 1.1 1.8 Ω SWITCHING PARAMETERS Total Gate Charge Qg(10V) 65 95 nC Qg(4.5V) Total Gate Charge 30 45 nC Qgs Gate Source Charge Qgd VGS=10V, VDS=50V, ID=15.5A 0.5 mΩ 10 nC Gate Drain Charge 9 nC tD(on) Turn-On DelayTime 10 ns 6 ns 52 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time Qrr VGS=10V, VDS=50V, RL=3.25Ω, RGEN=3Ω 10 ns IF=15.5A, di/dt=500A/µs 32 Body Diode Reverse Recovery Charge IF=15.5A, di/dt=500A/µs 162 ns nC Body Diode Reverse Recovery Time A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=75°C/W 0.1 PDM 0.01 Single Pulse Ton T 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: July 2016 www.aosmd.com Page 4 of 5 AO4290A Figure A: Charge Gate Charge Test Circuit & Waveforms Gate Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Figure B:Resistive ResistiveSwitching Switching Test Test Circuit Circuit&&Waveforms Waveforms RL Vds Vds Vgs 90% + Vdd DUT VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Figure C: UnclampedInductive InductiveSwitching Switching (UIS) Test Unclamped TestCircuit Circuit&&Waveforms Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Figure D: Recovery Diode Recovery Test Circuit & Waveforms Diode Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.1.0: July 2016 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5
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