PI74FCT543ATQ

PI74FCT543T/544T (25Ω Ω Series) PI74FCT2543T PI74FCT543T/544T LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 (25Ω Ω Series) PI74FCT2543T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Latched Transceivers Product Features: Product Description: • PI74FCT543T/544/2543T is pin compatible with bipolar FAST™ Series at a higher speed and lower power consumption • 25Ω series resistor on all outputs • TTL input and output levels • Low ground bounce outputs • Extremely low static power • Hysteresis on all inputs • Industrial operating temperature range: –40°C to +85°C • Packages available: – 24-pin 300 mil wide plastic DIP (P) – 24-pin 150 mil wide plastic QSOP (Q) – 24-pin 150 mil wide plastic TQSOP (R) – 24-pin 300 mil wide plastic SOIC (S) • Device models available on request Pericom Semiconductor’s PI74FCT series of logic circuits are produced in the Company’s advanced 0.8 micron CMOS technology, achieving industry leading speed grades. All PI74FCT2XXX devices have a built-in 25 ohm series resistor on all outputs to reduce noise because of reflections, thus eliminating the need for an external terminating resistor. The PI74FCT543T/544T and PI74FCT2543T is an 8-bit wide non-inverting transceiver designed with two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0–A7 or to take data from B0–B7, as indicated in the Truth Table. With CEAB LOW, a LOW signal makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change the A inputs. With CEAB and OEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEAB, LEAB, and OEAB inputs. The PI74FCT543T is a noninverting of the PI74FCT544T. PI74FCT543/544/2543T Logic Block Diagram D DETAIL A Q B0 LE A0 Q D LE A1 B1 A2 B2 A3 A4 B3 DETAIL A x 7 B4 A5 B5 A6 B6 A7 B7 OEBA OEAB CEBA CEAB LEBA LEAB NOTE: PI74FCT543/2543T function is shown. 1 PS2020A 03/11/96 PI74FCT543T/544T (25Ω Ω Series) PI74FCT2543T LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT543/544/2543T Product Pin Configuration Product Pin Description Pin Name OEAB OEBA CEAB CEBA LEAB LEBA A0-A7 B0-B7 GND VCC 24-PIN P24 Q24 R24 S24 Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs Ground Power PI74FCT543/2543T Truth Table (Non-Inverting)(1,2) For A-to-B (Symmetric with B-to-A) 1. 2. OEAB Latch Status A-to-B Output Buffers B0–B7 — — Storing High-Z — H — Storing — — — H — High Z L L L Transparent Current A Inputs L H L Storing Previous* A Inputs CEAB Inputs LEAB H *Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level — = Don’t Care or Irrevelant A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA, and OEBA. 2 PS2020A 03/11/96 PI74FCT543T/544T (25Ω Ω Series) PI74FCT2543T LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. –65°C to +150°C Ambient Temperature with Power Applied ................................. -40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V DC Input Voltage ......................................................................... –0.5V to +7.0V DC Output Current ................................................................................... 120 mA Power Dissipation ......................................................................................... 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 5%) Parameters Description Test Conditions(1) Min. Typ(2) Max. Units VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –15.0 mA 2.4 3.0 V VOL Output LOW Current VCC = Min., VIN = VIH or VIL IOL = 64 mA 0.3 0.55 V VOL Output LOW Current VCC = Min., VIN = VIH or VIL IOL = 12 mA (25Ω Series) 0.3 0.50 V VIH Input HIGH Voltage Guaranteed Logic HIGH Level VIL Input LOW Voltage Guaranteed Logic LOW Level IIH Input HIGH Current (Except I/O pins) VCC = Max. IIL Input LOW Current IIH 2.0 V 0.8 V VIN = VCC 1 µA (Except I/O pins) VCC = Max. VIN = GND –1 µA Input HIGH Current (I/O pins Only) VCC = Max. VIN = VCC 1 µA IIL Input LOW Current (I/O pins Only) VCC = Max. VIN = GND –1 µA IOZH High Impedance VCC = MAX. VOUT = 2.7V 1 µA IOZL Output Current VOUT = 0.5V –1 µA VIK Clamp Diode Voltage VCC = Min., IIN = –18 mA –0.7 –1.2 V IOFF Power Down Disable VCC = GND, VOUT = 4.5V — — 100 µA IOS Short Circuit Current (3) –60 –120 mA VH Input Hysteresis 200 mV VCC = Max. , VOUT = GND Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) Description Test Conditions Typ Max. Units CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. 3 PS2020A 03/11/96 PI74FCT543T/544T (25Ω Ω Series) PI74FCT2543T LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 500 µA ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 2.0 mA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open CEAB and OEAB = GND CEBA = VCC One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND 0.15 0.25 mA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fCP = 10 MHZ (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC fI = 5 MHZ One Bit Toggling VCC = Max., Outputs Open fCP = 10 MHZ (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = Vcc Eight Bits Toggling fI = 2.5 MHZ 50% Duty Cycle VIN = VCC VIN = GND 1.5 3.5(5) mA VIN = 3.4V VIN = GND 2.0 5.5(5) VIN = VCC VIN = GND 3.8 7.3(5) VIN = 3.4V VIN = GND 6.0 16.3(5) Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 4 PS2020A 03/11/96 PI74FCT543T/544T (25Ω Ω Series) PI74FCT2543T LATCHED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT543/2543T (non-inverting) Switching Characteristics over Operating Range 543T/2543T 543AT/2543AT Com. Parameters Description tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tSU tH tW Propagation Delay Transparent Mode AN to BN or BN to AN Propagation Delay LEBA to AN, LEAB to BN Output Enable Time OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Output Disable Time(3) OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Setup Time, HIGH or LOW AN or BN to LEBA or LEAB Hold Time, HIGH or LOW AN or BN to LEBA or LEAB LEBA or LEAB Pulse Width LOW(3) 543CT/2543CT Com. 543DT Com. Com. Conditions(1) Min Max Min Max Min Max Min Max Unit CL = 50 pF RL = 500Ω 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 ns 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 ns 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 ns 2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 ns 3.0 — 2.0 — 2.0 — 1.5 — ns 2.0 — 2.0 — 2.0 — 1.5 — ns 5.0 — 5.0 — 5.0 — 3.0 — ns PI74FCT544T (inverting) Switching Characteristics over Operating Range 544T 544AT Com. Parameters Description tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tSU tH tW Propagation Delay Transparent Mode AN to BN or BN to AN Propagation Delay LEBA to AN, LEAB to BN Output Enable Time OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Output Disable Time(3) OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Setup Time, HIGH or LOW AN or BN to LEBA or LEAB Hold Time, HIGH or LOW AN or BN to LEBA or LEAB LEBA or LEAB Pulse Width LOW(3) 544CT Com. Com. Conditions(1) Min Max Min Max Min Max Unit CL = 50 pF RL = 500Ω 2.5 8.5 2.5 6.5 2.5 5.3 ns 2.5 12.5 2.5 8.0 2.5 7.0 ns 2.0 12.0 2.0 9.0 2.0 8.0 ns 2.0 9.0 2.0 7.5 2.0 6.5 ns 3.0 — 2.0 — 2.0 — ns 2.0 — 2.0 — 2.0 — ns 5.0 — 5.0 — 5.0 — ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 5 PS2020A 03/11/96