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CDNBS08-SRDA3.3-6

CDNBS08-SRDA3.3-6

  • 厂商:

    BOURNS(伯恩斯)

  • 封装:

    SOIC8_150MIL

  • 描述:

    TVS DIODE 3.3VWM 10.9VC SMD

  • 数据手册
  • 价格&库存
CDNBS08-SRDA3.3-6 数据手册
PL IA Features ■ ■ ■ ■ ■ Applications ■ ■ ■ ■ NT Lead free device (RoHS compliant*) Protects up to 6 lines Bidirectional configuration ESD protection > 40 KV Low capacitance: 15 pF Ethernet – 10/100 Base T Computer I/O Ports – SCSI, FireWire & USB Set-top box protection Video Cards *R oH S CO M CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo General Information The markets of portable communications, computing and video equipment are challenging the semiconductor industry to develop increasingly smaller electronic components. Bourns offers Steering Diode/Transient Voltage Suppressor Array combination diodes for surge and ESD protection applications in an 8 Lead Narrow Body SOIC package size format. Bourns Chip Diodes conform to JEDEC standards, are easy to handle on standard pick and place equipment and their flat configuration minimizes roll away. The Bourns® device will meet IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5 (Surge) requirements. 1 I/O 1 2 I/O 2 3 +VREF 4 I/O 3 GND 8 I/O 6 7 I/O 5 6 I/O 4 5 Electrical Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter Symbol CDNBS08SRDA3.3-6 SRDA05-6 Unit Minimum Break Down Voltage @ 1 mA Working Peak Voltage Maximum Clamping Voltage VC @ IP Maximum Clamping Voltage @ 8/20 µs VC @ IPP Maximum Leakage Current @ VWM Maximum Cap. Bidirectional @ 0 V, 1 MHz Peak Pulse Power (tp = 8/20 µs) Continuous Power Dissipation Forward Voltage @ 100 mA, 300 µs – Square Wave2 1 VBR VWM VF VF ID C j(SD) PPP PPC VF 4.0 3.3 6.5 10.9 V @ 43 A 125 15 500 1000 1.1 6.0 5.0 9.8 13.5 V @ 42 A 20 V V V V µA pF W MW V Notes: 1. See Peak Pulse Power vs. Pulse Time. 2. Capacitance measured at VWM = VCC connected between I/O pins to pin 8 and 5 (Gnd). VR = VWM @ 1 MHz. Thermal Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter Operating Temperature Storage Temperature Symbol TJ TSTG Max. -55 to +150 -55 to +150 Unit °C °C *RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Mechanical Characteristics This is a molded JEDEC Narrow Body SO-8 package with lead free 100 % Sn plating on the lead frame. It weighs approximately 15 mg and has a flammability rating of UL 94V-0. Product Dimensions A Recommended Footprint A B F H D G C B C E D DIMENSIONS = MILLIMETERS (INCHES) Dimensions E A B C D E 1.143 - 1.397 (0.045 - 0.055) 0.635 - 0.889 (0.025 - 0.035) 6.223 Min. (0.245) 3.937 - 4.191 (0.155 - 0.165) 1.016 - 1.27 (0.040 - 0.050) Dimensions A B C D E F G H 4.80 - 5.00 (0.189 - 0.196) 3.80 - 4.00 (0.150 - 0.157) 5.80 - 6.20 (0.229 - 0.244) 1.35 - 1.75 (0.054 - 0.068) 0.10 - 0.25 (0.004 - 0.008) 0.25 - 0.50 (0.010 - 0.019) 0.40 - 1.250 (0.016 - 0.049) 0.18 - 0.25 (0.007 - 0.009) How To Order CD NBS08 - SRDA 3.3 - 6 Common Code CD = Chip Diode Package NBS08 = Narrow Body SOIC8 Package Model SRDA = Steering/TVS Diode Array Working Peak Reverse Voltage 3.3 = 3.3 VRWM (Volts) 05 = 5.0 VRWM (Volts) Number of Protection Lines 6 = 6 Lines Typical Part Marking CDNBS08-SRDA3.3-6 .......................................................... CDNBS08-SRDA05-6 .......................................................... SGG SGH Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Packaging The surface mount product is packaged in a 12 mm x 8 mm Tape and Reel format per EIA-481 standard. TOP SIDE VIEW (INTO COMPONENT POCKET) 0.3 ± 0.05 (.01 ± .002) 2.0 ± 0.05 (.08 ± .002) 4.0 ± 0.1 (.16 ± .004) 1.5 ± 0.1/-0 (.06 ± .004/-0) DIA. 1.75 ± 0.1 (.07 ± .004) R 0.3 MAX. (0.01) 12.0 ± 0.3 (.47 ± .01) 5.5 ± 0.3 (.22 ± .01) 9.0 ± 0.1 (.354 ± .004) 8.0 ± 0.3 (.31 ± .01) R 0.25 TYP. (0.010) 2.1 ± 0.1 (.083 ± .004) 6.4 ± 0.1 (.252 ± .004) ORIENTATION OF COMPONENT IN POCKET BACKSIDE FACING UP Block Diagram GND 8 I/O 6 7 I/O 5 6 I/O 4 5 Device Pinout Pin 1 2 3 4 5 6 1 2 I/O 2 3 +VREF 4 I/O 3 Function I/O 1 I/O 2 +VREF I/O 3 I/O 4 I/O 5 I/O 6 GND 7 8 I/O 1 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Performance Graphs Peak Pulse Power vs Pulse Time 10,000 IPP – Peak Pulse Current (% of IPP) PPP – Peak Pulse Current (W) Pulse Wave Form 120 100 80 60 40 20 0 td = t|IPP/2 tt Test Waveform Parameters tt = 8 µs td = 20 µs et 1,000 500 W, 8/20 µs Waveform 100 10 0.01 1 10 100 1,000 10,000 0 5 10 15 t – Time (µs) 20 25 30 td – Pulse Duration (µs) Power Derating Curve 100 80 60 40 20 Average Power 0 0 25 50 75 100 125 150 Peak Pulse Power 8/20 µs % of Rated Power TL – Lead Temperature (°C) Reliable Electronic Solutions Asia-Pacific: Tel: +886-2 2562-4117 • Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 • Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 • Fax: +1-951 781-5700 www.bourns.com Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. COPYRIGHT© 2005, BOURNS, INC. LITHO IN U.S.A., IPA0508 10/05
CDNBS08-SRDA3.3-6 价格&库存

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