TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
D
D
D
D
D
D
Output Swing Includes Both Supply Rails
Extended Common-Mode Input Voltage
Range . . . 0 V to 4.5 V (Min) with 5-V Single
Supply
No Phase Inversion
Low Noise . . . 18 nV/√Hz Typ at f = 1 kHz
Low Input Offset Voltage
950 µV Max at TA = 25°C (TLV243xA)
Low Input Bias Current . . . 1 pA Typ
D
D
D
D
Very Low Supply Current . . . 125 µA Per
Channel Max
600-Ω Output Drive
Macromodel Included
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
description
5
V
VOH
OH – High-Level Output Voltage – V
The TLV243x and TLV243xA are low-voltage
operational amplifier from Texas Instruments. The
common-mode input voltage range for each
device is extended over the typical CMOS
amplifiers making them suitable for a wide range
of applications. In addition, these devices do not
phase invert when the common-mode input is
driven to the supply rails. This satisfies most
design requirements without paying a premium
for rail-to-rail input performance. They also exhibit
rail-to-rail output performance for increased
dynamic range in single- or split-supply applications. This family is fully characterized at 3-V and
5-V supplies and is optimized for low-voltage
operation. The TLV243x only requires 100 µA
(typ) of supply current per channel, making it ideal
for battery-powered applications. The TLV243x
also has increased output drive over previous
rail-to-rail operational amplifiers and can drive
600-Ω loads for telecom applications.
ÁÁ
ÁÁ
ÁÁ
VDD = 5 V
4
3
TA = 125°C
TA = 85°C
2
TA = 25°C
TA =–40°C
1
0
0
4
8
12
16
IOH – High-Level Output Current – A
m
20
Figure 1
The other members in the TLV243x family are the high-power, TLV244x, and micro-power, TLV2422, versions.
The TLV243x, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for
high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels and
low-voltage operation, these devices work well in hand-held monitoring and remote-sensing applications. In
addition, the rail-to-rail output feature with single- or split-supplies makes this family a great choice when
interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV243xA is available and
has a maximum input offset voltage of 950 µV.
If the design requires single operational amplifiers, see the TI TLV2211/21/31. This is a family of rail-to-rail output
operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal
for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TLV2432 and TLV2432A AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL
OUTLINE
(D)
CHIP CARRIER
(FK)
CERAMIC DIP
(JG)
TSSOP
(PW)
CERAMIC FLAT
PACK
(U)
0°C to 70°C
2.5 mV
TLV2432CD
—
—
TLV2432CPW
—
– 40°C to 85°C
950 µV
µ
2.5 mV
TLV2432AID
TLV2432ID
—
—
—
—
TLV2432AIPW
—
—
—
– 40°C to 125°C
950 µV
µ
2.5 mV
TLV2432AQD
TLV2432QD
—
—
—
—
—
—
—
—
– 55°C to 125°C
950 µV
µ
2.5 mV
—
—
TLV2432AMFK
TLV2432MFK
TLV2432AMJG
TLV2432MJG
—
—
TLV2432AMU
TLV2432MU
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2432CDR). The PW package is available only left-end taped
and reeled.
TLV2434 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
SMALL
OUTLINE
(D)
VIOmax AT 25°C
TSSOP
(PW)
0°C to 70°C
2.5 mV
TLV2434CD
TLV2434CPW
– 40°C to 125°C
950 µV
µ
2.5 mV
TLV2434AID
TLV2434ID
TLV2434AIPW
TLV2434IPW
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2434CDR). The
PW package is available only left-end taped and reeled.
TLV2432
D OR JG PACKAGE
(TOP VIEW)
1OUT
1IN –
1IN +
VDD – /GND
1
8
2
7
3
6
4
5
TLV2432
PW PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN +
VDD – / GND
VDD +
2OUT
2IN –
2IN +
1
2
3
4
8
7
6
5
VDD +
2OUT
2IN –
2IN +
NC
1OUT
NC
VDD+
NC
TLV2432
FK PACKAGE
(TOP VIEW)
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2OUT
NC
2IN –
NC
NC
1OUT
1IN –
1IN +
VDD – /GND
1
10
2
9
3
8
4
5
7
6
(TOP VIEW)
NC
VDD +
2OUT
2IN –
2IN +
NC
VDD– /GND
NC
2IN+
NC
NC
1IN –
NC
1IN +
NC
TLV2434
D OR PW PACKAGE
TLV2432
U PACKAGE
(TOP VIEW)
NC – No internal connection
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1OUT
1IN –
1IN+
VDD+
2IN+
2IN –
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN –
4IN+
VDD–/GND
3IN+
3IN –
3OUT
equivalent schematic (each amplifier)
Q22
Q29
Q31
Q34
Q36
VB3
Q26
Q24
Q32
VB2
VB1
VDD+
Q25
Q35
Q33
Q27
VB4
Q23
Transistors
Diodes
Resistors
Capacitors
Q30
Q37
R10
D1
R9
R3
Q3
R4
R7
Q13
IN–
Q1
Q6
Q4
Q8
Q15
Q10
Q18
Q7
R5
Q9
C2
VDD–/GND
C1
VB3
Q11
Q16
R6
OUT
C3
VB2
Q2
Q14
Q5
Q17
Q12
R1
Q21
Q19
R2
R8
VB4
3
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
Q20
IN+
69
5
26
6
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
COMPONENT
COUNT
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD
Input voltage, VI (any input, see Note 1): C and I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current out of VDD – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix (dual) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
I suffix (quad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD – .
2. Differential voltages are at IN+ with respect to IN –. Excessive current flows if input is brought below VDD – – 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D (8)
D (14)
FK
JG
PW (8)
PW (14)
U
725 mW
1022 mW
1375 mW
1050 mW
525 mW
720 mW
675 mW
5.8 mW/°C
7.6 mW/°C
11.0 mW/°C
8.4 mW/°C
4.2 mW/°C
5.6 mW/°C
5.4 mW/°C
464 mW
900 mW
880 mW
672 mW
336 mW
634 mW
432 mW
377 mW
777 mW
715 mW
546 mW
273 mW
547 mW
350 mW
145 mW
450 mW
275 mW
210 mW
105 mW
317 mW
135 mW
recommended operating conditions
C SUFFIX
MIN
Supply voltage, VDD
Input voltage range, VI
2.7
Common-mode input voltage, VIC
VDD –
VDD –
Operating free-air temperature, TA
0
4
MAX
10
VDD + – 0.8
VDD + – 1.3
70
I SUFFIX
MIN
2.7
VDD –
VDD –
– 40
POST OFFICE BOX 655303
MAX
10
VDD + – 0.8
VDD + – 1.3
125
Q SUFFIX
MIN
2.7
VDD –
VDD –
– 40
• DALLAS, TEXAS 75265
MAX
10
VDD + – 0.8
VDD + – 1.3
125
M SUFFIX
MIN
2.7
VDD –
VDD –
– 55
MAX
UNIT
10
V
VDD + – 0.8
VDD + – 1.3
V
125
°C
V
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER
VIO
αVIO
TEST CONDITIONS
VIC = 0
0,
VO = 0,,
VDD ± = ± 1.5 V,
RS = 50 Ω
Input offset voltage
TLV243xAI
IIO
Input offset current
IIB
Input bias current
VDD ± = ± 1.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
AVD
MAX
300
2000
Full range
2500
25°C
300
Full range
|VIO| ≤ 5 mV
mV,
High-level output voltage
µV/°C
25°C
0.003
µV/mo
25°C
0.5
1
Low-level output voltage
Large-signal
g
g
differential voltage
g amplification
Full range
0
to
2.2
25°C
mA
VIC = 1
1.5
5V
V,
IOL = 3
2 5 V,
V
VIC = 2.5
VO = 1 V to 2 V
RL = 2 kه
RL = 1 Mه
0.02
25°C
0.83
Full range
25°C
V
V
1
1.5
2.5
1
V/mV
25°C
750
25°C
1000
GΩ
25°C
1000
GΩ
25°C
8
pF
130
Ω
Differential input resistance
ri(c)
Common-mode input resistance
ci(c)
Common-mode input capacitance
f = 10 kHz
zo
Closed-loop output impedance
f = 100 kHz,
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.5 V,, VO = 1.5 V,,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage
VDD = 2.7 V to 8 V,,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current (per channel)
5V
VO = 1
1.5
V,
No load
V
2.5
25°C
Full range
pA
2.25
ri(d)
AV = 10
–0.25
to
2.75
pA
2.98
25°C
IOL = 100 µA
60
150
0
to
2.5
Full range
60
150
25°C
RS = 50 Ω
IOH = – 3 mA
µV
2
25°C
Common mode input voltage range
Common-mode
950
UNIT
1500
Full range
VIC = 1.5 V,
VOL
25°C
TYP
Full range
IOH = – 100 µA
VOH
TLV243x
MIN
25°C
to 70°C
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
(see Note 4)
VICR
TLV243xC,,
TLV243xI
TA†
25°C
25°C
Full range
83
dB
95
98
dB
125
125
µA
† Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER
TEST CONDITIONS
VO = 1 V tto 2 V
V,
CL = 100 pF‡
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak to peak equivalent input noise voltage
Peak-to-peak
In
Equivalent input noise current
THD + N
Total harmonic distortion plus noise
Gain-bandwidth product
RL = 2 kه,
25°C
0.15
0.25
Full
range
0.1
f = 1 kHz
25°C
22
f = 0.1 Hz to 1 Hz
25°C
2.7
f = 0.1 Hz to 10 Hz
25°C
4
25°C
0.6
VO = 0.5 V to 2.5 V,
f = 1 kHz
kHz,
RL = 2 kه
f = 10 kHz,
CL = 100 pF‡
AV = 1
AV = 1,
CL = 100 pF‡
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 2 kه,
CL = 100 pF‡
0 1%
To 0.1%
ts
‡,
RL = 2 kه
CL = 100 pF‡
UNIT
nV/√Hz
µV
fA√Hz
0.065%
25°C
AV = 10
RL = 2 kه,
MAX
V/µs
120
VO(PP) = 1 V,
RL = 2 kه,
Gain margin
TYP
25°C
Maximum output-swing bandwidth
Phase margin at unity gain
MIN
f = 10 Hz
BOM
φm
TLV243x
TA†
0.5%
25°C
0.5
MHz
25°C
220
kHz
64
6.4
µs
25°C
To 0.01%
0 01%
14 1
14.1
25°C
62°
11
dB
† Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
‡ Referenced to 2.5 V
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25°C
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
TLV243xQ,
TLV243xM
MIN
VIO
αVIO
VIC = 0
0,
VO = 0,,
VDD ± = ± 1.5 V,
RS = 50 Ω
Input offset voltage
TLV243xAQ,,
TLV243xAM
IIO
Input offset current
IIB
Input bias current
VDD ± = ± 1.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
VOL
AVD
MAX
300
2000
Full range
2500
25°C
300
Full range
µV/°C
25°C
0.003
µV/mo
25°C
0.5
1
High-level output voltage
IOH = – 3 mA
Low-level output voltage
Large-signal
g
g
differential voltage
g amplification
0
to
2.5
Full range
0
to
2.2
IOL = 100 µA
VIC = 1
1.5
5V
V,
IOL = 3
2 5 V,
V
VIC = 2.5
VO = 1 V to 2 V
RL = 2 kه
mA
RL = 1 Mه
–0.25
to
2.75
25°C
2.98
25°C
2.5
Full range
VIC = 1.5 V,
60
300
25°C
RS = 50 Ω
60
150
25°C
|VIO| ≤ 5 mV
mV,
µV
2
Full range
Common mode input voltage range
Common-mode
950
2000
Full range
IOH = – 100 µA
VOH
25°C
25°C
to 70°C
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
(see Note 4)
VICR
TLV243xQ,,
TLV243xM
UNIT
TYP
pA
pA
V
V
2.25
25°C
0.02
25°C
0.83
Full range
V
1
25°C
1.5
Full range
0.5
2.5
V/mV
25°C
750
ri(d)
Differential input resistance
25°C
1000
GΩ
ri(c)
Common-mode input resistance
25°C
1000
GΩ
ci(c)
Common-mode input capacitance
f = 10 kHz
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
25°C
130
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.5 V,, VO = 1.5 V,,
RS = 50 Ω
kSVR
Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage
VDD = 2.7 V to 8 V,,
VIC = VDD /2,
No load
IDD
Supply current
VO = 1
1.5
5V
V,
AV = 10
No load
25°C
70
Full range
70
25°C
80
Full range
80
25°C
Full range
83
dB
95
195
dB
250
260
µA
† Full range is – 40°C to 125°C for Q level part, – 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER
TEST CONDITIONS
VO = 1 V tto 2 V
V,
CL = 100 pF‡
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak to peak equivalent input noise voltage
Peak-to-peak
In
Equivalent input noise current
THD + N
Total harmonic distortion plus noise
BOM
ts
φm
RL = 2 kه,
TYP
0.15
0.25
Full
range
0.1
120
25°C
22
f = 0.1 Hz to 1 Hz
25°C
2.7
f = 0.1 Hz to 10 Hz
25°C
4
25°C
0.6
Gain-bandwidth product
f = 10 kHz,
CL = 100 pF‡
RL = 2 kه,
Maximum output-swing bandwidth
VO(PP) = 1 V,
RL = 2 kه,
AV = 1,
CL = 100 pF‡
0 1%
To 0.1%
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 2 kه,
CL = 100 pF‡
‡,
RL = 2 kه
CL = 100 pF‡
POST OFFICE BOX 655303
MAX
nV/√Hz
µV
fA√Hz
0.065%
25°C
AV = 10
0.5%
25°C
0.5
MHz
25°C
220
kHz
64
6.4
µs
25°C
To 0.01%
0 01%
• DALLAS, TEXAS 75265
UNIT
V/µs
25°C
† Full range is – 40°C to 125°C for Q level part, – 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
8
MIN
25°C
f = 1 kHz
AV = 1
Gain margin
TA†
f = 10 Hz
VO = 0.5 V to 2.5 V,
f = 1 kHz
kHz,
RL = 2 kه
Phase margin at unity gain
TLV243xQ,
TLV243xM,
TLV243xAQ,
TLV243xAM
14 1
14.1
25°C
62°
25°C
11
dB
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER
VIO
αVIO
TEST CONDITIONS
VIC = 0
0,
VO = 0,,
VDD ± = ± 2.5 V,
RS = 50 Ω
Input offset voltage
TLV243xA
IIO
Input offset current
IIB
Input bias current
VDD ± = ± 2.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
AVD
MAX
300
2000
Full range
2500
25°C
300
Full range
|VIO| ≤ 5 mV
mV,
High-level output voltage
µV/°C
25°C
0.003
µV/mo
25°C
0.5
Low-level output voltage
1
Large-signal
g
g
differential voltage
g amplification
mA
VIC = 2
2.5
5V
V,
IOL = 5
2 5 V,
V
VIC = 2.5
VO = 1 V to 4 V
RL = 2 kه
RL = 1 Mه
0
to
4.5
Full range
0
to
4.2
25°C
4
Full range
4
pA
V
V
4.35
25°C
0.01
25°C
0.8
Full range
V
1.25
25°C
2.5
Full range
1.5
3.8
V/mV
25°C
950
25°C
1000
GΩ
25°C
1000
GΩ
25°C
8
pF
130
Ω
Differential input resistance
ri(c)
Common-mode input resistance
ci(c)
Common-mode input capacitance
f = 10 kHz
zo
Closed-loop output impedance
f = 100 kHz,
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 4.5 V,, VO = 2.5 V,,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage
VDD = 4.4 V to 8 V,,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current (per channel)
5V
VO = 2
2.5
V,
No load
–0.25
to
4.75
pA
4.97
ri(d)
AV = 10
60
150
25°C
IOL = 100 µA
60
150
25°C
RS = 50 Ω
IOH = – 5 mA
µV
2
25°C
Common mode input voltage range
Common-mode
950
UNIT
1500
Full range
VIC = 2.5 V,
VOL
25°C
TYP
Full range
IOH = – 100 µA
VOH
TLV243x
MIN
25°C
to 70°C
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
(see Note 4)
VICR
TLV243x
TA†
25°C
25°C
Full range
90
dB
95
100
dB
125
125
µA
† Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
TEST CONDITIONS
VO = 1
1.5
5 V to 3
3.5
5V
V,
CL = 100 pF
F‡
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak to peak equivalent input noise voltage
Peak-to-peak
In
Equivalent input noise current
THD + N
ts
φm
25°C
0.15
0.25
Full
range
01
0.1
100
25°C
18
f = 0.1 Hz to 1 Hz
25°C
1.9
f = 0.1 Hz to 10 Hz
25°C
2.8
25°C
0.6
VO(PP) = 2 V,
RL = 2 kه,
AV = 1,
CL = 100 pF‡
To 0.1%
0 1%
Settling time
AV = – 1,
Step = 1.5 V to 3.5 V,,
RL = 2 kه,
CL = 100 pF‡
‡,
RL = 2 kه
CL = 100 pF‡
UNIT
nV/√Hz
µV
fA√Hz
0.045%
25°C
AV = 10
RL =2 kه,
MAX
V/µs
25°C
Maximum output-swing bandwidth
Phase margin at unity gain
TYP
f = 1 kHz
AV = 1
Total harmonic distortion plus noise
MIN
f = 10 Hz
VO = 1.5 V to 3.5 V,
f = 1 kHz
kHz,
RL = 2 kه
f = 10 kHz,
CL = 100 pF‡
Gain-bandwidth product
BOM
RL = 2 kه,
TLV243x
TA†
0.4%
25°C
0.55
MHz
25°C
100
kHz
64
6.4
µs
25°C
To 0.01%
0 01%
13 1
13.1
25°C
66°
Gain margin
25°C
11
dB
† Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
‡ Referenced to 2.5 V
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
TLV243xQ,
TLV243xM
MIN
VIO
αVIO
VIC = 0
0,
VO = 0,,
VDD ± = ± 2.5 V,
RS = 50 Ω
Input offset voltage
TLV2453xA
IIO
Input offset current
IIB
Input bias current
VDD ± = ± 2.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
VOL
AVD
MAX
300
2000
Full range
2500
25°C
300
Full range
µV/°C
25°C
0.003
µV/mo
25°C
0.5
1
High-level output voltage
Low-level output voltage
Large-signal
g
g
differential voltage
g amplification
0
to
4.5
Full range
0
to
4.2
25°C
IOH = – 5 mA
VIC = 2.5 V,
IOL = 100 µA
VIC = 2
2.5
5V
V,
IOL = 5
2 5 V,
V
VIC = 2.5
VO = 1 V to 4 V
RL = 2 kه
mA
RL = 1 Mه
60
300
25°C
RS = 50 Ω
60
150
25°C
|VIO| ≤ 5 mV
mV,
µV
2
Full range
Common mode input voltage range
Common-mode
950
2000
Full range
IOH = – 100 µA
VOH
25°C
25°C
to 70°C
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
(see Note 4)
VICR
TLV2453x
UNIT
TYP
–0.25
to
4.75
pA
pA
V
4.97
25°C
4
Full range
4
V
4.35
25°C
0.01
25°C
0.8
Full range
V
1.25
25°C
2.5
Full range
0.5
3.8
V/mV
25°C
950
ri(d)
Differential input resistance
25°C
1000
GΩ
ri(c)
Common-mode input resistance
25°C
1000
GΩ
ci(c)
Common-mode input capacitance
f = 10 kHz
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
25°C
130
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 4.5 V,, VO = 2.5 V,,
RS = 50 Ω
kSVR
Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage
VDD = 4.4 V to 8 V,,
VIC = VDD /2,
No load
IDD
Supply current
VO = 2
2.5
5V
V,
AV = 10
No load
25°C
70
Full range
70
25°C
80
Full range
80
25°C
Full range
90
dB
95
200
dB
250
270
µA
† Full range is – 40°C to 125°C for Q level part, – 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
TEST CONDITIONS
VO = 1
1.5
5 V to 3
3.5
5V
V,
CL = 100 pF
F‡
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak to peak equivalent input noise voltage
Peak-to-peak
In
Equivalent input noise current
THD + N
Total harmonic distortion plus noise
RL = 2 kه,
0.25
Full
range
01
0.1
25°C
18
f = 0.1 Hz to 1 Hz
25°C
1.9
f = 0.1 Hz to 10 Hz
25°C
2.8
25°C
0.6
RL =2 kه,
BOM
Maximum output-swing bandwidth
VO(PP) = 2 V,
RL = 2 kه,
AV = 1,
CL = 100 pF‡
Settling time
AV = – 1,
Step = 1.5 V to 3.5 V,,
RL = 2 kه,
CL = 100 pF‡
0 1%
To 0.1%
ts
‡,
RL = 2 kه
CL = 100 pF‡
POST OFFICE BOX 655303
nV/√Hz
µV
fA√Hz
0.045%
0.4%
25°C
0.55
MHz
25°C
100
kHz
64
6.4
µs
25°C
To 0.01%
0 01%
• DALLAS, TEXAS 75265
MAX
25°C
AV = 10
† Full range is – 40°C to 125°C for Q level part, – 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
UNIT
V/µs
f = 1 kHz
f = 10 kHz,
CL = 100 pF‡
12
TYP
0.15
100
Gain-bandwidth product
Gain margin
MIN
25°C
25°C
AV = 1
Phase margin at unity gain
TA†
f = 10 Hz
VO = 1.5 V to 3.5 V,
f = 1 kHz
kHz,
RL = 2 kه
φm
TLV243xQ,
TLV243xM,
TLV243xAQ,
TLV243xAM
13 1
13.1
25°C
66°
25°C
11
dB
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
Distribution
vs Common-mode input voltage
2,3
,
4,5
αVIO
IIB/IIO
Temperature coefficient
Distribution
6,7
Input bias and input offset currents
vs Free-air temperature
VOH
VOL
High-level output voltage
vs High-level output current
9,11
Low-level output voltage
vs Low-level output current
10,12
VO(PP)
Maximum peak-to-peak output voltage
vs Frequency
13
IOS
Short circuit output current
Short-circuit
vs Supplyy voltage
g
vs Free-air temperature
14
15
VID
Differential input voltage
vs Output voltage
16,17
Differential gain
vs Load resistance
18
AVD
AVD
Large-signal differential voltage amplification
vs Frequency
19,20
Differential voltage amplification
vs Free-air temperature
21,22
zo
Output impedance
vs Frequency
23,24
CMRR
Common mode rejection ratio
Common-mode
vs Frequency
q
y
vs Free-air temperature
25
26
kSVR
Supply voltage rejection ratio
Supply-voltage
vs Frequency
q
y
vs Free-air temperature
27,28
,
29
IDD
Supply current
vs Supply voltage
30
SR
Slew rate
vs Load capacitance
vs Free-air temperature
31
32
VO
VO
Inverting large-signal pulse response
33,34
Voltage-follower large-signal pulse response
35,36
VO
VO
Inverting small-signal pulse response
37,38
Vn
Equivalent input noise voltage
vs Frequency
Noise voltage (referred to input)
Over a 10-second period
Total harmonic distortion plus noise
vs Frequency
Gain bandwidth product
Gain-bandwidth
vs Free-air temperature
vs Supply voltage
Phase margin
vs Frequency
q
y
vs Load capacitance
19,20
,
48
Gain margin
vs Load capacitance
49
Unity-gain bandwidth
vs Load capacitance
50
THD + N
φm
B1
Voltage-follower small-signal pulse response
POST OFFICE BOX 655303
8
39,40
• DALLAS, TEXAS 75265
41, 42
43
44,45
46
47
13
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2432
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2432
INPUT OFFSET VOLTAGE
35
35
408 Amplifiers From 1 Wafer Lot
VDD± = ± 1.5 V
TA = 25°C
30
Percentage of Amplifiers – %
Precentage of Amplifiers – %
30
25
20
15
10
5
408 Amplifiers From 1 Wafer Lot
VDD± = ± 2.5 V
TA = 25°C
25
20
15
10
5
0
–1600
–800
0
800
0
–1600
1600
VIO – Input Offset Voltage – µV
–800
0
800
VIO – Input Offset Voltage – µV
Figure 2
Figure 3
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
2
2
VDD =3 V
TA = 25°C
1.5
VVIO
IO – Input Offset Voltage – mV
VVIO
IO – Input Offset Voltage – mV
1.5
1
0.5
0
–0.5
ÁÁÁ
ÁÁÁ
ÁÁÁ
–2
–0.5
VDD = 5 V
TA = 25°C
1
0.5
0
ÁÁ
ÁÁ
ÁÁ
–1
–1.5
–0.5
–1
–1.5
2
2.5
0
0.5
1
1.5
VIC – Common-Mode Input Voltage – V
3
–2
–0.5 0
0.5
1
1.5
2
Figure 5
POST OFFICE BOX 655303
2.5
3
3.5
4
4.5
VIC – Common-Mode Input Voltage – V
Figure 4
14
1600
• DALLAS, TEXAS 75265
5
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2432 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLV2432 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
32 Amplifiers From 1 Wafer Lot
VDD = ± 1.5 V
TA = 25°C to 125°C
20
32 Amplifiers From 1 Wafer Lot
VDD = ± 2.5 V
TA = 25°C to 125°C
20
Percentage of Amplifiers – %
Percentage of Amplifiers – %
25
15
10
5
0
15
10
5
0
–4
2
3
–3
–2
–1
0
1
αVIO – Temperature Coefficient – µV / °C
4
2
3
–3
–2
–1
0
1
αVIO – Temperature Coefficient – µV / °C
–4
Figure 7
ÁÁ
ÁÁ
INPUT BIAS AND INPUT OFFSET CURRENTS
vs
FREE-AIR TEMPERATURE
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
35
3
VDD± = ± 2.5 V
VIC = 0 V
VO = 0
RS = 50 Ω
VDD = 3 V
25
IIB
20
15
IIO
10
ÁÁ
ÁÁ
5
0
25
V
VOH
OH – High-Level Output Voltage – V
IIO – Input Bias and Input Offset Currents – pA
IIIB
IB and IIO
Figure 6
30
4
45
65
85
105
TA – Free-Air Temperature – °C
125
2.5
TA = –40°C
2
TA = 25°C
TA = 125°C
1.5
1
TA = 0°C
0.5
0
0
Figure 8
3
6
9
12
IOH – High-Level Output Current – mA
15
Figure 9
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
1.4
5
ÁÁ
ÁÁ
ÁÁ
1.2
TA = 125°C
TA = 85°C
1
0.8
0.6
TA = 25°C
0.4
0.2
0
1
2
4
3
TA = 125°C
4
3
TA = 85°C
2
TA = 25°C
ÁÁ
ÁÁ
TA = –40°C
0
VDD = 5 V
V
VOH
OH – High-Level Output Voltage – V
V
VOL
OL – Low-Level Output Voltage – V
VDD = 3 V
5
TA =–40°C
1
0
0
4
8
12
16
IOH – High-Level Output Current – A
m
IOL – Low-Level Output Current – mA
Figure 10
Figure 11
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VO(PP)
VO(PP) – Maximum Peak-to-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
1.2
VOL
VOL – Low-Level Output Voltage – V
VDD = 5 V
1
TA = 125°C
0.8
TA = 85°C
0.6
ÁÁÁ
ÁÁÁ
ÁÁÁ
0.4
TA = 25°C
TA = –40°C
0.2
0
0
4
2
3
IOL – Low-Level Output Current – mA
1
5
ÁÁ
ÁÁ
ÁÁ
5
RL = 2 kΩ
TA = 25°C
VDD = 5 V
4
3
VDD = 3 V
2
1
0
102
Figure 12
16
20
103
104
105
f – Frequency – Hz
Figure 13
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
106
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
20
VO = VDD/2
VIC = VDD/2
TA = 25°C
15
IIOS
OS – Short-Circuit Output Current – mA
I OS – Short-Circuit Output Current – mA
IOS
20
10
5
0
–5
–10
–15
–20
2
3
4
5
6
7
8
9
VID = –100 mV
10
5
0
–5
–10
VID = 100 mV
–15
–20
–75
10
–50
VDD – Supply Voltage – V
–25
0
25
50
75
100
125
TA – Free-Air Temperature – °C
Figure 14
Figure 15
DIFFERENTIAL INPUT VOLTAGE
vs
OUTPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
vs
OUTPUT VOLTAGE
1000
1000
VDD = 3 V
RL = 2 kΩ
VIC = 1.5 V
TA = 25°C
750
500
V ID – Differential Input Voltage – µ V
V ID – Differential Input Voltage – µ V
VDD = 5 V
VIC = 2.5 V
VO = 2.5 V
15
250
0
–250
–500
–750
–1000
0
0.5
1
1.5
2
VO – Output Voltage – V
2.5
3
VDD = 5 V
VIC = 2.5 V
RL = 2 kΩ
TA = 25°C
750
500
250
0
–250
–500
–750
–1000
0
Figure 16
1
2
3
VO – Output Voltage – V
4
5
Figure 17
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DIFFERENTIAL GAIN
vs
LOAD RESISTANCE
103
Differential Gain – V/ mV
VO(PP) = 2 V
TA = 25°C
VDD = 5 V
VDD = 3 V
102
101
1
101
102
RL – Load Resistance – kΩ
1
103
Figure 18
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
60
ÁÁ
ÁÁ
180°
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
TA = 25°C
135°
40
90°
20
45°
0
0°
–20
–40
104
–45°
105
106
f – Frequency – Hz
Figure 19
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
–90°
107
φom
m – Phase Margin
AVD
AVD – Large-Signal Differential
Voltage Amplification – dB
80
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
135°
40
90°
20
45°
0
0°
–20
φom
m – Phase Margin
60
AVD
AVD – Large-Signal Differential
Voltage Amplification – dB
ÁÁ
ÁÁ
ÁÁ
180°
VDD = 3 V
RL = 2 kΩ
CL = 100 pF
TA = 25°C
–45°
–40
104
105
–90°
107
106
f – Frequency – Hz
Figure 20
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1000
A VD – Differential Voltage Amplification – V/mV
A VD – Differential Voltage Amplification – V/mV
10000
RL = 1 MΩ
1000
100
RL = 2 kΩ
10
1
0.1
– 75
VDD = 5 V
VIC = 2.5 V
VO = 1 V to 4 V
– 50
– 25
0
25
50
75
100
125
VDD = 3 V
VIC = 2.5 V
VO = 0.5 V to 2.5 V
100
RL = 1 MΩ
10
1
RL = 2 kΩ
0.1
– 75
– 50
TA – Free-Air Temperature – °C
Figure 21
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
Figure 22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
VDD = 3 V
TA = 25°C
VDD = 5 V
TA = 25°C
z o – Output Impedance – 0
zo
Ω
z o – Output Impedance – 0
zo
Ω
1000
OUTPUT IMPEDANCE
vs
FREQUENCY
AV = 100
100
AV = 10
10
AV = 100
100
AV = 10
10
AV = 1
1
102
AV = 1
103
104
f – Frequency – Hz
1
102
105
103
104
f – Frequency – Hz
Figure 23
Figure 24
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
60
100
TA = 25°C
VDD = 5 V
VIC = 2.5 V
CMRR – Common-Mode Rejection Ratio – dB
CMRR – Common-Mode Rejection Ratio – dB
100
80
VDD = 3 V
VIC = 1.5 V
40
20
0
102
103
104
105
f – Frequency – Hz
106
VDD = 5 V
98
96
VDD = 3 V
94
92
90
– 75
– 50
– 25
0
25
Figure 26
POST OFFICE BOX 655303
50
75
100
TA – Free-Air Temperature – °C
Figure 25
20
105
• DALLAS, TEXAS 75265
125
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
120
VDD = 3 V
TA = 25°C
KSVR
k SVR – Supply-Voltage Rejection Ratio – dB
KSVR
k SVR – Supply-Voltage Rejection Ratio – dB
120
100
80
60
40
ÁÁ
ÁÁ
ÁÁ
20
0
101
102
103
104
105
106
VDD = 5 V
TA = 25°C
100
80
60
40
ÁÁ
ÁÁ
ÁÁ
20
0
101
102
103
f – Frequency – Hz
Figure 27
105
106
Figure 28
SUPPLY VOLTAGE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
100
300
VO = VDD/2
No Load
96
92
VDD = 2.7 V to 8 V
VO = VDD/2
TA = – 40°C
200
TA = 85°C
150
ÁÁ
ÁÁ
ÁÁ
94
90
– 75
TA = 25°C
250
98
IIDD
DD – Supply Current – µ A
kSVR
k SVR – Supply-Voltage Rejection Ratio – dB
104
f – Frequency – Hz
100
50
0
– 50
– 25
0
25
50
75
100
125
0
TA – Free-Air Temperature – °C
2
4
6
8
10
VDD – Supply Voltage – V
Figure 29
Figure 30
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SLEW RATE
vs
LOAD CAPACITANCE
SLEW RATE
vs
FREE-AIR TEMPERATURE
0.6
0.35
VDD = 3 V
AV = – 1
TA = 25°C
SR –
0.5
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
AV = 1
SR – Slew Rate – V/ µ s
SR – Slew Rate – V/
v/us
µs
0.3
SR +
0.4
0.3
0.2
0.25
0.2
0.15
0.1
0
101
102
103
104
CL – Load Capacitance – pF
105
0.1
– 75
– 50
– 25
Figure 31
50
75
100
125
INVERTING LARGE-SIGNAL PULSE
RESPONSE
3
5
VO
VO – Output Voltage – V
VDD = 3 V
RL = 2 kΩ
CL = 100 pF
AV = – 1
TA = 25°C
2.5
VO
VO – Output Voltage – V
25
Figure 32
INVERTING LARGE-SIGNAL PULSE
RESPONSE
2
1.5
1
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
4 A = –1
V
TA = 25°C
3
2
1
0.5
0
0
10
20
30
t – Time – µs
40
50
0
0
10
20
30
t – Time – µs
Figure 34
Figure 33
22
0
TA – Free-Air Temperature – °C
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
40
50
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
5
VDD = 3 V
RL = 2 kΩ
CL = 100 pF
2.5
AV = 1
TA = 25°C
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
AV = 1
TA = 25°C
4
VO
VO – Output Voltage – V
VO
VO – Output Voltage – V
3
2
1.5
1
3
2
1
0.5
0
0
10
20
30
t – Time – µs
40
0
50
0
5
10
INVERTING SMALL-SIGNAL PULSE
RESPONSE
45
50
4.5
5
2.58
VDD = 3 V
RL = 2 kΩ
CL = 100 pF
AV = –1
TA = 25°C
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
AV = – 1
TA = 25°C
2.56
VO
VO – Output Voltage – V
V
VO
O – Output Voltage – V
40
INVERTING SMALL-SIGNAL
PULSE RESPONSE
1.58
1.54
20 25 30 35
t – Time – µs
Figure 36
Figure 35
1.56
15
1.52
1.5
1.48
1.46
2.54
2.52
2.5
2.48
2.46
1.44
0
0.5
1
1.5
2 2.5 3
t – Time – µs
3.5
4
4.5
5
2.44
0
0.5
1
1.5
2 2.5 3 3.5
t – Time – µs
4
Figure 38
Figure 37
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
23
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
1.58
1.54
VDD = 5 V
RL = 2 kΩ
CL = 100 pF
AV = 1
TA = 25°C
2.56
VO
VO – Output Voltage – V
1.56
VO
VO – Output Voltage – V
2.58
VDD = 3 V
RL = 2 kΩ
CL = 100 pF
AV = 1
TA = 25°C
1.52
1.5
1.48
1.46
2.54
2.52
2.5
2.48
2.46
1.44
2.44
0
0.5
1
1.5
2 2.5 3
t – Time – µs
3.5
4
4.5
5
0
0.5
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
4
4.5
5
120
VDD = 3 V
RS = 20 Ω
TA = 25°C
100
V n – Equivalent Input Noise Voltage – nV/
VN
nv//HzHz
V n – Equivalent Input Noise Voltage – nV/
VN
nv//HzHz
2 2.5 3 3.5
t – Time – µs
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
120
80
60
40
20
102
103
f – Frequency – Hz
104
VDD = 5 V
RS = 20 Ω
TA = 25°C
100
80
60
40
20
0
101
Figure 41
24
1.5
Figure 40
Figure 39
0
101
1
102
103
f – Frequency – Hz
Figure 42
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
104
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
NOISE VOLTAGE OVER A 10-SECOND PERIOD
2000
1500
Noise Voltage – nV
1000
500
0
–500
–1000
VDD = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
–1500
–2000
0
1
2
3
4
5
6
t – Time – s
7
8
9
10
Figure 43
10
RL = 2 kΩ Tied to 2.5 V
RL = 2 kΩ Tied to 0 V
AV = 10
1
VDD = 5 V
TA = 25°C
AV = 1
0.1
AV = 10
0.01
101
AV = 1
102
103
f – Frequency – Hz
104
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
THD + N – Total Harmonic Distortion Plus Noise – %
THD + N – Total Harmonic Distortion Plus Noise – %
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
105
10
RL = 2 kΩ Tied to 1.5 V
RL = 2 kΩ Tied to 0 V
AV = 10
1
VDD = 3 V
TA = 25°C
AV = 1
0.1
AV = 10
0.01
101
Figure 44
AV = 1
102
103
f – Frequency – Hz
104
105
Figure 45
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
800
Gain-Bandwidth Product – kHz
700
Gain-Bandwidth Product – kHz
750
RL = 2 kΩ
CL = 100 pF
f = 10 kHz
600
500
400
300
200
f = 10 kHz
RL = 2 kΩ
CL = 100 pF
TA = 25°C
700
650
600
550
100
0
–50
–25
75
100
0
25
50
TA – Free-Air Temperature – °C
500
125
0
1
2
Figure 46
60°
Rnull = 500 Ω
5
Gain Margin – dB
φom
m – Phase Margin
Rnull = 200 Ω
Rnull = 200 Ω
Rnull = 0
Rnull = 100 Ω
10
5
Rnull = 0
15°
TA = 25°C
RL = 2 kΩ
Rnull = 100 Ω
102
103
104
CL – Load Capacitance – pF
105
0
101
Figure 48
26
8
Rnull = 500 Ω
Rnull = 1 kΩ
30°
0°
101
7
Rnull = 1000 Ω
15
45°
6
GAIN MARGIN
vs
LOAD CAPACITANCE
20
TA = 25°C
RL = 2 kΩ
4
Figure 47
PHASE MARGIN
vs
LOAD CAPACITANCE
75°
3
VDD – Supply Voltage – V
102
103
104
CL – Load Capacitance – pF
Figure 49
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
105
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH
vs
LOAD CAPACITANCE
600
B1 – Unity-Gain Bandwidth – kHz
TA = 25°C
RL = 2 kΩ
500
400
300
ÁÁ
ÁÁ
200
100
0
101
102
103
104
CL – Load Capacitance – pF
105
Figure 50
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 51 are generated using
the TLV243x typical electrical and operating characteristics at TA = 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
D
D
D
D
D
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
3
VCC +
9
RSS
+
10
J1
DP
VC
J2
IN +
11
RD1
VAD
DC
12
C1
R2
–
53
HLIM
–
C2
6
–
–
+
+
GCM
GA
–
RD2
–
RO1
DE
5
+
VE
.SUBCKT TLV2432 1 2 3 4 5
C1
11
12
3.560E–12
C2
6
7
15.00E–12
DC
5
53
DX
DE
54
5
DX
DLP
90
91
DX
DLN
92
90
DX
DP
4
3
DX
EGND
99
0
POLY (2) (3,0) (4,0) 0 .5 .5
FB
7
99
POLY (5) VB VC VE VLP
+ VLN 0 21.04E6 –30E6 30E6 30E6 –30E6
GA
6
0
11
12 47.12E–6
GCM
0
6
10
99 4.9E–9
ISS
3
10
DC 8.250E–6
HLIM
90
0
VLIM 1K
J1
11
2
10 JX
J2
12
1
10 JX
R2
6
9
100.0E3
OUT
RD1
60
11
21.22E3
RD2
60
12
21.22E3
R01
8
5
120
R02
7
99
120
RP
3
4
26.04E3
RSS
10
99
24.24E6
VAD
60
4
–.6
VB
9
0
DC 0
VC
3
53
DC .65
VE
54
4
DC .65
VLIM
7
8
DC 0
VLP
91
0
DC 1.4
VLN
0
92
DC 9.4
.MODEL DX D (IS=800.0E–18)
.MODEL JX PJF (IS=500.0E–15 BETA=281E–6
+ VTO= –.065)
.ENDS
Figure 51. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
28
–
VLIM
8
54
4
91
+
VLP
7
60
+
–
+ DLP
90
RO2
VB
IN –
VCC –
92
FB
–
+
ISS
RP
2
1
DLN
EGND +
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VLN
PACKAGE OPTION ADDENDUM
www.ti.com
28-Nov-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9751001Q2A
NRND
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629751001Q2A
TLV2432
MFKB
5962-9751001QHA
NRND
CFP
U
10
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751001QHA
TLV2432M
5962-9751001QPA
NRND
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751001QPA
TLV2432M
5962-9751002Q2A
NRND
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629751002Q2A
TLV2432
AMFKB
5962-9751002QHA
NRND
CFP
U
10
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751002QHA
TLV2432AM
5962-9751002QPA
NRND
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751002QPA
TLV2432AM
TLV2432AID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AIDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AIPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TV2432
TLV2432AIPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TV2432
TLV2432AIPWLE
OBSOLETE
TSSOP
PW
8
TBD
Call TI
Call TI
-40 to 85
TLV2432AIPWR
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AIPWRG4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432AI
TLV2432AMFKB
NRND
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629751002Q2A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
28-Nov-2015
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TLV2432
AMFKB
TLV2432AMJGB
NRND
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751002QPA
TLV2432AM
TLV2432AMUB
NRND
CFP
U
10
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751002QHA
TLV2432AM
TLV2432AQD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
V2432A
TLV2432AQDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
V2432A
TLV2432AQDR
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
-40 to 125
TLV2432AQDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
TLV2432CD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
TLV2432CDG4
ACTIVE
SOIC
D
8
TBD
Call TI
Call TI
0 to 70
TLV2432CDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2432C
TLV2432CDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2432C
TLV2432ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432I
TLV2432IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432I
TLV2432IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432I
TLV2432IDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2432I
TLV2432MFKB
NRND
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629751001Q2A
TLV2432
MFKB
TLV2432MJGB
NRND
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751001QPA
TLV2432M
TLV2432MUB
NRND
CFP
U
10
1
TBD
A42
N / A for Pkg Type
-55 to 125
9751001QHA
TLV2432M
Addendum-Page 2
V2432A
2432C
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
28-Nov-2015
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TLV2432QD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
V2432Q
TLV2432QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
V2432Q
TLV2432QDR
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
-40 to 125
TLV2434AID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434AI
TLV2434AIDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434AI
TLV2434AIDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434AI
TLV2434AIPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434AI
TLV2434CD
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2434C
TLV2434CDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2434C
TLV2434CPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2434C
TLV2434CPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
2434C
TLV2434ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
TLV2434IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
2434I
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
28-Nov-2015
Status
(1)
TLV2434IPWRG4
ACTIVE
Package Type Package Pins Package
Drawing
Qty
TSSOP
PW
14
2000
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Op Temp (°C)
Device Marking
(4/5)
-40 to 85
2434I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2432, TLV2432A, TLV2432AM, TLV2432M, TLV2434A :
Addendum-Page 4
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
28-Nov-2015
• Catalog: TLV2432A, TLV2432
• Automotive: TLV2432-Q1, TLV2432A-Q1, TLV2432A-Q1, TLV2432-Q1, TLV2434A-Q1
• Military: TLV2432M, TLV2432AM
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Military - QML certified for Military and Defense Applications
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TLV2432AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV2432AIPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
TLV2432CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV2432IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV2434AIDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLV2434AIPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
TLV2434CDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLV2434CPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
TLV2434IDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLV2434IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jul-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV2432AIDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2432AIPWR
TSSOP
PW
8
2000
367.0
367.0
35.0
TLV2432CDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2432IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2434AIDR
SOIC
D
14
2500
367.0
367.0
38.0
TLV2434AIPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
TLV2434CDR
SOIC
D
14
2500
367.0
367.0
38.0
TLV2434CPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
TLV2434IDR
SOIC
D
14
2500
367.0
367.0
38.0
TLV2434IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
SCALE 2.800
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
B
4.5
4.3
NOTE 4
SEE DETAIL A
8X
0.30
0.19
0.1
C A
1.2 MAX
B
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
1
8
(R0.05)
TYP
SYMM
6X (0.65)
5
4
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
(R0.05) TYP
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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