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SN74AVCH8T245
SCES565H – APRIL 2004 – REVISED MARCH 2016
SN74AVCH8T245 8-Bit Dual-Supply Bus Transceiver
With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs
1 Features
3 Description
•
The SN74AVCH8T245 is an 8-bit noninverting bus
transceiver that uses two separate configurable
power-supply rails. The A port is designed to track
VCCA, which accepts any supply voltage from 1.2 V to
3.6 V. The B port is designed to track VCCB, which
also accepts any supply voltage from 1.2 V to 3.6 V.
This allows for universal low-voltage bidirectional
translation between any of the 1.2-V, 1.5-V, 1.8-V,
2.5-V, and 3.3-V voltage nodes.
1
•
•
•
•
•
•
•
•
Control Inputs (DIR and OE) VIH and VIL Levels
Are Referenced to VCCA Voltage
Bus Hold on Data Inputs Eliminates the Need for
External Pullup or Pulldown Resistors
VCC Isolation Feature
Fully Configurable Dual-Rail Design
I/Os Are 4.6-V Tolerant
Ioff Supports Partial-Power-Down Mode Operation
Max Data Rates:
– 320 Mbps (VCCA ≥ 1.8 V and VCCB ≥ 1.8 V)
– 170 Mbps (VCCA ≤ 1.8 V or VCCB ≤ 1.8 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 8000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
The SN74AVCH8T245 is designed for asynchronous
communication between data buses. The device
transmits data from either the A bus to the B bus, or
from the B bus to the A bus, depending on the logic
level at the direction-control (DIR) input. The outputenable (OE) input can be used to disable the outputs
so the buses are effectively isolated.
Device Information(1)
PART NUMBER
SN74AVCH8T245
2 Applications
•
•
•
•
PACKAGE
BODY SIZE (NOM)
TVSOP (24)
5.00 mm × 4.40 mm
TSSOP (24)
7.80 mm × 4.40 mm
VQFN (24)
5.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Personal Electronics
Industrial
Enterprise
Telecommunications
Logic Diagram (Positive Logic)
2
DIR
22
OE
3
A1
21
B1
To Seven Other Channels
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AVCH8T245
SCES565H – APRIL 2004 – REVISED MARCH 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (continued).........................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
1
1
1
2
3
4
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions....................... 6
Thermal Information .................................................. 6
Electrical Characteristics........................................... 7
Switching Characteristics, VCCA = 1.2 V ................... 9
Switching Characteristics, VCCA= 1.5 V ± 0.1 V...... 10
Switching Characteristics, VCCA= 1.8 V ± 0.15 V.... 11
Switching Characteristics, VCCA= 2.5 V ± 0.2 V...... 12
Switching Characteristics, VCCA= 3.3 V ± 0.3 V.... 13
Operating Characteristics...................................... 14
Typical Characteristics .......................................... 15
Parameter Measurement Information ................ 17
9
Detailed Description ............................................ 18
9.1
9.2
9.3
9.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
18
18
18
19
10 Application and Implementation........................ 20
10.1 Application Information.......................................... 20
10.2 Typical Application ................................................ 20
11 Power Supply Recommendations ..................... 21
12 Layout................................................................... 22
12.1 Layout Guidelines ................................................. 22
12.2 Layout Example .................................................... 22
13 Device and Documentation Support ................. 23
13.1
13.2
13.3
13.4
13.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
14 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (March 2007) to Revision H
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Deleted the Ordering Information table. See the POA at the end of the data sheet. ............................................................ 1
2
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5 Description (continued)
The SN74AVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device.
The VCC isolation feature ensures that if either VCCA or VCCB is at GND, then the outputs are in the highimpedance state. The bus-hold circuitry on the powered-up side always stays active.
The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a '245
function, with minimal printed circuit board redesign.
To ensure the high-impedance state during power up or power down, OE shall be tied to VCCA through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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SCES565H – APRIL 2004 – REVISED MARCH 2016
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6 Pin Configuration and Functions
DGV or PW Package
24-Pin TVSOP or TSSOP
Top View
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCCB
VCCB
OE
B1
B2
B3
B4
B5
B6
B7
B8
GND
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCCB
23
1
24
23 VCCB
22 OE
2
3
21 B1
20 B2
4
5
19 B3
18 B4
6
7
17 B5
16 B6
8
9
15 B7
14 B8
10
11
12
13
GND
24
2
VCCA
1
GND
VCCA
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
GND
RHL Package
24-Pin VQFN
Top View
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
A1
3
I/O
Input/output A1. Referenced to VCCA.
A2
4
I/O
Input/output A2. Referenced to VCCA.
A3
5
I/O
Input/output A3. Referenced to VCCA.
A4
6
I/O
Input/output A4. Referenced to VCCA.
A5
7
I/O
Input/output A5. Referenced to VCCA.
A6
8
I/O
Input/output A6. Referenced to VCCA.
A7
9
I/O
Input/output A7. Referenced to VCCA.
A8
10
I/O
Input/output A8. Referenced to VCCA.
B1
21
I/O
Input/output B1. Referenced to VCCB.
B2
20
I/O
Input/output B2. Referenced to VCCB.
B3
19
I/O
Input/output B3. Referenced to VCCB.
B4
18
I/O
Input/output B4. Referenced to VCCB.
B5
17
I/O
Input/output B5. Referenced to VCCB.
B6
16
I/O
Input/output B6. Referenced to VCCB.
B7
15
I/O
Input/output B7. Referenced to VCCB.
B8
14
I/O
Input/output B8. Referenced to VCCB.
DIR
2
I
GND
Direction-control signal. Referenced to VCCA.
11, 12, 13
—
OE
22
I
VCCA
1
—
A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V
VCCB
23, 24
—
B-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V
4
Ground
3-state output-mode enables. Pull OE high to place all outputs in 3-state mode. Referenced to VCCA.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCCA
VCCB
MAX
UNIT
–0.5
4.6
V
I/O ports (A port)
–0.5
4.6
I/O ports (B port)
–0.5
4.6
Control inputs
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
Supply voltage
Input voltage (2)
VI
MIN
V
VO
Voltage applied to any output
in the high-impedance or power-off state (2)
VO
Voltage applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCCA, VCCB, or GND
±100
mA
V
V
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±8000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
Machine model (MM)
±200
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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7.3 Recommended Operating Conditions
(1) (2)
See
MIN
MAX
UNIT
VCCA
Supply voltage
1.2
3.6
V
VCCB
Supply voltage
1.2
3.6
V
High-level input voltage (1)
VIH
Data inputs
VCCI = 1.2 V to 1.95 V
VCCI × 0.65
VCCI = 1.95 V to 2.7 V
1.6
VCCI = 2.7 V to 3.6 V
Low-level input voltage (1)
VIL
Data inputs
V
2
VCCI = 1.2 V to 1.95 V
VCCI × 0.35
VCCI = 1.95 V to 2.7 V
0.7
VCCI = 2.7 V to 3.6 V
VIH
High-level input voltage
DIR and OE
(referenced to VCCA)
0.8
VCCI = 1.2 V to 1.95 V
VCCA × 0.65
VCCI = 1.95 V to 2.7 V
1.6
VCCI = 2.7 V to 3.6 V
VIL
Low-level input voltage
VI
Input voltage
Output voltage (2)
VO
IOH
DIR and OE
(referenced to VCCA)
V
2
VCCI = 1.2 V to 1.95 V
VCCA × 0.35
VCCI = 1.95 V to 2.7 V
0.7
VCCI = 2.7 V to 3.6 V
0.8
Control Inputs
0
3.6
Active state
0
VCCO
3-state
0
3.6
High-level output current
VCCO = 1.2 V
–3
VCCO = 1.4 V to 1.6 V
–6
VCCO = 1.65 V to 1.95 V
–8
VCCO = 2.3 V to 2.7 V
Low-level output current
Input transition rise or fall rate
TA
Operating free-air temperature
(1)
(2)
V
V
mA
–12
VCCO = 1.2 V
3
VCCO = 1.4 V to 1.6 V
6
VCCO = 1.65 V to 1.95 V
8
VCCO = 2.3 V to 2.7 V
9
VCCO = 3 V to 3.6 V
Δt/Δv
V
–9
VCCO = 3 V to 3.6 V
IOL
V
mA
12
–40
5
ns/V
85
°C
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
7.4 Thermal Information
SN74AVCH8T245
THERMAL METRIC
(1)
DGV (TVSOP)
PW (TSSOP)
RHL (VQFN)
24 PINS
24 PINS
24 PINS
UNIT
95.5
92
35
°C/W
RθJA
Junction-to-ambient thermal resistance (2)
RθJC(top)
Junction-to-case (top) thermal resistance
27
29.3
39.9
°C/W
RθJB
Junction-to-board thermal resistance
48.9
46.7
13.8
°C/W
ψJT
Junction-to-top characterization parameter
0.7
1.5
0.3
°C/W
ψJB
Junction-to-board characterization parameter
48.5
46.2
13.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
1.4
°C/W
(1)
(2)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
The package thermal impedance is calculated in accordance with JESD 51-7.
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7.5 Electrical Characteristics
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted)
PARAMETER
High-level output
voltage (1)
VOH
Low-level output
voltage
VOL
II
Control inputs
Bus-hold low
sustaining
current (2)
IBHL
Bus-hold high
sustaining
current (3)
IBHH
TEST CONDITIONS
MIN
Bus-hold low
overdrive
current (4)
IOH = –3 mA, VI= VIH
VCCA = VCCB = 1.2 V
IOH = –6 mA, VI= VIH
VCCA = VCCB = 1.4 V
1.05
IOH = –8 mA, VI= VIH
VCCA = VCCB = 1.65 V
1.2
IOH = –9 mA, VI= VIH
VCCA = VCCB = 2.3 V
1.75
IOH = –12 mA, VI= VIH
VCCA = VCCB = 3 V
IOL = 100 µA, VI= VIL
VCCA = VCCB = 1.2 V to 3.6 V
IOL = 3 mA, VI= VIL
VCCA = VCCB = 1.2 V
IOL = 6 mA, VI= VIL
VCCA = VCCB = 1.4 V
0.35
IOL = 8 mA, VI= VIL
VCCA = VCCB = 1.65 V
0.45
IOL = 9 mA, VI= VIL
VCCA = VCCB = 2.3 V
0.55
IOL = 12 mA, VI= VIL
VCCA = VCCB = 3 V
VI = VCCA or GND
VCCA = VCCB = 1.2 V to 3.6 V
VI = 0.42 V
VCCA = VCCB = 1.2 V
VI = 0.49 V
VCCA = VCCB = 1.4 V
15
VI = 0.58 V
VCCA = VCCB = 1.65 V
25
VI = 0.7 V
VCCA = VCCB = 2.3 V
45
VI = 0.8 V
VCCA = VCCB = 3.3 V
100
VI = 0.78 V
VCCA = VCCB = 1.2 V
VI = 0.91 V
VCCA = VCCB = 1.4 V
–15
VI = 1.07 V
VCCA = VCCB = 1.65 V
–25
VI = 1.6 V
VCCA = VCCB = 2.3 V
–45
VI = 2 V
VCCA = VCCB = 3.3 V
–100
VI = 0 to VCC
Ioff
(1)
(2)
(3)
(4)
(5)
Bus-hold high
overdrive
current (5)
Input/output
power-off leakge
current
VI = 0 to VCC
VI = 0 V to 3.6 V,
VO= 0 V to 3.6 V
UNIT
VCCO – 0.2
0.95
V
2.3
0.2
0.15
V
0.7
±0.025
±1
μA
25
μA
–25
μA
50
VCCA = VCCB = 1.6 V
125
VCCA = VCCB = 1.95 V
200
VCCA = VCCB = 2.7 V
300
VCCA = VCCB = 3.6 V
500
VCCA = VCCB = 1.2 V
IBHHO
MAX
VCCA = VCCB = 1.2 V to 3.6 V
VCCA = VCCB = 1.2 V
IBHLO
TYP
IOH = –100 μA, VI= VIH
μA
–50
VCCA = VCCB = 1.6 V
–125
VCCA = VCCB = 1.95 V
–200
VCCA = VCCB = 2.7 V
–300
VCCA = VCCB = 3.6 V
–500
μA
VCCA = 0 V,
VCCB = 0 V to 3.6 V
A Port
±0.1
±5
VCCA = 0 V to 3.6 V,
VCCB = 0 V
B Port
±0.1
±5
μA
VCCO is the VCC associated with the output port.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
An external driver must sink at least IBHHO to switch this node from high to low.
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Electrical Characteristics (continued)
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
VO = VCCO or GND,
VI = VCCI or GND, OE = VIH
Off-state output
current (1) (6) (7)
IOZ
VO = VCCO or GND,
VI = VCCI or GND,
OE = Don't Care
MIN
TYP
MAX
±0.5
±5
VCCA = VCCB = 3.6 V
A Port,
B Port
VCCA = 0 V,
VCCB = 3.6 V
B Port
±5
VCCA = 3.6 V,
VCCB = 0 V
A Port
±5
VCCA = VCCB = 1.2 V to 3.6 V
Supply current A
port (6)
ICCA
VI = VCCI or GND, IO = 0
UNIT
μA
8
μA
VCCA = 0 V, VCCB = 3.6 V
–2
VCCA = 3.6 V, VCCB = 0 V
8
VCCA = VCCB = 1.2 V to 3.6 V
8
VCCA = 0 V, VCCB = 3.6 V
8
VCCA = 3.6 V, VCCB = 0 V
–2
16
μA
ICCB
Supply current B
port (6)
ICCA+
ICCB
Combined supply
current (6)
VI = VCCI or GND, IO = 0
VCCA = VCCB = 1.2 V to 3.6 V
Ci
Input capacitance
control pins
VI = 3.3 V or GND
VCCA = VCCB = 3.3 V
3.5
4.5
pF
Cio
Input/output
capacitance a or b
port
VO = 3.3 V or GND
VCCA = VCCB = 3.3 V
6
7
pF
(6)
(7)
8
VI = VCCI or GND, IO = 0
μA
VCCI is the VCC associated with the input port.
For I/O ports, the parameter IOZ includes the input leakage current.
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7.6 Switching Characteristics, VCCA = 1.2 V
TA= 25°C (see Figure 10)
PARAMETER
tPLH,
tPHL
tPLH,
tPHL
tPZH,
tPZL
tPZH,
tPZL
tPHZ,
tPLZ
tPHZ,
tPLZ
FROM
(INPUT)
Propagation delay time:
low-to-high-level output and
high-to-low level output
A
Propagation delay time:
low-to-high-level output and
high-to-low level output
Enable time:
to high level and
to low level
Enable time:
to high level and
to low level
Disable time:
from high level and
from low level
Disable time:
from high level and
from low level
B
OE
OE
OE
OE
TO
(OUTPUT)
B
A
A
B
A
B
TEST CONDITIONS
MIN
TYP
VCCB = 1.2 V
3.1
VCCB = 1.5 V
2.6
VCCB = 1.8 V
2.5
VCCB = 2.5 V
3
VCCB = 3.3 V
3.5
VCCB = 1.2 V
3.1
VCCB = 1.5 V
2.7
VCCB = 1.8 V
2.5
VCCB = 2.5 V
2.4
VCCB = 3.3 V
2.3
VCCB = 1.2 V
5.3
VCCB = 1.5 V
5.3
VCCB = 1.8 V
5.3
VCCB = 2.5 V
5.3
VCCB = 3.3 V
5.3
VCCB = 1.2 V
5.1
VCCB = 1.5 V
4
VCCB = 1.8 V
3.5
VCCB = 2.5 V
3.2
VCCB = 3.3 V
3.1
VCCB = 1.2 V
4.8
VCCB = 1.5 V
4.8
VCCB = 1.8 V
4.8
VCCB = 2.5 V
4.8
VCCB = 3.3 V
4.8
VCCB = 1.2 V
4.7
VCCB = 1.5 V
4
VCCB = 1.8 V
4.1
VCCB = 2.5 V
4.3
VCCB = 3.3 V
5.1
MAX
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UNIT
ns
ns
ns
ns
ns
ns
9
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7.7 Switching Characteristics, VCCA= 1.5 V ± 0.1 V
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted) (see Figure 10)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
VCCB = 1.2 V
tPLH,
tPHL
Propagation delay time:
low-to-high-level output and
high-to-low level output
A
B
Propagation delay time:
low-to-high-level output and
high-to-low level output
B
A
Enable time:
to high level and
to low level
OE
A
5.4
VCCB = 1.8 V
0.5
4.6
VCCB = 2.5 V
0.5
4.9
VCCB = 3.3 V
0.5
Enable time:
to high level and
to low level
OE
B
Disable time:
from high level and
from low level
OE
A
0.5
5.4
VCCB = 1.8 V
0.5
5.1
VCCB = 2.5 V
0.5
4.7
VCCB = 3.3 V
0.5
4.5
10
Disable time:
from high level and
from low level
OE
B
1.1
8.7
VCCB = 1.8 V
1.1
8.7
VCCB = 2.5 V
1.1
8.7
VCCB = 3.3 V
1.1
ns
8.7
4.8
VCCB = 1.5 V
1.1
7.6
VCCB = 1.8 V
1.1
7.1
VCCB = 2.5 V
1.1
5.6
VCCB = 3.3 V
1.1
5.2
ns
3.1
VCCB = 1.5 V
0.5
8.6
VCCB = 1.8 V
0.5
8.6
VCCB = 2.5 V
0.5
8.6
VCCB = 3.3 V
0.5
ns
8.6
4.1
VCCB = 1.5 V
0.5
8.4
VCCB = 1.8 V
0.5
7.6
VCCB = 2.5 V
0.5
7.2
VCCB = 3.3 V
0.5
7.8
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ns
3.7
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
6.8
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
ns
2.6
VCCB = 1.2 V
tPZH,
tPZL
UNIT
2.7
0.5
VCCB = 1.2 V
tPZH,
tPZL
MAX
VCCB = 1.5 V
VCCB = 1.2 V
tPLH,
tPHL
TYP
ns
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7.8 Switching Characteristics, VCCA= 1.8 V ± 0.15 V
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted) (see Figure 10)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
VCCB = 1.2 V
tPLH,
tPHL
Propagation delay time:
low-to-high-level output and
high-to-low level output
A
B
Propagation delay time:
low-to-high-level output and
high-to-low level output
B
A
Enable time:
to high level and
to low level
OE
A
5.1
VCCB = 1.8 V
0.5
4.4
VCCB = 2.5 V
0.5
4
VCCB = 3.3 V
0.5
Enable time:
to high level and
to low level
OE
B
0.5
4.6
VCCB = 1.8 V
0.5
4.4
VCCB = 2.5 V
0.5
3.9
VCCB = 3.3 V
0.5
3.7
Disable time:
from high level and
from low level
OE
A
1
6.8
VCCB = 1.8 V
1
6.8
VCCB = 2.5 V
1
6.8
VCCB = 3.3 V
1
Disable time:
from high level and
from low level
OE
B
6.8
1.1
8.2
VCCB = 1.8 V
1
6.7
VCCB = 2.5 V
0.5
5.1
VCCB = 3.3 V
0.5
4.5
0.5
7.1
VCCB = 1.8 V
0.5
7.1
VCCB = 2.5 V
0.5
7.1
VCCB = 3.3 V
0.5
ns
7.1
3.9
VCCB = 1.5 V
0.5
7.8
VCCB = 1.8 V
0.5
6.9
VCCB = 2.5 V
0.5
6
VCCB = 3.3 V
0.5
5.8
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ns
2.8
VCCB = 1.5 V
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ns
4.6
VCCB = 1.2 V
tPHZ,
tPLZ
ns
3
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
3.9
VCCB = 1.5 V
VCCB = 1.5 V
ns
2.5
VCCB = 1.2 V
tPZH,
tPZL
UNIT
2.5
0.5
VCCB = 1.2 V
tPZH,
tPZL
MAX
VCCB = 1.5 V
VCCB = 1.2 V
tPLH,
tPHL
TYP
ns
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7.9 Switching Characteristics, VCCA= 2.5 V ± 0.2 V
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted) (see Figure 10)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
VCCB = 1.2 V
tPLH,
tPHL
Propagation delay time:
low-to-high-level output and
high-to-low level output
A
B
Propagation delay time:
low-to-high-level output and
high-to-low level output
B
A
Enable time:
to high level and
to low level
OE
A
4.7
VCCB = 1.8 V
0.5
3.9
VCCB = 2.5 V
0.5
3.1
VCCB = 3.3 V
0.5
Enable time:
to high level and
to low level
OE
B
Disable time:
from high level and
from low level
OE
A
0.5
VCCB = 1.8 V
0.5
4
VCCB = 2.5 V
0.5
3.1
VCCB = 3.3 V
0.5
2.9
12
Disable time:
from high level and
from low level
OE
B
4.9
0.5
4.8
VCCB = 1.8 V
0.5
4.8
VCCB = 2.5 V
0.5
4.8
VCCB = 3.3 V
0.5
ns
4.8
4.5
VCCB = 1.5 V
1.1
7.9
VCCB = 1.8 V
0.5
6.4
VCCB = 2.5 V
0.5
4.6
VCCB = 3.3 V
0.5
4
ns
1.8
VCCB = 1.5 V
0.5
5.1
VCCB = 1.8 V
0.5
5.1
VCCB = 2.5 V
0.5
5.1
VCCB = 3.3 V
0.5
ns
5.1
3.6
VCCB = 1.5 V
0.5
7.1
VCCB = 1.8 V
0.5
6.3
VCCB = 2.5 V
0.5
5.1
VCCB = 3.3 V
0.5
3.9
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ns
2.2
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
2.8
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
ns
3
VCCB = 1.2 V
tPZH,
tPZL
UNIT
2.4
0.5
VCCB = 1.2 V
tPZH,
tPZL
MAX
VCCB = 1.5 V
VCCB = 1.2 V
tPLH,
tPHL
TYP
ns
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SCES565H – APRIL 2004 – REVISED MARCH 2016
7.10 Switching Characteristics, VCCA= 3.3 V ± 0.3 V
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted) (see Figure 10)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
VCCB = 1.2 V
tPLH,
tPHL
Propagation delay time:
low-to-high-level output and
high-to-low level output
A
B
Propagation delay time:
low-to-high-level output and
high-to-low level output
B
A
Enable time:
to high level and
to low level
OE
A
4.5
VCCB = 1.8 V
0.5
3.7
VCCB = 2.5 V
0.5
2.9
VCCB = 3.3 V
0.5
Enable time:
to high level and
to low level
OE
B
Disable time:
from high level and
from low level
OE
A
0.5
6.8
VCCB = 1.8 V
0.5
3.9
VCCB = 2.5 V
0.5
2.8
VCCB = 3.3 V
0.5
2.5
Disable time:
from high level and
from low level
OE
B
0.5
4
VCCB = 1.8 V
0.5
4
VCCB = 2.5 V
0.5
4
VCCB = 3.3 V
0.5
4
1.1
7.8
VCCB = 1.8 V
0.5
6.2
VCCB = 2.5 V
0.5
4.5
VCCB = 3.3 V
0.5
3.9
ns
1.7
VCCB = 1.5 V
0.5
4
VCCB = 1.8 V
0.5
4
VCCB = 2.5 V
0.5
4
VCCB = 3.3 V
0.5
ns
4
3.4
VCCB = 1.5 V
0.5
VCCB = 1.8 V
0.5
6
VCCB = 2.5 V
0.5
4.8
VCCB = 3.3 V
0.5
4.2
6.9
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ns
4.5
VCCB = 1.5 V
Copyright © 2004–2016, Texas Instruments Incorporated
ns
2
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
2.5
VCCB = 1.5 V
VCCB = 1.2 V
tPHZ,
tPLZ
ns
3.5
VCCB = 1.2 V
tPZH,
tPZL
UNIT
2.3
0.5
VCCB = 1.2 V
tPZH,
tPZL
MAX
VCCB = 1.5 V
VCCB = 1.2 V
tPLH,
tPHL
TYP
ns
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7.11 Operating Characteristics
TA= 25°C
PARAMETER
Power dissipation capacitance
per transceiver (1)
port A - outputs enabled
Power dissipation capacitance
per transceiver (1)
port A - outputs disabled
FROM
(INPUT)
A
A
TO
(OUTPUT)
B
B
TEST CONDITIONS
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CpdA
Power dissipation capacitance
per transceiver (1)
port A - outputs enabled
Power dissipation capacitance
per transceiver (1)
port A - outputs disabled
Power dissipation capacitance
per transceiver (1)
port B - outputs enabled
Power dissipation capacitance
per transceiver (1)
port B - outputs disabled
B
B
A
A
A
A
B
B
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CpdB
Power dissipation capacitance
per transceiver (1)
port B - outputs enabled
Power dissipation capacitance
per transceiver (1)
port B - outputs disabled
(1)
14
B
B
A
A
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
TYP
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
12
VCCA = VCCB = 1.5 V
12
VCCA = VCCB = 1.8 V
12
VCCA = VCCB = 2.5 V
13
VCCA = VCCB = 3.3 V
14
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
12
VCCA = VCCB = 1.5 V
12
VCCA = VCCB = 1.8 V
12
VCCA = VCCB = 2.5 V
13
VCCA = VCCB = 3.3 V
14
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
UNIT
pF
pF
See to TI application report, CMOS Power Consumption and Cpd Calculation (SCAA035).
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7.12 Typical Characteristics
6
6
5
5
4
4
tPLH − ns
tPD − ns
TA = 25°C
3
2
0
2
VCCB = 1.2 V
1
3
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.5 V
VCCB = 1.8 V
VCCB = 1.8 V
1
VCCB = 2.5 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 3.3 V
0
0
10
20
30
40
60
50
0
10
20
CL − pF
30
40
50
60
CL − pF
VCCA = 1.2 V
VCCA = 1.5 V
Figure 1. Typical Propagation Delay (A to B) vs Load
Capacitance
Figure 2. Typical Propagation Delay (A to B) vs Load
Capacitance
6
6
5
5
4
4
tPLH − ns
tPHL − ns
VCCB = 1.2 V
3
2
VCCB = 1.5 V
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
3
2
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
1
VCCB = 2.5 V
VCCB = 3.3 V
0
0
0
10
20
30
40
50
0
60
10
20
CL − pF
VCCA = 1.5 V
40
50
60
VCCA = 1.8 V
Figure 3. Typical Propagation Delay (A to B) vs Load
Capacitance
Figure 4. Typical Propagation Delay (A to B) vs Load
Capacitance
6
6
VCCB = 1.2 V
VCCB = 1.2 V
VCCB = 1.5 V
5
VCCB = 1.5 V
5
VCCB = 1.8 V
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 2.5 V
VCCB = 3.3 V
4
tPLH − ns
4
tPHL − ns
30
CL − pF
3
3
2
2
1
1
0
VCCB = 3.3 V
0
0
10
20
30
40
50
60
0
10
20
30
40
50
60
CL − pF
CL − pF
VCCA = 1.8 V
VCCA = 2.5 V
Figure 5. Typical Propagation Delay (A to B) vs Load
Capacitance
Figure 6. Typical Propagation Delay (A to B) vs Load
Capacitance
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Typical Characteristics (continued)
TA = 25°C
6
6
VCCB = 1.2 V
VCCB = 1.2 V
VCCB = 1.5 V
5
VCCB = 1.5 V
5
VCCB = 1.8 V
VCCB = 1.8 V
VCCB = 2.5 V
4
tPLH − ns
tPHL − ns
VCCB = 2.5 V
VCCB = 3.3 V
4
3
3
2
2
1
1
0
VCCB = 3.3 V
0
0
10
20
30
40
50
0
60
CL − pF
10
20
30
40
50
60
CL − pF
VCCA = 2.5 V
VCCA = 3.3 V
Figure 7. Typical Propagation Delay (A to B) vs Load
Capacitance
Figure 8. Typical Propagation Delay (A to B) vs Load
Capacitance
6
VCCB = 1.2 V
VCCB = 1.5 V
5
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
tPHL − ns
4
3
2
1
0
0
10
20
30
40
50
60
CL − pF
VCCA = 3.3 V
Figure 9. Typical Propagation Delay (A to B) vs Load Capacitance
16
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8 Parameter Measurement Information
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
t pd
t PLZ/t PZL
t PHZ/t PZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
CL
RL
VTP
15 pF
15 pF
15 pF
15 pF
15 pF
2 kW
2 kW
2 kW
2 kW
2 kW
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
VCCO
1.2 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
t PLZ
t PZL
VCCO
VCCI
Input
VCCI/2
VCCI/2
0V
t PLH
Output
t PHL
VOH
VCCO/2
VOL
VCCO/2
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VCCO/2
VOL + VTP
VOL
t PHZ
t PZH
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 W, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. t PZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 10. Load Circuit and Voltage Waveforms
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9 Detailed Description
9.1 Overview
The SN74AVCH8T245 is an 8-bit, dual supply noninverting bidirectional voltage level translator. Pins A1 through
A4, and the control pins (DIR and OE) are referenced to VCCA, while pins B1 through B4 are referenced to VCCB.
Both the A port and B port can accept I/O voltages ranging from 1.2 V to 3.6 V. With OE set to low, a high on
DIR allows data transmission from Port A to Port B, and a low on DIR allows data transmission from Port B to
Port A. When OE is set to high, both Port A and Port B outputs are in the high-impedance state. See AVC Logic
Family Technology and Application (SCEA006).
9.2 Functional Block Diagram
2
DIR
22
OE
3
A1
21
B1
To Seven Other Channels
Figure 11. Logic Diagram (Positive Logic)
9.3 Feature Description
9.3.1 Fully Configurable Dual-Rail Design
Both VCCA and VCCB can be supplied at any voltage from 1.2 V to 3.6 V, making the device suitable for translating
between any of the low voltage nodes: 1.2 V, 1.8 V, 2.5 V, and 3.3 V.
Table 1. Typical Total Static Power Consumption (ICCA + ICCB)
VCCB
VCCA
0V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0V
0
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