BQ24185YFFR

bq24185 www.ti.com SLUSA43 – SEPTEMBER 2010 Fully Integrated Switch-Mode One-Cell Li-Ion Charger with Full USB Compliance and Accessory Power Connection Check for Samples: bq24185 FEATURES • 1 • 2 • • • • • • • • Charge Faster than Linear Chargers From Current Limited Input Sources High-Accuracy Voltage and Current Regulation – Input Current Regulation Accuracy: ±5% (100mA, 500mA) – Charge Voltage Regulation Accuracy: ±0.5% (25°C), ±1% (0 – 125°C) – Charge Current Regulation Accuracy: ±5% 300mA, 5V Boost Mode for USB OTG Support Accessory Power Output (DCOUT) Input Voltage Based Dynamic Power Management Safety Limit Register for Maximum Charge Voltage and Current Limiting High-Efficiency Mini-USB/AC Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery Packs 20V Absolute Maximum and 16.5V Operation Input Voltage Rating Built-in Input Current Sensing and Limiting • • • • • • • Integrated Power FETs for Up to 1.5A Charge Rate Programmable Charge Parameters through I2C™ compatible Interface (up to 3.4 Mbps) Synchronous Fixed-Frequency PWM Controller Operating at 3 MHz With 0% to 99.5% Duty Cycle Safety Timer and Software Watchdog Reverse Leakage Protection Prevents Battery Drainage Thermal Regulation and Protection Status Outputs for Charging and Faults 25-Pin WCSP Package APPLICATIONS • • • Mobile Phones and Smart Phones Portable Media Players Handheld Devices DESCRIPTION The bq24185 is a compact, flexible, high-efficiency, USB-friendly switch-mode charge management device for single-cell Li-ion and Li-polymer batteries used in a wide range of portable applications. The charge parameters is programmable using an I2C compatible interface. The bq24185 integrates a synchronous PWM controller, power MOSFETs, input current sensing and overvoltage protection, high-accuracy current and voltage regulation, and charge termination, into a small WCSP package. POWER FOR ACCESSORY C8 1 µF SYSTEM VBUS C1 1 µF RSNS 68 mW DCOUT VBUS SW C4 10 nF C3 4.7 µF C2 10 µF BOOT PMID TEMP PACK + PGND HOST bq24185 CSIN PACK - CSOUT DRV C7 1 µF VBUS D+ D- VBUS C5 0.1 µF PSEL TS USB PHY GND C6 1 µF VAUX R1 10 kW R2 10 kW R4 10 kW CD INT Hardware Disable STAT SCL SDA R3 4 kW 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. I2C is a trademark of Phillips Electronics. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010, Texas Instruments Incorporated bq24185 SLUSA43 – SEPTEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION (CONTINUED) The bq24185 charges the battery in three phases: conditioning, constant current and constant voltage. Charge current is programmable using the I2C interface. Additionally, the input current can be limited to a host programmable threshold to maintain maximum charge current from current-limited sources, such as USB ports. Charge is terminated based on user-selectable minimum current level. A software watchdog provides a safety backup for I2C interface while a safety timer prevents overcharging the battery. During normal operation, bq24185 automatically restarts the charge cycle if the battery voltage falls below an internal threshold and automatically enters sleep mode or high impedance mode when the input supply is removed. The charge status is reported to the host using the I2C interface. During the charging process, the bq24185 monitors its junction temperature (TJ) and reduces the charge current if TJ increases to 125°C. To support USB OTG peripherals, the bq24185 contains boost circuitry that supplies VVBUS at 5.05V at up to 300mA by boosting the battery voltage. The bq24185 is available in 25-pin WCSP package. ORDERING INFORMATION VOVP I2C ADDRESS bq24185YFFR 16.5 V 6B bq24185YFFT 16.5 V 6B PART NUMBER (1) (2) (1) (2) The YFF package is available in the following options: R – taped and reeled in quantities of 3,000 devices per reel. T – taped and reeled in quantities of 250 devices per reel. This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) LIMITS UNIT Supply voltage range (with respect to PGND) VBUS –2 to 20 V Input voltage range (with respect to and PGND) SCL, SDA, PSEL, CSIN, CSOUT, DRV, DCOUT, INT –0.3 to 7 V PMID, STAT –0.3 to 20 SW, BOOT –0.7 to 20 Output voltage range (with respect to and PGND) Voltage difference between CSIN and CSOUT inputs (VCSIN –VCSOUT) Voltage difference between BOOT and SW inputs (VBOOT –VSW) Output sink Output current Output current (average) V ±7 V –0.3 to 7 V INT 5 STAT 10 DCOUT 1.5 A DRV 10 mA SW 2 A mA TA Operating free-air temperature range –30 to +85 °C TJ Junction temperature range –40 to +125 °C Tstg Storage temperature –45 to +150 °C (1) (2) 2 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the data book for thermal limitations and considerations of packages. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): bq24185 bq24185 www.ti.com SLUSA43 – SEPTEMBER 2010 DISSIPATION RATINGS (1) PACKAGE RqJA RqJC TA < 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C WCSP-25 60°C/W (1) 1.57°C/W 540 mW 5.4 mW/°C Using JEDEC 2s2p PCB standard. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN Supply voltage, VBUS Operating junction temperature range, TJ (1) NOM MAX UNIT 4.0 16 (1) V 0 125 °C The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BOOT or SW pins. A tight layout minimizes switching noise. ELECTRICAL CHARACTERISTICS Circuit of Figure 3, VVBUS = 5V, HZ_MODE=0, CD=0, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT CURRENTS VVBUS > VVBUS(min), PWM switching 10 mA IVBUS VVBUS supply current for control VVBUS > VVBUS(min), PWM NOT switching 5 mA 0°C< TJ < 85°C, EN=0 or HZ_MODE=1 650 µA IVBUS_LEAK Leakage current from battery to VBUS pin 0°C< TJ < 85°C, VCSOUT = 4.2 V, No input connected 5 µA Battery Current when using DCOUT DCOUT = enabled, VBAT = 4.2V, DCOUT_ILIM=1A, IDCOUT=750mA 800 µA 0°C< TJ < 85°C, VCSOUT = 4.2 V, No Input connected, DCOUT disabled SCL,SDA=0V or 1.8V 30 µA 0°C< TJ < 85°C, VCSOUT = 4.2 V, High Impedance mode, DCOUT disabled, VVBUS = 5V, SCL,SDA=0V or 1.8V 60 µA V IBAT_DCOUT IBAT_HIZ Battery discharge current in High Impedance mode, (CSIN, CSOUT, SW pins) VOLTAGE REGULATION VOREG Output charge voltage programmable range Voltage regulation accuracy Operating in voltage regulation, programmable 3.5 4.44 –0.5% 0.5% –1% 1% 550 1550 VICHRG = 37.4 mV to 44.2 mV –3.5% 3.5% VICHRG > 44.2 mV –3.0% 3.0% TA = 25°C CURRENT REGULATION - FAST CHARGE IOCHARGE Output charge current programmable range Regulation accuracy for charge current across RSNS VIREG = IOCHARGE × RSNS VPRECHG ≤ VCSOUT < VOREG, VVBUS>VSLP, RSNS = 68 mΩ, Programmable mA PSEL, CD LOGIC LEVEL VIL Input low threshold level PSEL, CD falling VIH Input high threshold level PSEL, CD rising 1.2 0.4 25 V V CHARGE TERMINATION DETECTION ITERM Termination charge current VCSOUT > VOREG–VRCH , VVBUS>VSLP, RSNS = 68 MΩ, Programmable ITERM_dgl Deglitch time for charge termination Both rising and falling, 2-mV over- drive, tRISE, tFALL = 100 ns Regulation accuracy for termination current across RSNS VIREG_TERM = IOTERM × RSNS 200 30 ms VTERM = 1.7 mV –40% 40% VTERM = 3.4 mV to 6.8 mV –16% 16% VTERM = 6.8 mV to 13.6 mV –11% 11% VTERM ≥ 13.6 mV –5.5% 5.5% Battery Detection sink current before charge done mA –550 µA INPUT BASED DYNAMIC POWER MANAGEMENT VIN_DPM The threshold when input based DPM loop kicks in Charge mode, programmable 4.15 4.71 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): bq24185 V 3 bq24185 SLUSA43 – SEPTEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Circuit of Figure 3, VVBUS = 5V, HZ_MODE=0, CD=0, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN DPM loop kick-in threshold tolerance TYP –2% MAX UNIT 2% FAULTY ADAPTER PROTECTION VVBUS (MIN) Faulty adapter threshold 3.6 Deglitch time for Faulty adapter 4.0 30 Hysteresis for faulty adapter protection VVBUS Rising 100 Current source for faulty adapter protection tINT 3.8 20 Detection Interval 30 V ms 200 mV 40 mA 2 s INPUT CURRENT LIMITING IIN_LIMIT USB charge mode, current pulled from PMID Input current limiting threshold IIN_LIMIT = 100 mA 90 95 100 IIN_LIMIT = 500 mA 450 475 500 IIN_LIMIT = 800 mA 700 755 800 mA DCOUT RDCOUT DCOUT Pass FET on-resistance IDCOUT = 500 mA ILIM_DCOUT DCOUT current limit programmable range Programmable via I2C tDGL_DCOUT Deglitch time from DCOUT current-limit event to DCOUT latch-off 350 Programmable via I2C DCOUT current limit range mΩ mA 14.5 ILIM_DCOUT = 350mA ILIM_DCOUT 300 1400 270 ms 350 ILIM_DCOUT = 750mA 650 750 ILIM_DCOUT = 1050mA 800 1050 ILIM_DCOUT = 1400mA 1050 1400 100 120 mA BATTERY RECHARGE THRESHOLD VRCH Recharge threshold voltage Below VOREG Deglitch time VCSOUT decreasing below threshold, tFALL = 100 ns, 10-mV overdrive 150 130 mV ms STAT OUTPUTS VOL(STAT) VOL(INT) Low-level output saturation voltage, STAT IO = 10 mA, sink current High-level leakage current Voltage on STAT pin is 5V 0.5 V 1 µA Low-level output saturation voltage, INT IO = 1 mA, sink current 0.4 V High-level leakage current Voltage on INT pin is 5V 1 µA I2C BUS LOGIC LEVELS AND TIMING CHARACTERISTICS VOL Output low threshold level IO = 10 mA, sink current 0.4 V Input low threshold level V(pull-up) = 1.8 V, SDA and SCL 0.4 V Input high threshold level V(pull-up) = 1.8 V, SDA and SCL I(bias) Input bias current V(pull-up) = 1.8 V, SDA and SCL fSCL SCL clock frequency 1.2 V 1 µA 3.4 MHz SLEEP COMPARATOR VSLP Sleep-mode entry threshold, VBUS-VCSOUT 2.3 V ≤ VCSOUT ≤ VOREG, VVBUS falling VSLP-EXIT Sleep-mode exit hysteresis 2.3 V ≤ VCSOUT < VOREG Deglitch time for VBUS rising above VSLP+VSLP_EXIT Rising voltage, 2-mV over drive, tRISE = 100 ns 0 40 100 mV 140 200 260 mV 30 ms UVLO VUVLO IC active threshold voltage VVBUS rising 3.05 3.3 VUVLO_HYS IC active hysteresis VVBUS falling from above VUVLO 120 150 3.55 V Internal top reverse blocking MOSFET on-resistance IIN_LIMIT = 500 mA, Measured from VVBUS to PMID 110 210 mΩ Internal top N-channel Switching MOSFET on-resistance Measured from PMID to SW 130 250 mΩ Internal bottom N-channel MOSFET on-resistance Measured from SW to PGND 125 210 mΩ mV PWM fOSC 4 Oscillator frequency 3.0 Submit Documentation Feedback MHz Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): bq24185 bq24185 www.ti.com SLUSA43 – SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS (continued) Circuit of Figure 3, VVBUS = 5V, HZ_MODE=0, CD=0, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN Frequency accuracy DMAX Maximum duty cycle DMIN Minimum duty cycle TYP –10% MAX UNIT 10% 99.5% 0 Synchronous mode to non-synchronous mode transition current threshold (1) Low-side MOSFET cycle-by-cycle current sensing VDRV Internal bias voltage regulator IDRV = 10 mA IDRV DRV Output Current External load on DRV VDO_DRV DRV Dropout Voltage (VVBUS – VDRV) 100 5 5.2 mA 5.45 10 IVBUS = 1A, VVBUS = 5 V, IDRV = 10 mA 340 VUVLO < VVBUS