CSD18512Q5BT

Order Now Product Folder Support & Community Tools & Software Technical Documents Reference Design CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 CSD18512Q5B 40 V N-channel NexFET™ power MOSFET 1 Features • • • • • • • • 1 Product Summary Low RDS(ON) Low thermal resistance Avalanche rated Logic level Pb-free terminal plating RoHS compliant Halogen-free SON 5 mm × 6 mm plastic package TA = 25°C VDS Drain to source voltage Qg Gate charge total (10 V) Qgd Gate charge gate to drain RDS(on) Drain to source on resistance VGS(th) Threshold voltage DC-DC conversion Secondary side synchronous rectifier Motor control DEVICE QTY MEDIA 2500 13-Inch Reel CSD18512Q5BT 250 7-Inch Reel nC VGS = 4.5 V 1.8 mΩ VGS = 10 V 1.3 mΩ V PACKAGE SHIP SON 5 mm × 6 mm Tape and Plastic Package Reel TA = 25°C VALUE UNIT VDS Drain to source voltage 40 V VGS Gate to source voltage ±20 V Continuous drain current (package limited) 100 Continuous drain current (silicon limited), TC = 25°C 211 ID 8 1 (1) D IDM 7 2 D PD 3 4 Continuous drain current 32 Pulsed drain current(2) 400 Power dissipation(1) 3.1 Power dissipation, TC = 25°C 139 6 D TJ, Tstg Operating Junction, Storage Temperature 5 D EAS Avalanche energy, single pulse ID = 64 A, L = 0.1 mH, RG = 25 Ω D G nC Absolute Maximum Ratings Top View S 75 13.3 (1) For all available packages, see the orderable addendum at the end of the datasheet. This 40 V, 1.3 mΩ, 5 mm × 6 mm NexFET™ power MOSFET is designed to minimize losses in power conversion applications. S V 1.6 CSD18512Q5B 3 Description S UNIT 40 Ordering Information(1) 2 Applications • • • TYPICAL VALUE A A W –55 to 150 °C 205 mJ P0093-01 (1) Typical RθJA = 40°C/W on a 1 inch2 , 2 oz. Cu pad on a 0.06 inch thick FR4 PCB. (2) Max RθJC = 0.9°C/W, pulse duration ≤100 μs, duty cycle ≤1% RDS(on) vs VGS Gate Charge 10 TC = 25°C, I D = 30 A TC = 125°C, I D = 30 A 7 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) 8 6 5 4 3 2 1 0 ID = 30 A, VDS = 20 V 9 8 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 0 10 20 30 40 50 Qg - Gate Charge (nC) 60 70 80 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 7 Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 7.2 7.3 7.4 Q5B Package Dimensions ........................................ 8 Recommended PCB Pattern..................................... 9 Recommended Stencil Pattern ................................. 9 Q5B Tape and Reel Information ............................. 10 4 Revision History Changes from Original (December 2016) to Revision A • 2 Page Corrected the SOA in Figure 10 ............................................................................................................................................ 5 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B CSD18512Q5B www.ti.com SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 5 Specifications 5.1 Electrical Characteristics (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain to source voltage VGS = 0 V, ID = 250 μA IDSS Drain to source leakage current VGS = 0 V, VDS = 32 V 1 μA IGSS Gate to source leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate to source threshold voltage VDS = VGS, ID = 250 μA RDS(on) Drain to source on resistance gfs Transconductance 40 1.3 V 1.6 2.2 V VGS = 4.5 V, ID = 30 A 1.8 2.3 mΩ VGS = 10 V, ID = 30 A 1.3 1.6 mΩ VDS = 20 V, ID = 30 A 136 S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance 5480 7120 pF 537 699 pF Crss RG Reverse transfer capacitance 256 333 pF Series gate resistance 1.0 2.0 Ω Qg Gate charge total (4.5 V) 37 48 nC Qg Gate charge total (10 V) 75 98 nC Qgd Gate charge gate to drain Qgs Gate charge gate to source Qg(th) Gate charge at Vth Qoss Output charge td(on) Turn on delay time tr Rise time td(off) Turn off delay time tf Fall time VGS = 0 V, VDS = 20 V, ƒ= 1 MHz VDS = 20 V, ID = 30 A VDS = 20 V, VGS = 0 V VDS = 20 V, VGS = 10 V, IDS = 30 A, RG = 0 Ω 13.3 nC 15.1 nC 8.2 nC 23 nC 7 ns 16 ns 31 ns 7 ns DIODE CHARACTERISTICS VSD Diode forward voltage Qrr Reverse recovery charge trr Reverse recovery time ISD = 30 A, VGS = 0 V 0.75 VDS= 20 V, IF = 30 A, di/dt = 300 A/μs 22 1.0 nC V 17 ns 5.2 Thermal Information (TA = 25°C unless otherwise stated) MAX UNIT RθJC Junction-to-case (top of package) thermal resistance (1) THERMAL METRIC 0.9 °C/W RθJA Junction-to-ambient thermal resistance (1) (2) 50 °C/W (1) (2) MIN TYP RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu. Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B 3 CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 GATE www.ti.com GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of 2 oz. (0.071 mm thick) Cu. Source Max RθJA = 125°C/W when mounted on a minimum pad area of 2 oz. (0.071 mm thick) Cu. DRAIN DRAIN M0137-02 M0137-01 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B CSD18512Q5B www.ti.com SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 Typical MOSFET Characteristics (continued) 200 200 180 180 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) TA = 25°C (unless otherwise stated) 160 140 120 100 80 60 40 VGS = 4.5 V VGS = 6 V VGS = 10 V 20 160 140 120 100 80 60 40 TC = 125°C TC = 25°C TC = -55°C 20 0 0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 VDS - Drain-to-Source Voltage (V) 0.45 0.5 0 0.5 1 1.5 2 2.5 3 VGS - Gate-to-Source Voltage (V) D002 3.5 4 D002 D003 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 10000 9 8 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 7 6 5 4 3 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 1000 2 1 100 0 0 10 20 30 40 50 Qg - Gate Charge (nC) ID = 30 A 60 70 0 80 4 8 D004 Figure 4. Gate Charge 40 D005 Figure 5. Capacitance 8 RDS(on) - On-State Resistance (m:) VGS(th) - Threshold Voltage (V) 36 VDS = 20 V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 -75 12 16 20 24 28 32 VDS - Drain-to-Source Voltage (V) TC = 25°C, I D = 30 A TC = 125°C, I D = 30 A 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 TC - Case Temperature (°C) 125 150 175 0 2 D006 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B 5 CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 100 1.8 VGS = 4.5 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 2 1.6 1.4 1.2 1 0.8 0.6 -75 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (°C) 125 150 0 175 0.1 0.2 D008 0.3 0.4 0.5 0.6 0.7 0.8 VSD - Source-to-Drain Voltage (V) 0.9 1 D009 ID = 30 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 100 IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1000 100 10 1 DC 10 ms 1 ms 0.1 0.1 100 µs 10 µs 1 10 VDS - Drain-to-Source Voltage (V) 100 10 TC = 25qC TC = 125qC 1 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single pulse, Max RθJC= 0.9°C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (°C) 150 175 D012 Max RθJC= 0.9°C/W Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B CSD18512Q5B www.ti.com SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 6 Device and Documentation Support 6.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.2 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B 7 CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 www.ti.com 7 Mechanical, Packaging, and Orderable Information 7.1 Q5B Package Dimensions K H D3 6 D1 4 5 e 6 4 3 3 5 D2 7 2 E 2 7 ө 1 8 1 8 L b (8x) c1 E1 d1 Top View d2 Bottom View Side View ө Front View DIM MILLIMETERS MIN NOM MAX A 0.80 1.00 1.05 b 0.36 0.41 0.46 c 0.15 0.20 0.25 c1 0.15 0.20 0.25 c2 0.20 0.25 0.30 D1 4.90 5.00 5.10 D2 4.12 4.22 4.32 D3 3.90 4.00 4.10 d 0.20 0.25 0.30 d1 0.085 TYP d2 0.319 0.369 0.419 E 4.90 5.00 5.10 E1 5.90 6.00 6.10 E2 3.48 3.58 3.68 e H 0.36 0.46 0.56 L 0.46 0.56 0.66 L1 0.57 0.67 0.77 θ 0° - - K 8 1.27 TYP 1.40 TYP Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B CSD18512Q5B www.ti.com SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 7.3 Recommended Stencil Pattern (0.020) 0.508 x4 (0.014) 0.350 (0.011) 0.286 (0.022) 0.562 x 4 (0.029) 0.746 x 8 2.186 (0.086) 4.318 (0.170) 0.300 (0.012) 1.270 (0.050) (0.030) 0.766 (0.051) 1.294 x8 (0.060) 1.525 1.270 (0.050) (0.042) 1.072 (0.259) 6.586 Recommended Stencil Opening Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B Submit Documentation Feedback 9 CSD18512Q5B SLPS624A – DECEMBER 2016 – REVISED MARCH 2019 www.ti.com K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 7.4 Q5B Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN R 0.30 TYP A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2. 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm. 3. Material: black static-dissipative polystyrene. 4. All dimensions are in mm (unless otherwise specified). 5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket. 10 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated Product Folder Links: CSD18512Q5B PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD18512Q5B ACTIVE VSON-CLIP DNK 8 2500 RoHS-Exempt & Green NIPDAU Level-1-260C-UNLIM -55 to 150 CSD18512 CSD18512Q5BT ACTIVE VSON-CLIP DNK 8 250 RoHS-Exempt & Green NIPDAU Level-1-260C-UNLIM -55 to 150 CSD18512 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of