CSD25485F5

CSD25485F5 SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 CSD25485F5 –20-V P-Channel FemtoFET™ MOSFET Product Summary 1 Features • • • • • • • TA = 25°C Low-on resistance Low Qg and Qgd Ultra-small footprint – 1.53 mm × 0.77 mm – 0.50-mm pad pitch Low profile – 0.36-mm height Integrated ESD protection diode – Rated > 4-kV HBM – Rated > 2-kV CDM Lead and halogen free RoHS compliant Drain-to-Source Voltage –20 V Qg Gate Charge Total (–4.5 V) 2.7 nC Qgd Gate Charge Gate-to-Drain 0.56 nC VGS = –1.8 V 89 VGS = –2.5 V 51 VGS = –4.5 V 35 VGS = –8 V VGS(th) Threshold Voltage mΩ 29.7 –0.95 V Device Information(1) DEVICE QTY CSD25485F5 3000 CSD25485F5T Optimized for industrial load switch applications Optimized for general purpose switching applications (1) 250 MEDIA PACKAGE SHIP 7-Inch Reel Femto 1.53-mm × 0.77-mm SMD Leadless Tape and Reel For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings TA = 25°C 3 Description This 29.7-mΩ, –20-V, P-Channel FemtoFET™ MOSFET technology is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing a significant reduction in footprint size. . VALUE UNIT VDS Drain-to-Source Voltage –20 V VGS Gate-to-Source Voltage –12 V Continuous Drain Current(1) –3.2 Continuous Drain Current(2) –5.3 Pulsed Drain Current(1) (3) –31 Power Dissipation(1) 0.5 Power Dissipation(2) 1.4 ID IDM PD V(ESD) 0.36 mm TJ, Tstg (1) (2) (3) 0.77 mm UNIT VDS RDS(on) Drain-to-Source On Resistance 2 Applications • • TYPICAL VALUE 1.53 mm Human-Body Model (HBM) 4000 Charged-Device Model (CDM) 2000 Operating Junction, Storage Temperature –55 to 150 A A W V °C Min Cu, typical RθJA = 245°C/W. Max Cu, typical RθJA = 90°C/W. Pulse duration ≤ 100 μs, duty cycle ≤ 1%. G Figure 3-1. Typical Part Dimensions . S . . . D . . Figure 3-2. Top View . An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Specifications.................................................................. 3 5.1 Electrical Characteristics.............................................3 5.2 Thermal Information....................................................3 5.3 Typical MOSFET Characteristics................................ 3 6 Device and Documentation Support..............................6 6.1 Receiving Notification of Documentation Updates......6 6.2 Trademarks................................................................. 6 7 Mechanical, Packaging, and Orderable Information.... 7 7.1 Mechanical Dimensions.............................................. 7 7.2 Recommended Minimum PCB Layout........................8 7.3 Recommended Stencil Pattern................................... 8 4 Revision History Changes from Revision A (January 2017) to Revision B (February 2022) Page • Changed ultra-low profile bullet from 0.35 mm to 0.36 mm in height................................................................. 1 • Updated ultra-low profile image height from 0.35 mm to 0.36 mm..................................................................... 1 • Changed ultra-low profile image height from 0.35 mm to 0.36 mm.................................................................... 7 • Added FemtoFET Surface Mount Guide note.................................................................................................... 8 Changes from Revision * (August 2016) to Revision A (January 2017) Page • Changed Min Cu RθJA from 90°C/W : to 245°C/W in Figure 5-11 ......................................................................3 • Added Table 7-1 in the Mechanical Dimensions section.................................................................................... 7 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –100 nA STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, IDS = –250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = –16 V IGSS Gate-to-source leakage current VDS = 0 V, VGS = –12 V VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = –250 μA RDS(on) Drain-to-source on resistance gfs Transconductance –20 V –25 nA –0.95 –1.3 V VGS = –1.8 V, IDS = –0.1 A 89 250 VGS = –2.5 V, IDS = –0.9 A 51 70 VGS = –4.5 V, IDS = –0.9 A 35 42 VGS = –8 V, IDS = –0.9 A 29.7 35 VDS = –2 V, IDS = –0.9 A 7 –0.7 mΩ S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance 20 Qg Gate charge total (–4.5 V) 2.7 Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = –10 V, ƒ = 1 MHz VDS = –10 V, IDS = –0.9 A VDS = –10 V, VGS = 0 V VDS = –10 V, VGS = –4.5 V, IDS = –0.9 A, RG = 2 Ω 410 533 pF 212 276 pF 17 23 pF 3.5 nC Ω 0.56 nC 0.67 nC 0.40 nC 4.4 nC 14 ns 6 ns 27 ns 14 ns DIODE CHARACTERISTICS VSD Diode forward voltage ISD = –0.9 A, VGS = 0 V –0.75 –1 V 5.2 Thermal Information TA = 25°C (unless otherwise stated) THERMAL METRIC RθJA (1) (2) MIN TYP resistance(1) 90 Junction-to-ambient thermal resistance(2) 245 Junction-to-ambient thermal MAX UNIT °C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 3 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 -IDS - Drain-to-Source Current (A) 25 Figure 5-1. Transient Thermal Impedance VGS = -2.5 V VGS = -4.5 V VGS = -8 V 20 15 10 5 0 0 0.25 0.5 0.75 1 1.25 -VDS - Drain-to-Source Voltage (V) 1.5 D002 Figure 5-2. Saturation Characteristics -IDS - Drain-To-Source Current (A) 20 TC = 125° C TC = 25° C TC = -55° C 18 16 14 12 10 8 6 4 2 0 0 0.5 1 1.5 2 2.5 -VGS - Gate-To-Source Voltage (V) 3 D003 VDS = –5 V Figure 5-3. Transfer Characteristics 5000 7 1000 6 C - Capacitance (pF) -VGS - Gate-to-Source Voltage (V) 8 5 4 3 2 100 10 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 1 1 0 0 0.5 1 1.5 2 2.5 3 3.5 Qg - Gate Charge (nC) ID = –0.9 A 4 4.5 5 0 2 D004 VDS = –10 V 4 6 8 10 12 14 16 -VDS - Drain-to-Source Voltage (V) 18 20 D005 Figure 5-5. Capacitance Figure 5-4. Gate Charge 4 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 120 RDS(on) - On-State Resistance (m:) -VGS(th) - Threshold Voltage (V) 1.25 1.15 1.05 0.95 0.85 0.75 0.65 0.55 0.45 -75 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 75 60 45 30 15 0 2 D006 Figure 5-6. Threshold Voltage vs Temperature 4 6 8 10 -VGS - Gate-To-Source Voltage (V) 12 D007 Figure 5-7. On-State Resistance vs Gate-to-Source Voltage 1.5 100 VGS = -2.5 V VGS = -8 V -ISD - Source-To-Drain Current (A) Normalized On-State Resistance 90 0 175 ID = –250 µA 1.4 TC = 25° C, ID = -0.9 A TC = 125° C, ID = -0.9 A 105 1.3 1.2 1.1 1 0.9 TC = 25qC TC = 125qC 10 1 0.1 0.01 0.001 0.8 0.7 -75 0.0001 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0.2 0.4 0.6 0.8 -VSD - Source-To-Drain Voltage (V) 175 1 D009 Figure 5-9. Typical Diode Forward Voltage D008 ID = –0.9 A Figure 5-8. Normalized On-State Resistance vs Temperature 4.5 -IDS - Drain-to-Source Current (A) -IDS - Drain-To-Source Current (A) 100 10 1 100 ms 10 ms 0.1 0.1 1 ms 100 µs 1 10 -VDS - Drain-To-Source Voltage (V) 100 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 D010 Single pulse, typ min Cu RθJA = 245°C/W Figure 5-10. Maximum Safe Operating Area (SOA) 0 25 50 75 100 125 TA - Ambient Temperature (qC) 150 175 D011 Typ min Cu RθJA = 245°C/W Figure 5-11. Maximum Drain Current vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 5 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Trademarks FemtoFET™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Mechanical Dimensions 0.77 0.69 A B PIN 1 INDEX AREA 1.53 1.45 C 0.36 MAX SEATING PLANE 3 0.5 (R0.05) TYP 1 1 3X 3X 0.40 0.38 0.16 0.14 0.015 TOP B A 4222132/A 06/2015 A. B. C. All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). This drawing is subject to change without notice. This package is a PB-free solder land design. Table 7-1. Pin Configuration POSITION DESIGNATION Pin 1 Gate Pin 2 Source Pin 3 Drain Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 7 CSD25485F5 www.ti.com SLPS606B – AUGUST 2016 – REVISED FEBRUARY 2022 7.2 Recommended Minimum PCB Layout 3X (0.39) (0.05) MIN ALL AROUND 1 (R0.05) TYP 3X (0.15) 2 SYMM SOLDER MASK OPENING TYP (0.5) 3 METAL UNDER SOLDER MASK TYP SYMM A. B. All dimensions are in millimeters. LAND PATTERN EXAMPLE SOLDER DEFINED For more information, see FemtoFET Surface Mount GuideMASK (SLRA003D). SCALE:50 7.3 Recommended Stencil Pattern 3X (0.39) 1 3x (0.15) 3X (0.2) (R0.05) TYP SYMM 2 4 x SOLDER MASK EDGE 0.525 3 SYMM A. All dimensions are in millimeters. SOLDER PASTE EXAMPLE ON 0.075 - 0.1 mm THICK STENCIL SCALE:50 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: CSD25485F5 PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD25485F5 ACTIVE PICOSTAR YJK 3 3000 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 3H CSD25485F5T ACTIVE PICOSTAR YJK 3 250 RoHS & Green NIAU Level-1-260C-UNLIM -55 to 150 3H (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of