LM2766M6/NOPB

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 LM2766 Switched Capacitor Voltage Converter 1 Features 3 Description • • • • • The LM2766 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the range of 1.8 V to 5.5 V. Two low-cost capacitors and a diode are used in this circuit to provide up to 20 mA of output current. 1 Doubles Input Supply Voltage SOT-23 6-Pin Package 20-Ω Typical Output Impedance 90% Typical Conversion Efficiency at 20 mA 0.1-µA Typical Shutdown Current 2 Applications • • • • • • Cellular Phones Pagers PDAs Operational Amplifier Power Supplies Interface Power Supplies Handheld Instruments The LM2766 operates at 200-kHz switching frequency to reduce output resistance and voltage ripple. With an operating current of only 350 µA (operating efficiency greater than 90% with most loads) and 0.1-µA typical shutdown current, the LM2766 provides ideal performance for batterypowered systems. The device is manufactured in a SOT-23 6-pin package. Device Information(1) PART NUMBER LM2766 PACKAGE SOT-23 (6) BODY SIZE (NOM) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space space space Typical Voltage Doubler Application 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics ............................................. 7 Parameter Measurement Information .................. 7 8 Detailed Description .............................................. 8 7.1 Test Circuit ................................................................ 7 8.1 Overview ................................................................... 8 8.2 Functional Block Diagram ......................................... 8 8.3 Feature Description................................................... 8 8.4 Device Functional Modes.......................................... 8 9 Application and Implementation .......................... 9 9.1 Application Information.............................................. 9 9.2 Typical Application ................................................... 9 10 Power Supply Recommendations ..................... 12 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 14 12.1 12.2 12.3 12.4 12.5 Device Support...................................................... Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 13 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (May 2013) to Revision C • Added Device Information and Pin Configuration and Functions sections, ESD Rating table, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections ................................................. 1 Changes from Revision A (May 2013) to Revision B • 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 12 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 5 Pin Configuration and Functions DBV Package 6-Pin SOT-23 Top View 1 6 2 5 3 4 Pin Functions PIN NO. NAME TYPE DESCRIPTION 1 V+ Power Power supply positive voltage input. 2 GND Ground Power supply ground input. 3 CAP− Power Connect this pin to the negative terminal of the charge-pump capacitor. 4 SD Input 5 VOUT Power Positive voltage output. 6 CAP+ Power Connect this pin to the positive terminal of the charge-pump capacitor. Shutdown control pin, tie this pin to V+ in normal operation. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 3 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Supply voltage (V+ to GND, or V+ to VOUT) (GND − 0.3) SD MAX UNIT 5.8 V (V+ + 0.3) V 40 mA 1 sec 600 mW 150 °C 150 °C VOUT continuous output current Output short-circuit duration to GND (3) Continuous power dissipation (TA = 25°C) (4) TJMax (4) −65 Storage temperature, Tstg (1) (2) (3) (4) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, contact the TI Sales Office/ Distributors for availability and specifications. VOUT may be shorted to GND for one second without damage. For temperatures above 85°C, VOUT must not be shorted to GND or device may be damaged. The maximum allowable power dissipation is calculated by using PDMax = (TJMax − TA)/RθJA, where TJMax is the maximum junction temperature, TA is the ambient temperature, and RθJA is the junction-to-ambient thermal resistance of the specified package. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Machine model (CDM), per JEDEC specification JESD22-C101 (2) UNIT V ±200 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MAX UNIT Junction temperature MIN −40 NOM 100 °C Ambient temperature −40 85 °C 240 °C Lead temperature (soldering, 10 sec.) 6.4 Thermal Information LM2766 THERMAL METRIC (1) DBV (SOT-23) UNIT 6 PINS RθJA (1) 4 Junction-to-ambient thermal resistance 210 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 6.5 Electrical Characteristics Unless otherwise specified, typical limits are for TJ = 25°C, minimum and maximum limits apply over the full operating temperature range: V+ = 5 V, C1 = C2 = 10 μF. (1) PARAMETER V+ Supply voltage IQ Supply current ISD Shutdown supply current VSD Shutdown pin input voltage TEST CONDITIONS MIN TYP 1.8 MAX UNIT 5.5 V No load 350 950 µA TJ = 25°C 0.1 0.5 µA TA = 85°C 0.2 0.6 V 2 2.5 V ≤ VIN ≤ 5.5 V 20 1.8 V ≤ VIN ≤ 2.5 V 10 IL Output current ROUT Output resistance (2) IL = 15 mA 20 55 Ω ƒOSC Oscillator frequency See (3) 220 400 700 kHz ƒSW Switching frequency See (3) 110 200 350 kHz PEFF Power efficiency IL = 20 mA to GND VOEFF Voltage conversion efficiency No load (1) (2) (3) mA 94% 99.96% In the test circuit, capacitors C1 and C2 are 10-µF, 0.3-Ω maximum ESR capacitors. Capacitors with higher ESR may increase output resistance, and reduce output voltage and efficiency. Specified output resistance includes internal switch resistance and capacitor ESR. See the details in Application and Implementation for positive voltage doubler. The output switches operate at one half of the oscillator frequency, ƒOSC = 2 × ƒSW. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 5 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com 6.6 Typical Characteristics (Circuit of Typical Voltage Doubler Application, VIN = 5 V, TA = 25°C unless otherwise specified) 6 Figure 1. Supply Current vs Supply Voltage Figure 2. Output Resistance vs Capacitance Figure 3. Output Resistance vs Supply Voltage Figure 4. Output Resistance vs Temperature Figure 5. Output Voltage vs Load Current Figure 6. Switching Frequency vs Supply Voltage Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 Typical Characteristics (continued) (Circuit of Typical Voltage Doubler Application, VIN = 5 V, TA = 25°C unless otherwise specified) Figure 7. Switching Frequency vs Temperature Figure 8. Output Ripple vs Load Current 7 Parameter Measurement Information 7.1 Test Circuit Figure 9. LM2766 Test Circuit Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 7 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The LM2766 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the range of 1.8 V to 5.5 V. Two low-cost capacitors and a diode (needed during start-up) are used in this circuit. 8.2 Functional Block Diagram LM2766 V+ SD OUT CAP+ OSCILLATOR Switch Array Switch Drivers CAPGND 8.3 Feature Description 8.3.1 Test Circuit The LM2766 contains four large CMOS switches which are switched in a sequence to double the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 10 illustrates the voltage conversion scheme. When S2 and S4 are closed, C1 charges to the supply voltage V+. During this time interval, switches S1 and S3 are open. In the next time interval, S2 and S4 are open; at the same time, S1 and S3 are closed, the sum of the input voltage V+ and the voltage across C1 gives the 2 V+ output voltage when there is no load. The output voltage drop when a load is added is determined by the parasitic resistance (Rds(on) of the MOSFET switches and the ESR of the capacitors) and the charge transfer loss between capacitors. See Application and Implementation for further details. Figure 10. Voltage Doubling Principle 8.4 Device Functional Modes 8.4.1 Shutdown Mode A shutdown (SD) pin is available to disable the device and reduce the quiescent current to 0.1 µA. In normal operating mode, the SD pin is connected to V+. The device can be brought into the shutdown mode by applying to the SD pin a voltage less than 20% of the V+ pin voltage. 8 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The LM2766 provides a simple and efficient means of creating an output voltage level equal to twice that of the input voltage. Without the need of an inductor, the application solution size can be reduced versus the magnetic DC-DC converter solution. 9.2 Typical Application The main application of the LM2766 is to double the input voltage. Figure 11. LM2766 Typical Application 9.2.1 Design Requirements For typical switched-capacitor voltage converter applications, use the parameters listed in Table 1. Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Minimum input voltage 1.8 to 5.5 V Output current (minimum), 2.5 V ≤ VIN ≤ 5.5 V 20 mA Output current (minimum), 1.8 V ≤ VIN ≤ 2.5 V 10 mA Switching frequency 200 kHz (typical) 9.2.2 Detailed Design Procedure 9.2.2.1 Positive Voltage Doubler Figure 12. Voltage Doubling Principle Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 9 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals 2 V+. The output resistance Rout is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, and the capacitance and ESR of C1 and C2. Because the switching current charging and discharging C1 is approximately twice the output current, the effect of the ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The output capacitor C2 is charging and discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the output resistance. A good approximation of Rout is: R OUT  2R SW + 2 + 4ESR C1 + ESR C2 &OSC × C1 where • RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 12. (1) The peak-to-peak output voltage ripple is determined by the oscillator frequency as well as the capacitance and ESR of the output capacitor C2: VRIPPLE = IL + 2 × IL × ESRC2 &OSC × C2 (2) High capacitance, low ESR capacitors can reduce both the output resistance and the voltage ripple. The Schottky diode D1 is only needed to protect the device from turning on its own parasitic diode and potentially latching up. During start-up, D1 also quickly charges up the output capacitor to VIN minus the diode drop thereby decreasing the start-up time. Therefore, the Schottky diode D1 must have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10 V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size. 9.2.2.2 Capacitor Selection As discussed in Positive Voltage Doubler, the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is D= POUT IL 2 RL = 2 2 PIN IL RL + IL ROUT + IQ (V+) where • • IQ(V+) is the quiescent power loss of the device; and IL2ROUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs. (3) The selection of capacitors is based on the specifications of the dropout voltage (which equals IOUT ROUT), the output voltage ripple, and the converter efficiency. Low ESR capacitors (Table 2) are recommended to maximize efficiency, reduce the output voltage drop and voltage ripple. Table 2. Low ESR Capacitor Manufacturers MANUFACTURER WEBSITE CAPACITOR TYPE Nichicon Corp. www.nichicon.com PL & PF series, through-hole aluminum electrolytic AVX Corp. www.avxcorp.com TPS series, surface-mount tantalum Sprague Sanyo www.vishay.com 593D, 594D, 595D series, surface-mount tantalum www.sanyovideo.com OS-CON series, through-hole aluminum electrolytic Murata www.murata.com Ceramic chip capacitors Taiyo Yuden www.t-yuden.com Ceramic chip capacitors www.tokin.com Ceramic chip capacitors Tokin 10 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 9.2.2.3 Paralleling Devices Any number of LM2766 devices can be paralleled to reduce the output resistance. Because there is no closed loop feedback, as found in regulated circuits, stable operation is assured. Each device must have its own pumping capacitor C1, while only one output capacitor COUT is needed as shown in Figure 13. The composite output resistance is: ROUT = R OUT of each LM2766 (4) Number of Devices Figure 13. Lowering Output Resistance By Paralleling Devices 9.2.2.4 Cascading Devices Cascading the several LM2766 devices is an easy way to produce a greater voltage (a two-stage cascade circuit is shown in Figure 14). The effective output resistance is equal to the weighted sum of each individual device: Rout = 1.5Rout_1 + Rout_2 (5) Note that increasing the number of cascading stages is practically limited because it significantly reduces the efficiency, increases the output resistance and output voltage ripple. Figure 14. Increasing Output Voltage By Cascading Devices Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 11 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com 9.2.2.5 Regulating VOUT It is possible to regulate the output of the LM2766 by use of a low dropout regulator (such as LP2980-5.0). The whole converter is depicted in Figure 15. A different output voltage is possible by use of LP2980-3.3, LP2980-3.0, or LP2980-ADJ. The following conditions must be satisfied simultaneously for worst case design: 2Vin_min >Vout_min +Vdrop_max (LP2980) + Iout_max × Rout_max (LM2766) 2Vin_max < Vout_max +Vdrop_min (LP2980) + Iout_min × Rout_min (LM2766) (6) (7) Figure 15. Generate a Regulated 5-V From 3-V Input Voltage 9.2.3 Application Curve Figure 16. Efficiency vs Load Current 10 Power Supply Recommendations The LM2766 is designed to operate from as an inverter over an input voltage supply range from 1.8 V and 5.5 V. This input supply must be well-regulated and capable to supply the required input current. If the input supply is located far from the device, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. 12 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 LM2766 www.ti.com SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 11 Layout 11.1 Layout Guidelines The high switching frequency and large switching currents of the LM2766 make the choice of layout important. Use the following steps as a reference to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range. • Place CIN on the top layer (same layer as the LM2766) and as close to the device as possible. Connecting the input capacitor through short, wide traces to both the V+ and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the V+ line. • Place COUT on the top layer (same layer as the LM2766) and as close as possible to the OUT and GND pin. The returns for both CIN and COUT must come together at one point, as close to the GND pin as possible. Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND pins that can corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding circuitry. • Place C1 on the top layer (same layer as the LM2766 device) and as close to the device as possible. Connect the flying capacitor through short, wide traces to both the CAP+ and CAP– pins. 11.2 Layout Example LM2766 V+ CAP+ GND OUT CAP- SD Figure 17. LM2766 Layout Example Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 13 LM2766 SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM2766 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2766M6/NOPB ACTIVE SOT-23 DBV 6 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S16B LM2766M6X/NOPB ACTIVE SOT-23 DBV 6 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S16B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of