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LM3207TL-2.53/NOPB

LM3207TL-2.53/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    DSBGA9

  • 描述:

    1.2A, 2300KHZ PBGA9

  • 数据手册
  • 价格&库存
LM3207TL-2.53/NOPB 数据手册
LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 LM3207 650mA Miniature, Adjustable, Step-Down DC-DC Converter for RF Power Amplifiers with Integrated Vref LDO Check for Samples: LM3207 FEATURES • • • • 1 • • 2 • • • • • 2MHz (typ.) PWM Switching Frequency Operates from a single Li-Ion cell (2.7V to 5.5V) Variable Output Voltage (0.8V to 3.6V) 650mA Maximum load capability High Efficiency (95% Typ at 3.9VIN, 3.4VOUT at 400mA) from internal synchronous rectification Integrated Vref LDO Regulated LDO Output up to 10mA max Fast 3uS Vref LDO On/Off Time 9-pin micro SMD Package Current Overload Protection Thermal Overload Protection APPLICATIONS • • • • Cellular Phones Hand-Held Radios RF PC Cards Battery Powered RF Devices DESCRIPTION The LM3207 is a DC-DC converter optimized for powering WCDMA / CDMA RF power amplifiers (PAs) from a single Lithium-Ion cell; however they may be used in many other applications. It steps down an input voltage from 2.7V to 5.5V to a variable output voltage from 0.8V(typ.) to 3.6V(typ.). Output voltage is set using a VCON analog input for controlling power levels and efficiency of the RF PA. The LM3207 also provides a regulated reference voltage(Vref) required by linear RF power amplifiers through an integrated LDO that has a maximum Iref up to 10 mA. See Ordering Information table on page 2 for Voltage Options. The LM3207 is available in a 9-pin lead free micro SMD package. High switching frequency (2MHz) allows use of surface-mount components. Only four small external surface-mount components are required, an inductor and three ceramic capacitors. Typical Application Vin 2.7V to 5.5V VOUT 3.3 PH PVIN EN 0.8V to 3.6V SW FB 10 PF VCON 4.7 PF LM3207 LDO OUT ENLDO SGND LDO PGND 100 nF Figure 1. LM3207 Typical Application 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2007, Texas Instruments Incorporated LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com Connection Diagrams SW PVIN A1 A2 A3 PGND EN LDO B1 EN B2 B3 SGND C1 C2 C3 LDO FB A 1 XVS/Device # Vcon Top View Package Mark - Top View 9–Bump Thin Micro SMD Package, Large Bump NS Package Number TLA09TTA (1) Table 1. Pin Descriptions Pin # Name A1 PVIN B1 ENLDO Description Power Supply Voltage Input. LDO Enable Input. Set this digital input high to turn on LDO (ENpin must also be set high). For shutdown, set low. C1 FB C2 VCON Feedback Analog Input. Connect to the output at the output filter capacitor. Voltage Control Analog input. VCON controls VOUT in PWM mode. C3 LDO LDO Output Voltage. B3 SGND Analog and Control Ground. A3 PGND Power Ground. A2 SW Switch node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current Limit specification of the LM3207. B2 EN PWM enable Input. Set this digital input high for normal operation. For shutdown, set low. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 Absolute Maximum Ratings (1) (2) PVIN to SGND −0.2V to +6.0V PGND to SGND −0.2V to +0.2V EN, FB, VCON, ENLDO, LDO (SGND −0.2V) to (VDD +0.2V) w/6.0V max SW (PGND −0.2V) to (PVIN +0.2V) w/6.0V max PVIN −0.2V to +0.2V Continuous Power Dissipation (3) Internally Limited Junction Temperature (TJ-MAX) +150°C Storage Temperature Range −65°C to +150°C Maximum Lead Temperature (Soldering, 10 sec) +260°C (1) (2) (3) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pins. The LM3207 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typ.) and disengages at TJ = 130°C (typ.). Operating Ratings (1) (2) Input Voltage Range 2.7V to 5.5V Recommended Load Current 0mA to 650mA Junction Temperature (TJ) Range −30°C to +125°C Ambient Temperature (TA) Range −30°C to +85°C (3) (1) (2) (3) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pins. The LM3207 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Thermal Properties Junction-to-Ambient Thermal 100°C/W Resistance (θJA), TLA09 Package (1) (1) Junction-to-ambient thermal resistance (θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 3 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 Electrical Characteristics www.ti.com (1) (2) (3) Limits in standard typeface are for TA = TJ = 25°C. Limits in boldface type apply over the full operating ambient temperature range (−30°C ≤ TA = TJ ≤ +85°C). Unless otherwise noted, all specifications apply to all LM3207 LDO options with: PVIN = VIN = ENLDO = EN = 3.6V. Symbol Parameter Conditions Min Typ Max Units +2.6 % LDO VLDO LDO Output Voltage Iout = 0 mA VLDO,MIN Minimum LDO Output Voltage Iout = 10mA, PVIN = 3V ISC Short circuit current(DC) VLDO = 0 IPUT Pull-up current (transient) VLDO = VLDO(nom)/2, PVIN = 3V IPD DC Pull-down current (DC) VLDO = PVIN, ENLDO = 0 IPDT Pull-down current (transient) VLDO = 1.44V, PVIN = 3V IQ_LDO + PWM DC Bias current into PVIN VCON = 2V, FB = 0V, No Switching, ENLDO = EN = 3.6V (5) IPIN,ENLDO LDO Pin pull down current (4) -2.6 % 50 mA 150 mA -50 mA -200 mA 1.2 1.6 mA 5 10 uA (4) Switcher VFB, MIN Feedback Voltage at minimum setting VCON = 0.32V 0.75 0.8 0.85 V VFB, MAX Feedback Voltage at maximum setting VCON = 1.44V, PVIN = 4.2V 3.537 3.6 3.683 V ISHDN Shutdown supply current EN = ENLDO= SW = VCON = 0V, 0.01 2 µA IQ_PWM DC bias current into PVIN VCON = 2V, FB = 0V, ENLDO = 0V , EN = 3.6V, No Switching (5) 1.1 1.6 mA RDSON(P) Pin-pin resistance for PFET ISW = 200mA RDSON(N) Pin-pin resistance for NFET (6) 140 ISW = - 200mA (7) 300 200 230 415 485 mΩ mΩ ILIM,PFET Switch peak current limit 935 1100 1200 mA FOSC Internal oscillator frequency 1.7 2 2.3 MHz VIH,EN Logic high input threshold (PWM, LDO) 1.2 VIL,EN Logic low input threshold (PWM, LDO) IPIN,EN PWM Pin pull down current Gain VCON to VOUT Gain 0.32V ≤ VCON ≤ 1.44V ICON VCON pin leakage current VCON = 1.0V (1) (2) (3) (4) (5) (6) (7) 4 V 0.5 5 10 2.5 V µA V/V ±1 µA All voltages are with respect to the potential at the GND pins. The LM3207 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Due to the pulsed nature of the testing TA = TJ for the electrical characteristics table. The parameters in the electrical characteristics table are tested under open loop conditions at PVIN = 3.6V. For performance over the input voltage range and closed loop results refer to the datasheet curves. Transient Pull-up current (IPUT) and Transient Pull-down Current (IPDT) will be tested which are inversely proportional to charge and discharge times tLDO, ON and tLDO, OFF respectively. IQ specified here is when the part is operating at 100% duty cycle. Shutdown current includes leakage current of PFET. Current limit is built-in, fixed, and not adjustable. Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 System Characteristics The following spec table entries are guaranteed by design providing the component values in the typical application circuit are used (L = 3.0µH, (DCR = 0.12Ω, FDK MIPW3226D3R0M); CIN = 10µF, (6.3V, 0805, TDK C2012X5R0J106K); COUT = 4.7µF, (6.3V, 0603, TDK C1608X5R0J475M); CLDO = 100nF, (10V, 0402, TDK C1005X5R1A104KT) (or 220nF, (6.3V, 0402, TDK C1005X5R0J224KT))) . These parameters are not guaranteed by production testing. Min and Max values are specified over the VIN range = 2.7V to 5.5V and over the ambient temp range TA = −30°C to 85°C unless otherwise specified. Typical values are specified at PVIN = EN = 3.6V and TA = 25°C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units PSRR Power Supply Rejection Ratio Offset Freq = 1Khz, Cout = 100nF, Iout = 1mA, PVin = Vout(nom) + 0.5V 50 dB VLDO(NOISE) Output Noise Voltage BW = 10Hz to 100Khz, Iout = 1mA 30 uVrms tLDO, ON Time to reach 90% of VLDO(nom) after ENLDO signal goes high. CLDO = 100nF, PWM mode assumed to be fully functional before ENLDO goes high. PVin = 3V, RLOAD = 562 Ω (1) 3 uS CLDO = 220nF, PWM mode assumed to be fully functional before ENLDO goes high. PVin = 3V, RLOAD = 562 Ω (1) 5 uS CLDO = 100nF, PVin = 3V, Iout = 0mA 3 CLDO = 220nF, PVin = 3V, Iout = 0mA 5 LDO tLDO, OFF Time to reach 10% of VLDO(nom) after ENLDO signal goes low. (1) uS (1) Switcher TRESPONSE (Rise time) Time for VOUT to rise from 0.8V to 3.6V PVIN = 4.2V, COUT = 4.7uF, L = 3.0uH, RLOAD = 5.5Ω 20 30 µs TRESPONSE (Fall time) Time for VOUT to fall from 3.6V to 0.8V PVIN = 4.2V, COUT = 4.7uF, L = 3.0uH, RLOAD = 10Ω 20 30 µs CCON VCON input capacitance VCON = 1V, Test frequency = 100 kHz 20 pF VCON Linearity Linearity in control range 0.32V to 1.44V PVIN = 3.9V, Monotonic in nature +3 % T_ON Turn on time (time for output to reach 3.6V from Enable low to high transition) EN = Low to High, PVIN = 4.2V, VO = 3.6V, COUT = 4.7µF, IOUT ≤ 1mA 70 100 µs Efficiency (L = 3.0µH, DCR ≤ 100mΩ) PVIN = 3.6V, VOUT = 0.8V, IOUT = 90mA 81 % PVIN = 3.9V, VOUT = 3.4V, IOUT = 400mA 95 % VO_ripple Ripple voltage, PWM mode PVIN = 3V to 4.5V, VOUT = 0.8V, IOUT = 10mA to 400mA, (2) 10 mVp-p Line_tr Line transient response PVIN = 600mV perturbance, TRISE = TFALL = 10µs, VOUT = 0.8V, IOUT = 100mA 50 mV PVIN = 3.1/3.6/4.5V, VOUT = 0.8V, transients up to 100mA, TRISE = TFALL = 10µs 50 mV η Load_tr (1) (2) Load transient response -3 Transient Pull-up current (IPUT) and Transient Pull-down Current (IPDT) will be tested which are inversely proportional to charge and discharge times tLDO, ON and tLDO, OFF respectively. Ripple voltage should measured at COUT electrode on good layout PC board and under condition using suggested inductors and capacitors. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 5 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com Typical Performance Characteristics (Circuit in Figure 3, See Operation Description Section), PVIN = EN = 3.6V, L = 3.0µH, (DCR = 0.12Ω, FDK MIPW3226D3R0M); CIN = 10µF, (6.3V, 0805, TDK C2012X5R0J106K); COUT = 4.7µF, (6.3V, 0603, TDK C1608X5R0J475M), CLDO = 100nF, 10V, (0402, TDK C1005X5R1A104KT) (or 220nF, (6.3V, 0402, TDK C1005X5R0J224KT)) can be used. TA = 25°C unless otherwise specified. LDO Typical Performance Curves (2.875 Option) LDO Voltage vs Load Current (CLDO = 100nF) LDO Dropout Voltage vs Load Current (CLDO = 100nF), (1) LDO Short Circuit Current vs Voltage (VIN = 3.0V, CLDO = 100nF) LDO Output Noise Density (ILOAD = 1mA, CLDO = 100nF and 220nF) LDO Power Supply Rejection Ratio (VIN = Vout(nom) + 0.5V, CLDO = 100nF) LDO Turn On Time vs VIN (CLDO = 100nF) 50 RIPPLE REJECTION (dB) 40 ILOAD = 1mA 30 20 10 0 -10 -20 -30 -40 -50 100 1k 10k 100k 1M FREQUENCY (Hz) (1) 6 Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 LDO Typical Performance Curves (2.875 Option) (continued) LDO Turn Off Time vs VIN (CLDO = 100nF) LDO Line Transient Response (VIN = 3.0V to 3.6V, ILOAD = 10mA, CLDO = 100nF) IL = 0 mA 1.4 TA = 25°C TOFF (Ps) 1.2 TA = -30°C 1.0 TA = 85°C 0.8 0.6 3.0 3.5 4.0 4.5 5.0 5.5 PVIN (V) LDO Load Transient Repsonse (VIN= 3.2V, VOUT = 0.8V, CLDO = 100nF) (VIN LDO VLDO Out vs Temperature = 3.6V,CLDO = 100nF) Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 7 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com LDO Typical Performance Curves (2.53 Option) LDO Voltage vs Load Current (CLDO = 100nF) LDO Dropout Voltage vs Load Current (CLDO = 100nF), (1) 2.53 VLDO OUT (V) VIN = 5.5V DROPOUT VOLTAGE (mV) VIN = 3.6V VIN = 4.2V 2.52 VIN = 3.0V VIN = 3.2V 2.51 0 5 10 15 20 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 -200 TA = -30°C TA = 85°C TA = 25°C 0 2 4 6 8 10 LOAD CURRENT (mA) LDO LOAD CURRENT (mA) LDO Short Circuit Current vs Voltage (VIN = 3.0V, CLDO = 100nF) LDO Power Supply Rejection Ratio (VIN = Vout(nom) + 0.5V, CLDO = 100nF) 10 60 0 RIPPLE REJECTION (dB) TA = 25°C 50 ISC (mA) 40 TA = 85°C 30 TA = -30°C 20 10 0 0.0 8 -20 -30 -40 -50 -60 -70 0.5 1.0 1.5 2.0 2.5 3.0 1 10 100 1000 FREQUENCY (kHz) VLDO (V) (1) ILOAD = 1 mA -10 Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 LDO Typical Performance Curves (2.53 Option) (continued) LDO Turn On Time vs VIN (CLDO = 100nF) LDO Turn Off Time vs VIN (CLDO = 100nF) 1.6 1.2 ILOAD = 5 mA ILOAD = 0 mA 1.1 1.4 TA = 85°C TA = 25°C 1.0 1.2 0.9 TOFF (Ps) TON (Ps) TA = -30°C 0.8 0.7 TA = -30°C 1.0 0.8 TA = 85°C 0.6 0.6 TA = 25°C 0.5 0.4 0.4 3.0 3.5 4.0 4.5 5.0 5.5 3.0 3.5 4.0 4.5 5.0 5.5 PVIN (V) PVIN (V) (VIN 2.536 LDO VLDO Out vs Temperature = 3.6V,CLDO = 100nF) ILOAD = 0 mA ILOAD = 5 mA ILOAD = 1 mA VLDO OUT (V) 2.534 ILOAD = 10 mA 2.532 2.530 2.528 VIN = 3.6V 2.526 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 9 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com SWITCHER Typical Performance Curves Quiescent Current vs Supply Voltage (VCON = 2V, FB = 0V, No Switching, LDO Disabled) Quiescent Current vs Supply Voltage (VCON = 2V, FB = 0V, No Switching, LDO Enabled) Shutdown Current vs Temperature (VCON = 0V, EN = 0V) Switching Frequency vs Temperature (VOUT = 1.3V, IOUT = 200mA) SWITCHING FREQUENCY VARIATION (%) 4.0 3.0 VIN = 5.5V 2.0 VIN = 4.2V 1.0 0.0 -1.0 VIN = 3.6V -2.0 VIN = 2.7V -3.0 -4.0 -40 -20 0 20 40 60 80 100 AMBIENT TEMPERATURE (oC) Output Voltage Regulation(%) vs Output Load (VOUT = 1.5V) (VIN Output Voltage vs Temperature = 3.6V, VOUT = 0.8V) -0.30 -0.25 REGULATION (%) -0.20 VIN = 3.6V -0.15 -0.10 VIN = 2.7V -0.05 -0.00 -0.05 -0.10 VIN = 5.5V -0.15 VIN = 4.5V -0.20 -0.25 -0.30 0 100 200 300 400 500 600 700 OUTPUT LOAD (mA) 10 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 SWITCHER Typical Performance Curves (continued) (VIN Output Voltage vs Temperature = 3.6V, VOUT = 3.4V) Open/Closed Loop Current Limit vs Temperature (PWM Mode) VCON Voltage vs Output Voltage (VIN = 4.2V, RLOAD = 8Ω) Efficiency vs Output Voltage (VIN = 3.9V) Efficiency vs Output Current (VOUT = 0.8V) Efficiency vs Output Current (VOUT = 3.4V) Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 11 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com SWITCHER Typical Performance Curves (continued) Load Transient Response (VOUT = 0.8V) Load Transient Response (VIN = 4.2V, VOUT = 3.4V) Startup (VIN = 3.6V, VOUT = 1.3V, RLOAD = 1kΩ) Startup (VIN = 4.2V, VOUT = 3.4V, RLOAD = 5kΩ) Shutdown Response (VIN = 4.2V, VOUT = 3.4V, RLOAD = 10Ω) Line Transient Reponse (VIN = 3.0V to 3.6V, IOUT = 100mA) VSW 5V/DIV VIN = 4.2V VOUT VOUT = 3.4V RL = 10: 2V/DIV IL 500 mA/DIV 2V/DIV EN 40 Ps/DIV (VIN VCON Voltage Response = 4.2V, VCON = 0.32V/1.44V, RLOAD = 10Ω) VSW VCON and Load Transient (VIN = 4.2V, VCON = 0.32V/1.44V, RLOAD = 15Ω/8Ω) 2V/DIV 2V/DIV VSW 3.6V VOUT VIN = 4.2V VCON = 0.32/1.44V RL = 10: 3.6V VOUT 0.8V VIN = 4.2V VCON = 0.32/1.44V RL = 15:/8: 1.44V VCON 0.32V 1.44V VCON 40 Ps/DIV 12 0.8V 0.32V 40 Ps/DIV Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 SWITCHER Typical Performance Curves (continued) Timed Current Limit Response (VIN = 3.6V) Output Voltage Ripple (VOUT = 1.3V) Output Voltage Ripple (VOUT = 3.4V) Output Voltage Ripple in Pulse Skip (VIN = 3.64V, VOUT = 3.4V, RLOAD = 5Ω) VSW 2V/DIV VSW VIN = 3.64V 2V/DIV VOUT = 3.4V RL = 5: VIN = 4.2V VOUT = 3.4V IOUT = 200 mA VOUT 10 mV/DIV AC Coupled VOUT 10 mV/DIV AC Coupled IL 500 mA/DIV IL 500 mA/DIV 400 ns/DIV 400 ns/DIV RDSON vs Temperature (microSMD) (P-ch, ISW = 200mA) RDSON vs Temperature (microSMD) (N-ch, ISW = -200mA) Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 13 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com SWITCHER Typical Performance Curves (continued) EN High Threshold vs VIN 14 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 Block Diagram PVIN CURRENT SENSE OSCILLATOR ERROR AMPLIFIER FB ~ PWM COMP MOSFET CONTROL LOGIC VCON SW MAIN CONTROL EN SHUTDOWN CONTROL PGND PVIN Active Charge Control Vref LDO LDO Control (Over Current and Thermal Protection) ENLDO Active Discharge Control PGND Figure 2. Functional Block Diagram Operation Description The LM3207 is a simple, step-down DC-DC converter with a VREF LDO optimized for powering RF power amplifiers (PAs) in mobile phones, portable communicators, and similar battery powered RF devices. The DC-DC converter is designed to allow the RF PA to operate at maximum efficiency over a wide range of power levels from a single Lithium-Ion battery cell. The DC-DC is based on current-mode buck architecture, with synchronous rectification for high efficiency. It is designed for a maximum load capability of 650mA in PWM mode. Maximum load range may vary from this depending on input voltage, output voltage and the inductor chosen. The device has two pin-selectable operating modes required for powering RF PAs in mobile phones and other sophisticated portable devices. Fixed-frequency PWM operation offers regulated output at high efficiency while minimizing interference with sensitive IF and data acquisition circuits. Shutdown mode turns the device off and reduces battery consumption to 0.01uA (typ). Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 15 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com Efficiency is typically around 95% for a 400mA load with 3.9VIN, 3.4VOUT. The output voltage is dynamically programmable from 0.8V (typ) to 3.6V (typ) by adjusting the voltage on the control pin without the need for external feedback resistors. This ensures longer battery life by being able to change the PA supply voltage dynamically depending on its transmitting power. Additional features include current overload protection, and thermal overload shutdown. The LM3207 is constructed using a chip-scale 9-pin micro SMD package. This package offers the smallest possible size, for space-critical applications such as cell phones, where board area is an important design consideration. Use of a high switching frequency (2MHz) reduces the size of external components. As shown in Figure 1, only four external power components are required for implementation. Use of a micro SMD package requires special design considerations for implementation. (See Micro SMD Package Assembly and use in the Applications Information section.) The fine bump-pitch requires careful board design and precision assembly equipment. Use of this package is best suited for opaque-case applications, where its edges are not subject to high-intensity ambient red or infrared light. Also, the system controller should set EN low during power-up and other low supply voltage conditions. (See Shutdown Mode in the Device Information section.) VIN 10 PF TX_ON/OFF EN R F I C DAC VCON RF_ON/OFF ENLDO 3.3 PH PVIN SW FB LM3207 VCC 4.7 PF RFin PA VREF LDO 100 nF Figure 3. Typical Application Circuit Circuit Operation (DC-DC Converter) Referring to Figure 1 and Figure 2, the LM3207 operates as follows. During the first part of each switching cycle, the control block in the LM3207 turns on the internal PFET (P-channel MOSFET) switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around (PVIN - VOUT) / L, by storing energy in a magnetic field. During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-channel MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around VOUT / L. The output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. 16 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 PWM Operation While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by comparing the signal from the current-sense amplifier with a slope compensated error signal from the voltage-feedback error amplifier. At the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. Before appearing at the PWM comparator, a slope compensation ramp from the oscillator is subtracted from the error signal for stability of the current feedback loop. The minimum on time of PFET in PWM mode is 50ns (typ.) Shutdown Mode Setting the EN digital pin low (1.2V) enables normal operation. EN should be set low to turn off the LM3207 during power-up and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The LM3207 is designed for compact portable applications, such as mobile phones. In such applications, the system controller determines power supply sequencing and requirements for small package size outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry. Internal Synchronous Rectification While in PWM mode, the LM3207 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across and ordinary rectifier diode. The internal NFET synchronous rectifier is turned on during the inductor current down slope in the second part of each cycle. The synchronous rectifier is turned off prior to the next cycle. The NFET is designed to conduct through its intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. Current Limiting A current limit feature allows the LM3207 to protect itself and external components during overload conditions. In PWM mode, a 1200mA (max.) cycle-by-cycle current limit is normally used. If an excessive load pulls the output voltage down to approximately 0.375V, then the device switches to a timed current limit mode. In timed current limit mode the internal PFET switch is turned off after the current comparator trips and the beginning of the next cycle is inhibited for 3.5us to force the instantaneous inductor current to ramp down to a safe value. The synchronous rectifier is off in timed current limit mode. Timed current limit prevents the loss of current control evident in some products when the output voltage is pulled low in serious overload conditions. Dynamically Adjustable Output Voltage The LM3207 features dynamically adjustable output voltage to eliminate the need for external feedback resistors. The output can be set from 0.8V(typ.) to 3.6V(typ.) by changing the voltage on the analog VCON pin. This feature is useful in PA applications where peak power is needed only when the handset is far away from the base station or when data is being transmitted. In other instances the transmitting power can be reduced. Hence the supply voltage to the PA can be reduced, promoting longer battery life. See Setting the Output Voltage in the Application Information section for further details. Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 17 LM3207 SNVS400A – AUGUST 2006 – REVISED APRIL 2007 www.ti.com Thermal Overload Protection The LM3207 has a thermal overload protection function that operates to protect itself from short-term misuse and overload conditions. When the junction temperature exceeds 150°C, the device inhibits operation. The PFET and NFET are turned off in PWM mode. The LDO is turned off as well. When the temperature drops below 130°C, normal operation resumes. Prolonged operation in thermal overload conditions may damage the device and is considered bad practice. LDO Operation An LDO is used to provide a regulated Vref supply to a RF PA with a fixed voltage. The LDO can be enabled only after the PWM is running. The LDO will automatically be disabled whenever the EN or ENLDO is disabled. Included in the LDO are active charge and discharge circuits to quickly move a 100nF capacitor to meet the 3us timing requirements, or an 220nF capacitor to meet the 5us timing requirements. The charging and discharging currents are controlled to minimize supply disturbances. The LM3207 was designed specifically to work with a 100nF or a 220nF ceramic capacitor and no bypass capacitor. See Ordering Information table on page 2 for Voltage Options. Application Information SETTING THE DC-DC CONVERTER OUTPUT VOLTAGE The LM3207 features a pin-controlled variable output voltage to eliminate the need for external feedback resistors. It can be programmed for an output voltage from 0.8V (typ.) to 3.6V (typ.) by setting the voltage on the VCON pin, as in the following formula: VOUT = 2.5 x VCON (2) When VCON is between 0.32V and 1.44V, the output voltage will follow proportionally by 2.5 times of VCON. If VCON is over 1.44V (VOUT = 3.6V), sub-harmonic oscillation may occur because of insufficient slope compensation. If VCON voltage is less than 0.32V (VOUT = 0.8V), the output voltage may not be regulated due to the required on-time being less than the minimum on-time (50ns). The output voltage can go lower than 0.8V providing a limited VIN range is used. Refer to datasheet curve (VCON Voltage vs Output Voltage) for details. This curve is for a typical part and there could have part-to-part variation for output voltages less than 0.8V over the limited VIN range. LDO CAPACITOR SELECTION The output capacitor should be connected between the LDO output and a good ground connection. This capacitor must be selected within specified capacitance range and have sufficiently low ESR. The ESR of the capacitor is generally a major factor in LDO stability. Refer to manufacturer ESR curves for more detail. Table 2 suggests acceptable capacitors and their suppliers. Table 2. Suggested capacitors and their suppliers Model Vendor C1005X5R1A104KT, 100nF, 10V TDK C1005X5R0J224KT, 220nF, 6.3V TDK INDUCTOR SELECTION A 3.3µH inductor with saturation current rating over 1200mA and low inductance drop at the full DC bias condition is recommended for almost all applications. The inductor’s DC resistance should be less than 0.2Ω for good efficiency. For low dropout voltage, lower DCR inductors are advantageous. The lower limit of acceptable inductance is 1.7µH at 1200mA over the operating temperature range. Full attention should be paid to this limit, because some small inductors show large inductance drops at high DC bias. These can not be used with the LM3207. Table 3 suggests some inductors and suppliers. Table 3. Suggested inductors and their suppliers Model NR3015T3R3M 18 Size (WxLxH) [mm] 3.0 x 3.0 x 1.5 Submit Documentation Feedback Vendor Taiyo-Yuden Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Links: LM3207 LM3207 www.ti.com SNVS400A – AUGUST 2006 – REVISED APRIL 2007 Table 3. Suggested inductors and their suppliers (continued) Model Size (WxLxH) [mm] Vendor DO3314-332MXC 3.3 x 3.3 x 1.4 Coilcraft MIPW3226D3R0M 3.2 x 2.6 x 1.0 FDK If a smaller inductance inductor is used in the application, the LM3207 may become unstable during line and load transients and VCON transient response times may be affected. For low-cost applications, an unshielded bobbin inductor is suggested. For noise critical applications, a toroidal or shielded-bobbin inductor is recommended. A good practice is to layout the board with footprints accommodating both types for design flexibility. This allows substitution of a low-noise toroidal inductor, in the event that noise from low-cost bobbin models is unacceptable. Saturation occurs when the magnetic flux density from current through the windings of the inductor exceeds what the inductor’s core material can support with a corresponding magnetic field. This can result in poor efficiency, regulation errors or stress to DC-DC converter like the LM3207. DC-DC CONVERTER CAPACITOR SELECTION The LM3207 is designed with a ceramic capacitor for its input and output filters. Use a 10µF ceramic capacitor for input and a 4.7µF ceramic capacitor for output. They should maintain at least 50% capacitance at DC bias and temperature conditions. Ceramic capacitors types such as X5R, X7R are recommended for both filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones and similar applications. Table 4 lists suggests acceptable part numbers and their suppliers. DC bias characteristics of the capacitors must be considered when selecting the voltage rating and case size of the capacitor. If it is necessary to choose a 0603-size capacitor for VIN, the operation of the LM3207should be carefully evaluated on the system board. Output capacitors with smaller case sizes mitigate piezo electric vibrations when the output voltage is stepped up and down at fast rates. However, they have a larger percentage drop in value with dc bias. Use of multiple 2.2µF or 1µF capacitors in parallel may also be considered. Table 4. Suggested capacitors and their suppliers Model Vendor 0805ZD475KA, 4.7µF, 10V Taiyo-Yuden C1608X5R0J475M, 4.7uF, 6.3V TDK C1608X5R0J106M, 10µF, 6.3V TDK C2012X5R0J106M, 10uF, 6.3V TDK C2012X5R1A475M, 4.7uF, 6.3V TDK The input filter capacitor supplies AC current drawn by the PFET switch of the LM3207 in the first part of each cycle and reduces the voltage ripple imposed on the input power source. The output filter capacitor absorbs the AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR (Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a factor in voltage ripple. EN PIN CONTROL Drive the EN and ENLDO pins using the system controller to turn the LM3207 ON and OFF. Use a comparator, Schmidt trigger or logic gate to drive the EN and ENLDO pins. Set EN high (>1.2V) for normal operation and low (
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