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LM3489MM

LM3489MM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    VSSOP8

  • 描述:

    IC REG CTRLR BUCK 8VSSOP

  • 数据手册
  • 价格&库存
LM3489MM 数据手册
Sample & Buy Product Folder Support & Community Tools & Software Technical Documents Reference Design LM3489, LM3489-Q1 SNVS443C – MAY 2006 – REVISED DECEMBER 2016 LM3489x Hysteretic PFET Buck Controller With Enable Pin 1 Features 3 Description • • The LM3489 device is a high-efficiency PFET switching regulator controller that can be used to quickly and easily develop a small, cost-effective, switching buck regulator for a wide range of applications. The hysteretic control architecture provides for simple design without any control loop stability concerns using a wide variety of external components. The PFET architecture also allows for low component count as well as ultra-low dropout, 100% duty cycle operation. Another benefit is high efficiency operation at light loads without an increase in output ripple. A dedicated enable pin provides a shutdown mode drawing only 7 µA. Leaving the enable pin unconnected defaults to on. 1 • • • • • • • • • • • • • Qualified for Automotive Parts AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C5 Easy-to-Use Control Methodology No Control Loop Compensation Required Wide 4.5-V to 35-V Input Range 1.239 V to VIN Adjustable Output Range High Efficiency: 93% ±1.3% (±2% Over Temperature) Internal Reference 100% Duty Cycle Operation Maximum Operation Frequency > 1 MHz Current Limit Protection Dedicated Enable Pin (on if Unconnected) Shutdown Mode Draws Only 7-µA Supply Current 8-Pin VSSOP Package Current limit protection can be implemented by measuring the voltage across the PFET’s RDS(ON), thus eliminating the need for a sense resistor. A sense resistor may be used to improve current limit accuracy if desired. The cycle-by-cycle current limit can be adjusted with a single resistor, ensuring safe operation over a range of output currents. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) 2 Applications LM3489 LM3489-Q1 • • • • • • • • • • (1) For all available packages, see the orderable addendum at the end of the data sheet. Set-Top Boxes DSL or Cable Modems PC/IA Auto PCs TFT Monitors Battery-Powered Portable Applications Distributed Power Systems Always-On Power High-Power LED Drivers Automotive VSSOP (8) 3.00 mm × 3.00 mm Typical Application Circuit L C ADJ R ADJ VIN V OUT Q1 RIS 7 D1 1 PGATE + 5 CIN1 8 3 CIN2 ISENSE ADJ VIN EN LM3489 FB GND PGND Cff R1 + C OUT 4 2 R2 6 Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM3489, LM3489-Q1 SNVS443C – MAY 2006 – REVISED DECEMBER 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 5 6 Absolute Maximum Ratings ...................................... ESD Ratings: LM3489 .............................................. ESD Ratings: LM3489-Q1 ........................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 9 7.1 Overview ................................................................... 9 7.2 Functional Block Diagram ......................................... 9 7.3 Feature Description................................................... 9 7.4 Device Functional Mode ......................................... 14 8 Application and Implementation ........................ 15 8.1 Application Information............................................ 15 8.2 Typical Application .................................................. 15 9 Power Supply Recommendations...................... 19 10 Layout................................................................... 19 10.1 Layout Guidelines ................................................. 19 10.2 Layout Examples................................................... 19 11 Device and Documentation Support ................. 20 11.1 11.2 11.3 11.4 11.5 11.6 Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 20 20 20 20 20 20 12 Mechanical, Packaging, and Orderable Information ........................................................... 20 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (February 2013) to Revision C Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Added AEC-Q100 Qualification bullets to Features ............................................................................................................... 1 • Deleted Lead temperature (Vapor phase and Infrared maximums) ....................................................................................... 4 • Added Thermal Information table ........................................................................................................................................... 5 Changes from Revision A (February 2013) to Revision B • 2 Page Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: LM3489 LM3489-Q1 LM3489, LM3489-Q1 www.ti.com SNVS443C – MAY 2006 – REVISED DECEMBER 2016 5 Pin Configuration and Functions DGK Package 8-Pin VSSOP Top View ISENSE 1 8 VIN GND 2 7 PGATE EN 3 6 PGND FB 4 5 ADJ Not to scale Pin Functions PIN NO. NAME I/O DESCRIPTION The current sense input pin. This pin must be connected to the PFET drain terminal directly or through a series resistor up to 600 Ω for 28 V > VIN > 35 V. 1 ISENSE I 2 GND — 3 EN I Enable pin. Connect EN pin to ground to shutdown the part or float to enable operation (Internally pulled high). This pin can also be used to perform UVLO function. 4 FB I The feedback input. Connect the FB to a resistor voltage divider between the output and GND for an adjustable output voltage. 5 ADJ I Current limit threshold adjustment. Connected to an internal 5.5-µA current source. A resistor is connected between this pin and VIN. The voltage across this resistor is compared with the ISENSE pin voltage to determine if an overcurrent condition has occurred. 6 PGND — Power ground 7 PGATE O Gate drive output for the external PFET. PGATE swings between VIN and VIN 5-V. 8 VIN I Power supply input pin Signal ground Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: LM3489 LM3489-Q1 Submit Documentation Feedback 3 LM3489, LM3489-Q1 SNVS443C – MAY 2006 – REVISED DECEMBER 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings See (1) . MIN MAX UNIT VIN voltage –0.3 36 V PGATE voltage –0.3 36 V FB voltage –0.3 5 V –1 36 ISENSE voltage ADJ voltage EN voltage V –1 ( 28 V) an increased negative SW transient spike at the switch node can lead to an increase in the current limit threshold due to the formation of the parasitic NPN connection between the ISENSE pin, the internal substrate and the ADJ pin . To avoid this issue, a Schottky catch diode with lower forward voltage drop must be used. In addition to that, a resistor must be placed between the ISENSE pin and the external switch node. A resistor value in the range of 220 Ω to 600 Ω is recommended. 10 Layout 10.1 Layout Guidelines The PCB layout is very important in all switching regulator designs. Poor layout can cause switching noise into the feedback signal and generate EMI problems. For minimal inductance, the wires indicated by heavy lines in schematic diagram must be as wide and short as possible. Keep the ground pin of the input capacitor as close as possible to the anode of the catch diode. This path carries a large AC current. The switching node, the node with the diode cathode, inductor and FET drain must be kept short. This node is one of the main sources for radiated EMI since it sees a large AC voltage at the switching frequency. It is always a good practice to use a ground plane in the design, particularly for high-current applications. The two ground pins, PGND and GND, must be connected by as short a trace as possible. They can be connected underneath the device. These pins are resistively connected internally by approximately 50 Ω. The ground pins must be tied to the ground plane, or to a large ground trace in close proximity to both the FB divider and COUT grounds. The gate pin of the external PFET must be placed close to the PGATE pin. However, if a very small FET is used, a resistor may be required between PGATE pin and the gate of the PFET to reduce high-frequency ringing. Because this resistor will slow down the PFET’s rise time, the current limit blanking time must be taken into consideration (see Current Limit Operation). The feedback voltage signal line can be sensitive to noise. Avoid inductive coupling with the inductor or the switching node. The FB trace must be kept away from those areas. Also, the orientation of the inductor can contribute un-wanted noise coupling to the FB path. If noise problems are observed it may be worth trying a different orientation of the inductor and select the best for final component placement. 10.2 Layout Examples SPACE Figure 30. LM3489 EVM PCB Top Layer Layout Figure 31. LM3489 EVM PCB Bottom Layer Layout Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: LM3489 LM3489-Q1 Submit Documentation Feedback 19 LM3489, LM3489-Q1 SNVS443C – MAY 2006 – REVISED DECEMBER 2016 www.ti.com 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LM3489 Click here Click here Click here Click here Click here LM3489-Q1 Click here Click here Click here Click here Click here 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.4 Trademarks E2E is a trademark of Texas Instruments. Simple Switchers is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 20 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: LM3489 LM3489-Q1 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM3489MM NRND VSSOP DGK 8 1000 Non-RoHS & Green Call TI Level-1-260C-UNLIM -40 to 125 SKSB LM3489MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green NIPDAUAG | SN Level-1-260C-UNLIM -40 to 125 SKSB LM3489MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green NIPDAUAG | SN Level-1-260C-UNLIM -40 to 125 SKSB LM3489QMM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 STEB LM3489QMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 STEB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
LM3489MM 价格&库存

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