LM3528
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SNVS513B – AUGUST 2008 – REVISED MAY 2013
LM3528 High Efficiency, Multi Display LED Driver with 128 Exponential Dimming Steps
and Integrated OLED Power Supply in a 1.2mm × 1.6mm DSBGA Package
Check for Samples: LM3528
FEATURES
APPLICATIONS
•
•
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•
•
1
2
•
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•
•
•
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128 Exponential Dimming Steps
Programmable Auto-Dimming Function
Up to 90% Efficient
Low Profile 12 Bump DSBGA Package (1.2mm
x 1.6mm x 0.6mm)
Integrated OLED Display Power Supply and
LED Driver
Programmable Pattern Generator Output for
LED Indicator Function
Drives up to 12 LED’s at 20mA
Drives up to 5 LED’s at 20mA and delivers 18V
at 40mA
1% Accurate Current Matching Between
Strings
Internal Soft-Start Limits Inrush Current
True Shutdown Isolation for LED’s
Wide 2.5V to 5.5V Input Voltage Range
22V Over-Voltage Protection
1.25MHz Fixed Frequency Operation
Dedicated Programmable General Purpose I/O
Active Low Hardware Reset
10 PH
2.7V to 5.5V
IN
The LM3528 current mode boost converter offers two
separate outputs. The first output (MAIN) is a
constant current sink for driving series white LED’s.
The second output (SUB/FB) is configurable as a
constant current sink for series white LED bias, or as
a feedback pin to set a constant output voltage for
powering OLED panels.
As a dual output white LED bias supply, the LM3528
adaptively regulates the supply voltage of the LED
strings to maximize efficiency and insure the current
sinks remain in regulation. The maximum current per
output is set via a single external low power resistor.
An I2C compatible interface allows for independent
adjustment of the LED current in either output from 0
to max current in 128 exponential steps. When
configured as a white LED + OLED bias supply the
LM3528 can independently and simultaneously drive
a string of up to 6 white LED’s and deliver a constant
output voltage of up to 21V for OLED panels.
SW
OVP
C
1 PF
4.4mm
VIO
DESCRIPTION
20 mA per string
CIN
1 PF
10 k:
•
•
•
Dual Display LCD Backlighting for Portable
Applications
Large Format LCD Backlighting
OLED Panel Power Supply
Display Backlighting with Indicator Light
LM3528
10 k:
MAIN
SCL
SDA
SUB/FB
HWEN/PGEN/
GPIO
GPIO
Current
Limiting
Resistor
SET
GND
RSET
1 M:
12.1 k:
6.5mm
Indicator
LED
Dual White LED Bias Supply with Indicator LED
Figure 1. Typical Application Circuit
Figure 2. Typical PCB Layout
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM3528
SNVS513B – AUGUST 2008 – REVISED MAY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
Output over-voltage protection shuts down the device if VOUT rises above 22V allowing for the use of small sized
low voltage output capacitors. Other features include a dedicated general purpose I/O (GPIO) and a multifunction pin (HWEN/PGEN/GPIO) which can be configured as a 32 bit pattern generator, a hardware enable
input, or as a GPIO. When configured as a pattern generator, an arbitrary pattern is programmed via the I2C
compatible interface and output at HWEN/PGEN/GPIO for indicator LED flashing or for external logic control.
The LM3528 is offered in a tiny 12-bump DSBGA package and operates over the -40°C to +85°C temperature
range.
Connection Diagram
Top View
A1
A2
A3
B1
B2
B3
C1
C2
C3
D1
D2
D3
Figure 3. 12-Bump (1.215mm × 1.615mm × 0.6mm) YFQ0012
PIN DESCRIPTIONS
Pin
Name
A1
OVP
Over-Voltage Protection Sense Connection. Connect OVP to the positive terminal of the output
capacitor.
A2
MAIN
Main Current Sink Input.
A3
SUB/FB
Secondary Current Sink Input or 1.21V Feedback Connection for Constant Voltage Output.
B1
GPIO1
Programmable General Purpose I/O.
B2
SCL
Serial Clock Input
B3
SET
LED Current Setting Connection. Connect a resistor from SET to GND to set the maximum LED
current into MAIN or SUB/FB (when in LED mode), where ILED_MAX = 192×1.244V/RSET.
C1
Function
HWEN/PGEN/GPI Active High Hardware Enable Input. Programmable Pattern Generator Output, and Programmable
O
General Purpose I/O.
C2
SDA
C3
IN
Serial Data Input/Output
D1
VIO
Logic Voltage Level Input
D2
SW
Drain Connection for Internal NMOS Switch
D3
GND
Ground
Input Voltage Connection. Connect IN to the input supply, and bypass to GND with a 1µF ceramic
capacitor.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings
(1) (2) (3)
−0.3V to 6V
VIN
VSW, VOVP,
−0.3V to 25V
VSUB/FB, VMAIN
−0.3V to 23V
−0.3V to 6V
VSCL, VSDA, VRESET\GPIO, VIO , VSET
Continuous Power Dissipation
Internally Limited
Junction Temperature (TJ-MAX)
+150°C
Storage Temperature Range
-65°C to +150°C
Maximum Lead Temperature (Soldering, 10s) (4)
+300°C
ESD Rating (5)
Human Body Model
(1)
(2)
(3)
(4)
(5)
2.5kV
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
All voltages are with respect to the potential at the GND pin.
For detailed soldering specifications and information, please refer to Texas Instruments Application Note 1112: DSBGA Wafer LEvel
Chip Scale Package (SNVA009).
The human body model is a 100pF capacitor discharged through 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7).
Operating Ratings
(1) (2)
VIN
2.5V to 5.5V
VSW, VOVP,
0V to 23V
VSUB/FB, VMAIN
0V to 21V
Junction Temperature Range (TJ) (3)
-40°C to +110°C
Ambient Temperature Range (TA) (4)
-40°C to +85°C
(1)
(2)
(3)
(4)
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
All voltages are with respect to the potential at the GND pin.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+150°C (typ.) and
disengages at TJ=+140°C (typ.).
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP
= +105°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of
the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Thermal Properties
Junction to Ambient Thermal Resistance (θJA) (1)
(1)
68°C/W
Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 114.3mm x 76.2mm x 1.6mm. The ground
plane on the board is 113mm x 75mm. Thickness of copper layers are 71.5µm/35µm/35µm/71.5µm (2oz/1oz/1oz/2oz). Ambient
temperature in simulation is 22°C, still air. Power dissipation is 1W. For more information on these topics, please refer to Texas
Instruments Application Note 1112 SNVA009, and JEDEC Standard JESD51-7.
Electrical Characteristics
Specifications in standard type face are for TA = 25°C and those in boldface type apply over the Operating Temperature
Range of TA = −40°C to +85°C. Unless otherwise specified VIN = 3.6V, VIO = 1.8V, VRESET/GPIO = VIN, VSUB/FB = VMAIN = 0.5V,
R = 12.0kΩ, OLED = ‘0’, ENM = ENS = ‘1’, BSUB = BMAIN = Full Scale. (1) (2)
SET
Symbol
ILED
(1)
(2)
Parameter
Conditions
Output Current Regulation
MAIN or SUB/FB Enabled
UNI = ‘0’, or ‘1’,
2.5V < VIN < 5.5V
Maximum Current Per
Current Sink
RSET = 8.0kΩ
Min
18.5
Typ
Max
20
22
30
Units
mA
All voltages are with respect to the potential at the GND pin.
Min and Max limits are ensured by design, test, or statistical analysis. Typical (Typ) numbers are not ensured, but represent the most
likely norm.
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Electrical Characteristics (continued)
Specifications in standard type face are for TA = 25°C and those in boldface type apply over the Operating Temperature
Range of TA = −40°C to +85°C. Unless otherwise specified VIN = 3.6V, VIO = 1.8V, VRESET/GPIO = VIN, VSUB/FB = VMAIN = 0.5V,
R = 12.0kΩ, OLED = ‘0’, ENM = ENS = ‘1’, BSUB = BMAIN = Full Scale.(1) (2)
SET
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.15
1
%
ILED-MATCH
IMAIN to ISUB/FB Current
Matching
UNI = ‘1’,
2.5V < VIN < 5.5V
VSET
SET Pin Voltage
3.0V < VIN < 5V
ILED/ISET
ILED Current to ISET Current
Ratio
192
VREG_CS
Regulated Current Sink
Headroom Voltage
500
VREG_OLED
VSUB/FB Regulation Voltage in 2.5V < VIN < 5.5V, OLED =
OLED Mode
‘1’
VHR
Current Sink Minimum
Headroom Voltage
RDSON
NMOS Switch On Resistance ISW = 100mA
ICL
NMOS Switch Current Limit
2.5V < VIN < 5.5V
645
770
900
VOVP
Output Over-Voltage
Protection
ON Threshold,
2.5V < VIN < 5.5V
20.6
22
23
OFF Threshold,
2.7V < VIN < 5.5V
19.25
20.6
21.5
1.0
1.27
1.4
(3)
1.244
1.170
ILED = 95% of nominal
1.21
V
mV
1.237
300
V
mV
Ω
0.43
mA
V
fSW
Switching Frequency
DMAX
Maximum Duty Cycle
90
%
DMIN
Minimum Duty Cycle
10
%
IQ
Quiescent Current, Device
Not Switching
ISHDN
Shutdown Current
MHz
VMAIN and VSUB/FB >
VREG_CS,
BSUB = BMAIN = 0x00, 2.5V
< VIN < 5.5V
350
VSUB/FB > VREG_OLED,
OLED=’1’, ENM=ENS=’0’,
RSET Open,
2.5V < VIN < 5.5V
250
260
ENM = ENS = OLED = '0',
2.5V < VIN < 5.5V
1.8
3
µA
0.5
V
390
µA
HWEN/PGEN/GPIO, GPIO1 Pin Voltage Specifications
VIL
Input Logic Low
2.5V < VIN
0.3V.
Input Capacitor Selection
Choosing the correct size and type of input capacitor helps minimize the input voltage ripple caused by the
switching of the LM3528’s boost converter. For continuous inductor current operation the input voltage ripple is
composed of 2 primary components, the capacitor discharge (delta VQ) and the capacitor’s equivalent series
resistance (delta VESR). These ripple components are found by:
'VQ =
'I L x D
2 x f SW x C IN
and
'VESR = 2 x 'I L x R ESR
where 'I L =
VIN x (VOUT - VIN )
2 x f SW x L x VOUT
(7)
In the typical application circuit a 1µF ceramic input capacitor works well. Since the ESR in ceramic capacitors is
typically less than 5mΩ and the capacitance value is usually small, the input voltage ripple is primarily due to the
capacitive discharge. With larger value capacitors such as tantalum or aluminum electrolytic the ESR can be
greater than 0.5Ω. In this case the input ripple will primarily be due to the ESR.
Output Capacitor Selection
The LM3528’s output capacitor supplies the LED current during the boost converters on time. When the switch
turns off the inductor energy is discharged through the diode supplying power to the LED’s and restoring charge
to the output capacitor. This causes a sag in the output voltage during the on time and a rise in the output
voltage during the off time. The output capacitor is therefore chosen to limit the output ripple to an acceptable
level depending on LED or OLED panel current requirements and input/output voltage differentials. For proper
operation ceramic output capacitors ranging from 1µF to 2.2µF are required.
As with the input capacitor, the output voltage ripple is composed of two parts, the ripple due to capacitor
discharge (delta VQ) and the ripple due to the capacitors ESR (delta VESR). For continuous conduction mode, the
ripple components are found by:
'VQ =
ILED u (VOUT
fSW u VOUT u COUT
'VESR = RESR u
where
24
VIN)
'IL =
and
§ ILED u VOUT
·
+ 'IL¸
¨ VIN
©
¹
VIN u (VOUT
VIN)
2 u fSW u L u VOUT
(8)
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Table 8 lists different manufacturers for various capacitors and their case sizes that are suitable for use with the
LM3528. When configured as a dual output LED driver a 1µF output capacitor is adequate. In OLED mode for
output voltages above 12V a 2.2µF output capacitor is required (see Low Output Voltage Operation (OLED)
Section).
Table 8. Recommended Output Capacitors
Manufacturer
Part Number
Value
Case Size
Voltage Rating
TDK
C1608X5R1E105M
1µF
0603
25V
Murata
GRM39X5R105K25D539
1µF
0603
25V
TDK
C2012X5R1E225M
2.2µF
0805
25V
Murata
GRM219R61E225KA12
2.2µF
0805
25V
Inductor Selection
The LM3528 is designed for use with a 10µH inductor, however 22µH are suitable providing the output capacitor
is increased 2×. When selecting the inductor ensure that the saturation current rating (ISAT) for the chosen
inductor is high enough and the inductor is large enough such that at the maximum LED current the peak
inductor current is less than the LM3528’s peak switch current limit. This is done by choosing:
ISAT >
'IL =
I LED VOUT
+ 'I L
×
K
VIN
VIN x (VOUT - VIN )
2 x f SW x L x VOUT
where
, and
VIN x (VOUT - VIN)
L>
§
2 x f SW x VOUT x ¨
¨I PEAK -
I LED _ MAX x VOUT ·
©
¸¸
¹
K x VIN
(9)
Values for IPEAK can be found in the plot of peak current limit vs. VIN in the Typical Performance Characteristics
graphs. Table 9 shows possible inductors, as well as their corresponding case size and their saturation current
ratings.
Table 9. Recommended Inductors
Manufacture
r
Part Number
Value
Dimensions
ISAT
DC Resistance
TDK
VLF3012AT-100MR49
10µH
2.6mm×2.8mm×1mm
490mA
0.36Ω
Coilcraft
LPS3008-103ML
10µH
2.95mm×2.95mm×0.8mm
490mA
0.65Ω
TDK
VLF4012AT-100MR79
10µH
3.5mm×3.7mm×1.2mm
800mA
0.3Ω
Coilcraft
LPS4012-103ML
10µH
3.9mm×3.9mm×1.1mm
700mA
0.35Ω
TOKO
A997AS-100M
10µH
3.8mm×3.8mm×1.8mm
580mA
0.18Ω
Diode Selection
The output diode must have a reverse breakdown voltage greater than the maximum output voltage. The diodes
average current rating should be high enough to handle the LM3528’s output current. Additionally, the diodes
peak current rating must be high enough to handle the peak inductor current. Schottky diodes are recommended
due to their lower forward voltage drop (0.3V to 0.5V) compared to (0.6V to 0.8V) for PN junction diodes. If a PN
junction diode is used, ensure it is the ultra-fast type (trr < 50ns) to prevent excessive loss in the rectifier. For
Schottky diodes the B05030WS (or equivalent) work well for most designs. See Table 10 for a list of other
Schottky Diodes with similar performance.
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Table 10. Recommended Schottky Diodes
Manufacturer
Part Number
Package
Reverse
Breakdown Voltage
Average
Current
Rating
On Semiconductor
NSR0230P2T5G
SOD-923 (0.8mm×0.6mm×0.4mm)
30V
200mA
On Semicondcuctor
NSR0230M2T5G
SOD-723 (1mm×0.6mm×0.52mm)
30V
200mA
On Semiconductor
RB521S30T1
SOD-523 (1.2mm×0.8mm×0.6mm)
30V
200mA
Diodes Inc.
SDM20U30
SOD-523 (1.2mm×0.8mm×0.6mm)
30V
200mA
Diodes Inc.
B05030WS
SOD-323 (1.6mm×1.2mm×1mm)
30V
0.5A
Philips
BAT760
SOD-323 (1.6mm×1.2mm×1mm)
20V
1A
Output Current Range (OLED Mode)
The maximum output current the LM3528 can deliver in OLED mode is limited by 4 factors (assuming continuous
conduction); the peak current limit of 770mA (typical), the inductor value, the input voltage, and the output
voltage. Calculate the maximum output current (IOUT_MAX) using the following equation:
(IPEAK
IOUT_MAX =
where
'IL =
'IL) u K u VIN
VOUT
VIN u (VOUT
VIN)
2 u fSW u L u VOUT
(10)
For the typical application circuit with VOUT = 18V and assuming 70% efficiency, the maximum output current at
VIN = 2.7V will be approximately 70mA. At 4.2V due to the shorter on times and lower average input currents the
maximum output current (at 70% efficiency) jumps to approximately 105mA. Figure 53 shows a plot of IOUT_MAX
vs. VIN using the above equation, assuming 80% efficiency. In reality, factors such as current limit and efficiency
will vary over VIN, temperature, and component selection. This can cause the actual IOUT_MAX to be higher or
lower.
Figure 53. Typical Maximum Output Current in OLED Mode (assumed 80% efficiency)
Output Voltage Range (OLED Mode)
The LM3528's output voltage is constrained by 2 factors. On the low end it is limited by the minimum duty cycle
of 10% (assuming continuous conduction) and on the high end it is limited by the over voltage protection
threshold (VOVP) of 22V (typical). In order to maintain stability when operating at different output voltages the
output capacitor and inductor must be changed. Refer to Table 10 for different VOUT, COUT, and L combinations.
26
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Table 11. Component Values for Output Voltage Selection
VOUT
COUT
L
VIN Range
18V
2.2µF
10µH
2.7V to 5.5V
15V
2.2µF
10µH
2.7V to 5.5V
12V
4.7µF
10µH
2.7V to 5.5V
9V
10µF
10µH
2.7V to 5.5V
7V
10µF
4.7µH
2.7V to 5.5V
5V
22µF
4.7µH
2.7V to 4.5V
Application Circuits
10 PH
VOLED = 18V
20 mA
2.7V to 5.5V
IN
SW
OVP
CIN
1 PF
VIO
10 k:
40 mA
COUT
2.2 PF
OLED
Display
LM3528
10 k:
R2
10 k:
MAIN
SCL
SDA
R1
140 k:
SUB/FB
HWEN/
PGEN/GPIO
GPIO
Current
Limiting
Resistor
SET
PGND
RSET
12.1 k:
1 M:
Indicator
LED
OLED Panel Power Supply With Indicator LED
Figure 54. LED Backlight + OLED Power Supply
Layout Considerations
Refer to AN-1112 SNVA009 for DSBGA package soldering
The high switching frequencies and large peak currents in the LM3528 make the PCB layout a critical part of the
design. The proceeding steps should be followed to ensure stable operation and proper current source
regulation.
1. CIN should be located on the top layer and as close to the device as possible. The input capacitor supplies the
driver currents during MOSFET switching and can have relatively large spikes. Connecting the capacitor close to
the device will reduce the inductance between CIN and the LM3528 and eliminate much of the noise that can
disturb the internal analog circuitry.
2. Connect the anode of the Schottky diode as close to the SW pin as possible. This reduces the inductance
between the internal MOSFET and the diode and minimizes the noise generated from the discontinuous diode
current and the PCB trace inductance that will add ringing at the SW node and filter through to VOUT. This is
especially important in VOUT mode when designing for a stable output voltage.
3. COUT should be located on the top layer to minimize the trace lengths between the diode and PGND. Connect
the positive terminal of the output capacitor (COUT+) as close as possible to the cathode of the diode. Connect
the negative terminal of the output capacitor (COUT-) as close as possible to the PGND pin on the LM3528. This
minimizes the inductance in series with the output capacitor and reduces the noise present at VOUT and at the
PGND connection. This is important due to the large di/dt into and out of COUT. The returns for both CIN and
COUT should terminate directly to the PGND pin.
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4. Connect the inductor on the top layer close to the SW pin. There should be a low impedance connection from
the inductor to SW due to the large DC inductor current, and at the same time the area occupied by the SW node
should be small so as to reduce the capacitive coupling of the high dV/dt present at SW that can couple into
nearby traces.
5. , Route the traces for RSET and the feedback divider away from the SW node to minimize the capacitance
between these nodes that can couple the high dV/dt present at SW into them. Furthermore, the feedback divider
and RSETshould have dedicated returns that terminate directly to the PGND pin of the device. This will minimize
any shared current with COUT or CIN that can lead to instability. Avoide routing the SUB/FB node close to other
traces that can see high dV/dt such as the I2C pins. The capacitive coupling on the PCB between FB and these
nodes can disturb the output voltage and cause large voltage spikes at VOUT.
6. Do not connect any external capacitance to the SET pin.
7. Refer to the LM3528 Evaluation Board as a guide for proper layout.
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REVISION HISTORY
Changes from Revision A (May 2013) to Revision B
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 28
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM3528TME/NOPB
ACTIVE
DSBGA
YFQ
12
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
SE
LM3528TMX/NOPB
ACTIVE
DSBGA
YFQ
12
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
SE
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of