LM4970SDX/NOPB

LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 LM4970 Audio Synchronized Color LED Driver Check for Samples: LM4970 FEATURES DESCRIPTION • • The LM4970 is a LED driver with an audio synchronization mode that virtually eliminates the need for real time software processing for LED lighting effects. The LM4970 includes three individual PWM color LED drivers that provide up to 42mA of current drive for each PWM LED output. 1 2 • • • • Audio Synchronized Color LED Driver User Defined LED Pattern, Color, and Intensity Capability Programmable: – LED Drive Current – PWM Frequency – High Pass Filter Frequency Select – Audio Input Signal Gain Eliminates External LED Current Limiting Resistors I2C Compatible Interface Ultra Low Shutdown Current APPLICATIONS • • • Cell Phones Portable MP3, CD, DVD, AAC players PDA's The LM4970 features an audio synchronization mode where the audio input signal that is mixed in from three audio inputs is filtered into three frequency bands, with each frequency band assigned to a specific PWM LED driver. The PWM LED drivers can also be directly programmed through an I2C compatible interface for applications where user defined LED pattern, color, and intensity programmability is a priority. The LM4970 also features an audio input gain control which allows the user to increase the gain if the audio input signal does not create a bright enough effect on the LEDs. The LM4970 is a feature rich LED driver that is available in a space saving 14 pin nonpullback WSON package. KEY SPECIFICATIONS • • LED Drive Current per Channel (VDD = 5V): 42mA (2X Setting) Shutdown Current, VDD = 5V: 1.5μA (Typ) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2013, Texas Instruments Incorporated LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com Block Diagram VDD 2 I CVDD 2 I CVDD 2 I C BUS VI H SCL SDA CONTROL INTERFACE PWM RANDOMIZER ADR VDD or VDDBOOST VI L LED1 AUDIO SYNC FILTER MIN LED CURRENT CONTROL LED2 LED3 LIN RIN FILT GND LGND Figure 1. Block Diagram Connection Diagram FILT 1 14 LED1 VDD 2 13 LED2 MIN 3 12 LGND GND 4 11 LED3 LIN 5 10 ADR RIN 6 9 SCL I CVDD 7 8 SDA 2 Figure 2. 14 pin NHK Package (Top View) See Package Number NHK0014A 2 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 PIN DESCRIPTIONS Pin Name Pin Description 1 FILT Low Pass Filter Input 2 VDD Power Supply Pin 3 MIN Mono Audio Input 4 GND Ground 5 LIN Left Audio Input 6 RIN Right Audio Input 7 I2CVDD I2C Interface Power Supply 8 SDA I2C Data 9 SCL I2C Clock 10 ADR I2C Address Select 11 LED3 LED output 3 12 LGND LED ground 13 LED2 LED output 2 14 LED1 LED output 1 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage 6.0V −65°C to +150°C Storage Temperature −0.3V to VDD +0.3V Input Voltage Power Dissipation (4) Internally Limited ESD Susceptibility (5) 2000V (6) 200V ESD Susceptibility ESD Susceptibility (7) 100V Junction Temperature 150°C Thermal Resistance (1) (2) (3) (4) (5) (6) (7) (8) θJA (NHK0014A) (8) 57°C/W θJC (NHK0014A) 12°C/W All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model, 200pF–220pF discharged through all pins, except pins 13 and 14. Machine Model, 200pF–220pF discharge through pins 13 and 14 (LED1 and LED2). The given θJA is for an LM4970SD mounted on a PCB with a 2in2 area of 1oz printed circuit board copper ground plane. Operating Ratings Temperature Range (TMIN ≤ TA ≤ TMAX) −40°C ≤ TA ≤ +85°C 2.7V ≤ VDD ≤ 5.5V (1) Supply Voltage (1) 2.5V ≤ I2CVDD ≤ 5.5V VDD may be used to power the LEDs. It may be necessary to drive the LEDs from a boost (VDDBOOST) found within the system. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 3 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com Control Interface Electrical Characteristics (1) (2) The following specifications apply for 3V ≤ VDD ≤ 5V unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4970 Typical (3) Limits (4) (5) Units (Limits) t1 SCL period 2.5 μs (min) t2 SDA Setup Time 100 ns (min) t3 SDA Stable Time 0 ns (min) t4 Start Condition Time 100 ns (min) t5 Stop Condition Time 100 ns (min) VIH Digital Input High Voltage 0.7 x I2CVDD V (min) Digital Input Low Voltage 2 V (max) VIL (1) (2) (3) (4) (5) 0.3 x I CVDD All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at +25°C and represent the parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Color LED Driver Electrical Characteristics VDD = 5.0V (1) (2) (3) The following specifications apply for VDD = 5.0V unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter IDDRGB Supply Curent ISDRGB Shutdown Current ILED LED Drive Current fPWM PWM Frequency Input Signal Level Gain Control (1) (2) (3) (4) (5) (6) 4 Conditions LM4970 Typical (4) Limits (5) (6) Units (Limits) 2.5 4 mA (max) Shutdown Mode 1.5 3.5 μA (max) .66X current drive setting 14 mA 1X current drive setting 21 mA 1.33X current drive setting 30 mA 2X current drive setting 42 PWM_F = '01' 60 Hz Maximum setting 12 dB Minimum setting –11 dB 23 mA (min) All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Shutdown current and supply current are measured in a normal room environment. All digital input pins are connected to I2CVDD. Typicals are measured at +25°C and represent the parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 Color LED Driver Electrical Characteristics VDD = 3.0V (1) (2) (3) The following specifications apply for VDD = 3.0V unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter IDDRGB Supply Curent ISDRGB Shutdown Current (3) ILED LED Drive Current fPWM PWM Frequency Input Signal Level Gain Control (1) (2) (3) (4) (5) (6) Conditions LM4970 Typical (4) Limits (5) (6) Units (Limits) 2.2 3 mA (max) Shutdown Mode 0.5 2 μA (max) .66X current drive setting 12 mA 1X current drive setting 18 mA 1.33X current drive setting 27 2X current drive setting 35 PWM_F = '01' 60 Hz Maximum setting 12 dB Minimum setting –11 dB mA 21 mA (min) All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Shutdown current and supply current are measured in a normal room environment. All digital input pins are connected to I2CVDD. Typicals are measured at +25°C and represent the parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. External Components Description Components Functional Description 1. Ci This is the input coupling capacitor. It blocks the DC voltage and couples the input signal to the amplifier's input terminals. CIN also creates a highpass filter with an internal 20kΩ resistor at fc = 1/(2π.20000.Ci). 2. CS This is the supply bypass capacitor. It filters the supply voltage applied to the VDD pin and helps reduce the noise at the VDD pin. 3. Cfilt This capacitor creates a low pass filter with an internal 4kΩ resistor at fc = 1/(2π*4000*Cfilt). This pole set at fc determines the high cutoff frequency for the low band PWM color LED driver output, LED1. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 5 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (1) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.047μF, HPF = 3.5kHz setting) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.068μF, HPF = 3.5kHz setting) 24 LED DRIVE CURRENT (mA) LED DRIVE CURRENT (mA) 24 20 16 12 8 4 0 20 200 2k 20 16 12 8 4 0 20 20k FREQUENCY (Hz) 20k Figure 4. Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.1μF, HPF = 3.5kHz setting) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.22μF, HPF = 3.5kHz setting) 24 LED DRIVE CURRENT (mA) LED DRIVE CURRENT (mA) 20 16 12 8 4 0 20 200 2k 20 16 12 8 4 0 20 20k 200 2k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 5. Figure 6. Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.47μF, HPF = 3.5kHz setting) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 0.68μF, HPF = 3.5kHz setting) 24 20 LED DRIVE CURRENT (mA) LED DRIVE CURRENT (mA) 24 16 12 8 4 0 20 6 2k Figure 3. 24 (1) 200 FREQUENCY (Hz) 200 2k 20k 20 16 12 8 4 0 20 200 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. Figure 8. 20k Audio input level set at 1VRMS. The input summing amplifier gain is set to 12dB. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 Typical Performance Characteristics(1) (continued) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 1μF, HPF = 3.5kHz setting) Audio Sync LED Frequency Response (Left - lowband, Mid - midband, Right - highband) (Cfilt = 2.2μF, HPF = 3.5kHz setting) 24 LED DRIVE CURRENT (mA) LED DRIVE CURRENT (mA) 24 20 16 12 8 4 0 20 200 2k 20 16 12 8 4 0 20 20k 200 2k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 9. Figure 10. Highpass Filter Frequency Response vs HPF_F setting (Top - 3.5kHz setting, Mid - 6.3kHz setting, Bot -8.9kHz setting) Low Pass Filter Frequency Responsevs Cfilt (From Left to Right: Cfilt (μF) = 2.2, 1.0, 0.68, 0.47, 0.22, 0.1, 0.068, 0.047, No Cfilt) 24 LED DRIVE CURRENT (mA) LED DRIVE CURRENT (mA) 24 20 16 12 8 4 0 20 200 2k 20k 20 16 12 8 4 0 20 200 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 11. Figure 12. 20k Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 7 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com APPLICATION INFORMATION Figure 13. I2C Timing Diagram Figure 14. I2C Bus Format Table 1. Color LED Driver Chip Address (1) A7 A6 A5 A4 A3 A2 A1 A0 Chip Address 1 1 1 1 0 1 EC 0 ADR = 0 1 1 1 1 0 1 0 0 ADR = 1 1 1 1 1 0 1 1 0 (1) EC - externally configured by ADR pin Table 2. Color LED Driver Control Registers D7 D6 D5 D4 D3 D2 D1 D0 Mode Select Register Name 0 0 0 MS4 MS3 MS2 MS1 MS0 Frequency Select 0 1 0 FS4 FS3 FS2 FS1 FS0 Pattern Select 0 1 1 PS4 PS3 PS2 PS1 PS0 Current Select 1 0 CS5 CS4 CS3 CS2 CS1 CS0 Gain Select 1 1 GS5 GS4 GS3 GS2 GS1 GS0 Table 3. Mode Select Register Data Bit MSO 8 Bit Name Default Value I2C_SD 1 MS1 I2C_RST 0 MS2 RAND 1 MS3 RSVD 0 MS4 RSVD 0 Condition Function 0 Enables device power up mode 1 Enables device shutdown mode 0 Enables device normal operation 1 Enables device RESET, excluding the I2C register settings 0 Disables the audio synchronization randomizer 1 Enables the audio synchronization randomizer 0 1 0 1 Submit Documentation Feedback RESERVED RESERVED Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 Table 4. Frequency Select Register Data Bit Bit Name Default Value FSO PWM_FO 0 Condition Function 0 Programs the oscillation frequency of the PWM. PWM oscillation frequency is set as follows: 1 PWM_F PWM Frequency 00 15kHz 01 60Hz 10 7Hz 11 4Hz 0 FS1 PWM_F1 0 1 FS2 RSVD 0 FS3 HPF_FO 0 0 RESERVED 1 0 Programs the internal high pass filter cutoff frequency. High pass filter cutoff frequency is set as follows: 1 0 FS4 HPF_F1 1 HPF_F High Pass Filter Cutoff Frequency 00 3.5kHz 01 6.3kHz 10 6.3kHz 11 8.9kHz 1 Table 5. Pattern Select Register Data Bit Bit Name Default Value PSO I2C_SEL 0 PS1 I2C_LED1 0 PS2 I2C_LED2 0 PS3 I2C_LED3 0 PS4 RSVD 0 Condition Function 0 Enables LED drivers to be controlled by audio synchronization 1 Enables LED drivers to be controlled through I2C 0 Disables the LED1 driver, if I2C_SEL is set 1 Enables the LED1 driver, if I2C_SEL is set 0 Disables the LED2 driver, if I2C_SEL is set 1 Enables the LED2 driver, if I2C_SEL is set 0 Disables the LED3 driver, if I2C_SEL is set 1 Enables the LED3 driver, if I2C_SEL is set 0 RESERVED 1 RESERVED Table 6. Current Select Register Data Bit Bit Name Default Value CSO ILED1_0 0 Condition Function 0 Programs the current drive of the LED1 driver. Current drive for LED1 is set as follows: 1 0 CS1 ILED1_1 1 1 CS2 ILED2_0 0 0 1 0 CS3 ILED2_1 1 1 ILED1 Current Drive Setting 00 0.66X 01 1X 10 1.33X 11 2X Programs the current drive of the LED2 driver. Current drive for LED2 is set as follows: ILED2 Current Drive Setting 00 0.66X 01 1X 10 1.33X 11 2X Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 9 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com Table 6. Current Select Register (continued) Data Bit Bit Name Default Value CS4 ILED3_0 0 Condition Function 0 Programs the current drive of the LED3 driver. Current drive for LED3 is set as follows: 1 0 CS5 ILED3_1 1 1 ILED3 Current Drive Setting 00 0.66X 01 1X 10 1.33X 11 2X Table 7. Gain Select Register Data Bit Bit Name Default Value GSO MGAIN0 0 GS1 MGAIN1 1 Condition Function 0 Programs the gain response of the midband audio synchronized filter which drives the LED2 PWM color LED driver for the midband audio frequencies. Gain is set as follows: 1 0 1 0 GS2 GS3 GS4 MGAIN2 SGAIN0 SGAIN1 0 0 1 1 0 SGAIN2 000 Midband Filter Gain minimum 001 low 010 medium 011 high 100 maximum Programs the audio gain of the input summing amplifier. Gain is set as follows: 1 SGAIN 0 000 –11dB 1 001 –6.5dB 0 GS5 MGAIN 0 1 Input Signal Gain 010 0dB 011 3.5dB 100 6dB 101 10dB 110 12dB I2C COMPATIBLE INTERFACE The LM4970 uses a serial bus which conforms to the I2C protocol to control the chip’s functions with two wires: clock (SCL) and data (SDA). The clock line is uni-directional. The data line is bi-directional (open-collector) with a pullup resistor (typically 10kΩ). The maximum clock frequency specified by the I2C standard is 400kHz. In this discussion, the master is the controlling microcontroller and the slave is the LM4970. The I2C address for the LM4970 is determined using the ADR pin. The LM4970’s two possible I2C chip addresses are of the form 111101X10 (binary), where X1 = 0, if ADR is logic low; and X1 = 1, if ADR is logic high. If the I2C interface is used to address a number of chips in a system, the LM4970’s chip address can be changed to avoid any possible address conflicts. The bus format for the I2C interface is shown in Figure 14. The data is latched in on the rising edge of the clock. The bus format diagram is broken up into six major sections: The “start” signal is generated by lowering the data signal while the clock signal is high. The start signal will alert all devices attached to the I2C bus to check the incoming address against their own address. The 8-bit chip address is sent next, most significant bit first. Each address bit must be stable while the clock level is high. 10 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 After the last bit of the address bit is sent, the master checks for the LM4970’s acknowledge. The master releases the data line high (through a pullup resistor). Then the master sends a clock pulse. If the LM4970 has received the address correctly, then it holds the data line low during the clock pulse. If the data line is not low, then the master should send a “stop” signal (discussed later) and abort the transfer. The 8 bits of data are sent next, most significant bit first. Each data bit should be valid while the clock level is stable high. After the data byte is sent, the master must check for another acknowledge to see if the LM4970 received the data. If the master has more data bytes to send to the LM4970, then the master can repeat the previous two steps until all data bytes have been sent. The “stop” signal ends the transfer. To signal “stop”, the data signal goes high while the clock signal is high. The data line should be held high when not in use. AUDIO SYNCHRONIZATION MODE The LM4970 features an audio synchronization mode where each PWM color LED driver output is dependent on the audio input signal. The audio synchronization mode allows each LED output to react to the amplitude of the audio input signal, according to the LED output's assigned frequency band. Audio synchronization mode is activated by clearing the I2C_SEL bit in the Pattern Select Register. The audio synchronization filter separates the mixed audio signal into three frequency bands: lowband, midband, and highband. Each frequency band is assigned to a particular PWM LED output, with lowband controlling the duty cycle of the LED1 output, midband controlling the duty cycle of the LED2 output, and highband controlling the duty cycle of the LED3 output. This occurs whenever the audio synchronization randomizer is not turned on. The operation of the audio synchronization randomizer is explained in the AUDIO SYNCHRONIZATION RANDOMIZER section. The duty cycle of any given LED output is dependent upon the amplitude of the audio signal for its particular frequency band. An increase in the amplitude of the audio signal will increase the duty cycle of the PWM LED driver. LEDs driven with a higher duty cycle results in a brighter lighting effect. The LM4970 has three single-ended analog audio inputs designated MIN, LIN, and RIN, where mono voice data is routed to MIN and stereo MP3 or stereo FM radio data is routed to LIN and RIN. Audio signals coupled in from MIN, LIN, and RIN are mixed together by an audio input summing amplifier. The gain of the audio input summing amplifier is programmed by the SGAIN bits of the Gain Select Register. Increasing the gain of the audio input summing amplifier will increase the intensity of the LEDs in audio synchronization mode. The pole of the low pass filter band is set by the filter cap, Cfilt, and an internal 4kΩ resistor. The pole of the high pass filter band is internally set by programming the HPF_F bits of the Frequency Select Register. The midband frequency band is a function of the lowband and highband poles. The gain response of the midband frequency band can be set by programming the MGAIN bits of the Gain Select Register. To minimize LED leakage between audio bands, care should be taken when selecting input gain, midband gain, Cfilt, and LED current drive. There is a trade off between LED brightness and LED leakage in other audio bands. Leakage can be minimized by reducing LED current drive and input gain. Please refer to the frequency response graphs found in the Typical Performance Characteristics section as a guideline to minimize LED leakage. AUDIO SYNCHRONIZATION RANDOMIZER The LM4970 features a randomizer block that randomizes the frequency band assigned to each PWM LED driver during audio synchronization operation. The randomizer is activated by setting the RAND bit in the Mode Select Register. Clearing the RAND bit will disable the randomizer. The randomizer can only be activated when the LM4970 is programmed to audio synchronization mode. The interval at which randomizer assigns a new frequency band is set to occur once every 3.2 seconds. The randomizer ensures that all the colored LEDs will light up over a long duration even if the audio input has a fixed frequency. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 11 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com I2C PATTERN MODE The LM4970 features an I2C pattern mode for applications where direct control of the LED outputs is required. I2C pattern mode is activated by setting the I2C_SEL bit in the Pattern Select Register. The LED1 output duty cycle can be programmed to 100% by setting the I2C_LED1 bit in the Pattern Select Register. Clearing the I2C_LED1 bit sets the LED1 output duty cycle to 0%. The LED2 output duty cycle can be programmed to 100% by setting the I2C_LED2 bit in the Pattern Select Register. Clearing the I2C_LED2 bit sets the LED2 output duty cycle to 0%. The LED3 output duty cycle can be programmed to 100% by setting the I2C_LED3 bit in the Pattern Select Register. Clearing the I2C_LED3 bit sets the LED3 output duty cycle to 0%. Color LEDs driven at 100% duty cycle are fully on, and driven at 0% duty cycle are fully off. PWM FREQUENCY The PWM frequency of the color LED drivers is programmed through the PWM_F bits of the Frequency Select Register. The LM4970 features four different PWM frequency settings: 15kHz, 60Hz, 7Hz, and 4Hz. PWM frequency is analogous to the sampling rate of the audio input signal. A higher PWM frequency setting will result in a more accurate LED representation of the audio input signal in the audio synchronization mode. However, a PWM frequency that is set too high will decrease the ON time of the LED which will result in reduced LED intensity. A PWM frequency setting of 60Hz results in an optimal balance between LED accuracy and intensity. DRIVING RGB LED MODULES The LM4970’s PWM LED outputs can be used to drive individual color LEDs or RGB LED modules. When driving RGB LED modules in audio synchronization mode, the color and intensity of the RGB LED module will be dependent on the audio input signal. In I2C pattern mode, the RGB LED module can be set to any of seven distinct colors, based on the status of the I2C_LED1, I2C_LED2, and I2C_LED3 bit settings. VDD Cs 2 I CVDD VDD VDD 0.1 PF 2 RGB LED I CVDD J1 SCL SDA CONTROL INTERFACE PWM RANDOMIZER ADR extVDD 2 I C Interface 6 Pin Header RED LED1 LED1 Ci1 AUDIO SYNC FILTER MIN 0.22 PF LED CURRENT CONTROL GREEN LED2 LED2 BLUE Ci2 LIN LED3 0.22 PF Ci3 LED3 RIN 0.22 PF FILT GND LGND Cfilt 1 PF Figure 15. Reference Design Board Schematic 12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 LM4970 www.ti.com SNVS312D – JANUARY 2005 – REVISED MAY 2013 Demonstration Board NHK PCB Layout Figure 16. Recommended NHK PCB Layout: Top Silkscreen Figure 17. Recommended NHK PCB Layout: Top Layer Figure 18. Recommended NHK PCB Layout: Bottom Layer Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 13 LM4970 SNVS312D – JANUARY 2005 – REVISED MAY 2013 www.ti.com Revision History Rev Date Description 1.1 5/26/06 On Table 2 (pg 8), col D7 for Pattern Select, changed the '1' into '0'. 1.2 04/01/08 Added the last paragraph under the AUDIO SYNCHRONIZATION MODE. D 05/03/13 Changed layout of National Data Sheet to TI format. 14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM4970 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM4970SD/NOPB ACTIVE WSON NHK 14 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L4970 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of