LM4980
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LM4980 Boomer™ Audio Power Amplifier Series 2 Cell Battery, 1mA, 42mW Per Channel
High Fidelity Stereo Headphone Audio Amplifier for MP3 players
Check for Samples: LM4980
FEATURES
DESCRIPTION
•
•
•
The LM4980 is a stereo headphone audio amplifier,
which when connected to a 3.0V supply, delivers
42mW to a 16Ω load with less than 1% THD+N. With
the LM4980 packaged in the SON package, the
customer benefits include low profile and small size.
This package minimizes PCB area and maximizes
output power.
1
23
•
•
2-Cell 1.5V to 3.3V Battery Operation
Unity-Gain Stable
“Click and Pop” Suppression Circuitry for
Shutdown and Power On/Off Transient with
Headphone Loads
Active Low Micro-Power Shutdown
Thermal Shutdown Protection Circuitry
APPLICATIONS
•
•
•
Portable Two-Cell Audio Products
Portable Two-Cell Electronic Devices
Portable MP3 Player/Recorders
KEY SPECIFICATIONS
•
•
•
•
•
•
The LM4980 features circuitry that significantly
reduces output transients (“clicks” and “pops”) while
driving headphones during device turn-on and turn-off
without costly external additional circuitry. The
LM4980 also includes an externally controlled lowpower consumption active-low shutdown mode, and
thermal shutdown. Boomer audio power amplifiers
are designed specifically to use few external
components and provide high quality output power in
a surface mount package.
Output Power
(RL = 16Ω, VDD = 3.0V, THD+N = 1%), 42mW
(Typ)
Quiescent current (VDD = 3V), 1mA (Typ)
Micropower Shutdown Current, 0.1µA (Typ)
Supply Voltage Operating Range.
1.5V < VDD < 3.3V
PSRR @ 1kHz, VDD = 3.0V, 90dB (Typ)
PSRR @ 217Hz, VDD = 3.0V, 100 (Typ)
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM4980
SNAS301C – JUNE 2005 – REVISED APRIL 2013
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Typical Application
VDD
R
R
IN A-
-
OUT A
+
R
VMID
RL
R
MID CAP
SHDN
Click/Pop
Suppression
RL
+
OUT B
R
IN B-
-
R
Figure 1. Block Diagram
Connection Diagram
INA
1
10
VDD
SHDN
2
9
OUTA
NC
3
8
MID CAP
VMID
4
7
OUTB
INB
5
6
GND
Figure 2. SON Package
Top View
See Package Number DSC0010A
2
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Typical Connection
VDD
Signal
Source
Channel A
R
R
IN A0.68 PF
Generator
OUT A
100 PF
+
R
VMID
VMID
CCOUPLING
-
CIN
32:
CBYPASS
R
4.7 PF
MID CAP
CMIDCAP
SHDN
4.7 PF
Click/Pop
Suppression
32:
+
Channel B
OUT B
R
IN B-
CCOUPLING
-
CIN
100 PF
0.68 PF
R
Figure 3. Typical Application Circuit
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage
3.6V
−65°C to +150°C
Storage Temperature
−0.3V to VDD +0.3V
Input Voltage
Power Dissipation (3)
Internally limited
ESD Susceptibility (4)
2000V
ESD Susceptibility (5)
200V
Junction Temperature
Solder Information
Thermal Resistance
(1)
(2)
(3)
(4)
(5)
150°C
Small Outline Package Vapor Phase (60sec)
215°C
Infrared (15 sec)
220°C
θJA (typ) DSC0010A
73°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum power dissipation is dictated by TJMAX, θJA, and the ambient temperature TA must be derated at elevated temperatures.
The maximum allowable power dissipation is PDMAX = (TJMAX − TA) / θJA. For the LM4980, TJMAX = 150°C. For the θJAs, please see the
Application Information section or the Absolute Maximum Ratings section.
Human body model, 100pF discharged through a 1.5kΩ resistor.
Machine model, 200pF – 220pF discharged through all pins.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ +85°C
1.5V ≤ VDD ≤ 3.3V
Supply Voltage
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Electrical Characteristics VDD = 3.0V (1) (2)
The following specifications apply for the circuit shown in Figure 3, unless otherwise specified. AV = 0dB, RL = 32Ω. Limits
apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4980
Typical (3)
Limit (4)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A, RL = ∞ (5)
1.0
1.5
mA (max)
ISD
Shutdown Current
VSHDN = GND
0.1
1
μA (max)
VOS
Output Offset Voltage
1
5
mV
RL = 16Ω,
THD+N = 1%, f = 1kHz, per channel
42
35
mW (min)
RL = 32Ω,
THD+N = 1%, f = 1kHz, per channel
28
mW (min)
µVRMS
Output Power (6)
PO
VNO
Output Voltage Noise
20Hz to 20kHz, A-weighted, Fig. 2
10
THD+N
Total Harmonic Distortion + Noise
RL = 32Ω, POUT = 10mW, f = 1kHz
0.02
%
Freq = 1kHz, POUT = 28mW, RL = 32Ω
77
dB
VRIPPLE = 200mVP-P sine wave
fRIPPLE = 1kHz, CMIDCAP = 4.7µF,
VMID Voltage is Ripple-Free
90
dB
VRIPPLE = 200mVP-P sine wave
fRIPPLE = 217Hz, CMIDCAP = 4.7µF,
VMID Voltage is Ripple-Free
100
dB
dB
Crosstalk
PSRR
Power Supply Rejection Ratio
CMRR
Common-Mode Rejection Ratio
Input coupling capacitors with 5% tolerance,
VIN = VMID,
fRIPPLE = 1kHz
47
TWAKE-UP
Wake-up Time
CMIDCAP = 4.7µF, Fig 2.
250
VIH
Control Logic High
1.5V ≤ VDD ≤ 3.3V
1.4V
V (min)
VIL
Control Logic Low
1.5V ≤ VDD ≤ 3.3V
0.4V
V (max)
(1)
(2)
(3)
(4)
(5)
(6)
4
ms
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
All voltages are measured with respect to the ground (GND) pins unless otherwise specified.
Typicals are measured at 25°C and represent the parametric norm.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Output power is measured at the device terminals.
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Electrical Characteristics VDD = 1.8V (1) (2)
The following specifications apply for the circuit shown in Figure 3, unless otherwise specified. AV = 0dB, RL = 32Ω. Limits
apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4980
Typical (3)
Limit (4)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A, RL = ∞ (5)
0.9
ISD
Shutdown Current
VSHDN = GND
0.1
μA
VOS
Output Offset Voltage
1
mV
RL = 16Ω,
THD+N = 1%, f = 1kHz, per channel
11
mW (min)
RL = 32Ω,
THD+N = 1%, f = 1kHz, per channel
9
mW (min)
µVRMS
Output Power (6)
PO
mA
VNO
Output Voltage Noise
20Hz to 20kHz, A-weighted, Fig. 2
9
THD+N
Total Harmonic Distortion + Noise
RL = 32Ω, POUT = 10mW, f = 1kHz
0.03
%
Freq = 1kHz, POUT = 9mW, RL = 32Ω
79
dB
VRIPPLE = 200mVP-P sine wave
fRIPPLE = 1kHz, CMIDCAP = 4.7µF,
VMID Voltage is Ripple-Free
78
dB
VRIPPLE = 200mVP-P sine wave
fRIPPLE = 217Hz, CMIDCAP = 4.7µF,
VMID Voltage is Ripple-Free
85
dB
dB
Crosstalk
PSRR
Power Supply Rejection Ratio
CMRR
Common-Mode Rejection Ratio
Input coupling capacitors with 5% tolerance,
VIN = VMID,
fRIPPLE = 1kHz
47
TWAKE-UP
Wake-up Time
CMIDCAP = 4.7μF, Fig 2.
320
VIH
Control Logic High
1.5V ≤ VDD ≤ 3.3V
1.4V
V (min)
VIL
Control Logic Low
1.5V ≤ VDD ≤ 3.3V
0.4V
V (max)
(1)
(2)
(3)
(4)
(5)
(6)
ms
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
All voltages are measured with respect to the ground (GND) pins unless otherwise specified.
Typicals are measured at 25°C and represent the parametric norm.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Output power is measured at the device terminals.
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Typical Performance Characteristics (TA = 25°C)
THD+N vs Frequency
VDD = 2.4V, RL = 32Ω, POUT = 14mW
10
5
2
1
2
1
0.5
0.5
THD+N (%)
THD+N (%)
10
5
THD+N vs Frequency
VDD = 1.8V, RL = 32Ω, PO = 7.3mW
0.2
0.1
0.05
0.2
0.1
0.05
0.02
0.01
0.005
0.02
0.01
0.005
0.002
0.001
20
0.002
0.001
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
THD+N vs Frequency
VDD = 1.8V, RL = 16Ω, POUT = 9.3mW
10
5
2
1
2
1
0.5
0.5
THD+N (%)
THD+N (%)
Figure 5.
THD+N vs Frequency
VDD = 3V, RL = 32Ω, POUT = 23mW
0.2
0.1
0.05
0.2
0.1
0.05
0.02
0.01
0.005
0.02
0.01
0.005
0.002
0.001
20
0.002
0.001
20
50 100 200 500 1k 2k
5k 10k 20k
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 6.
Figure 7.
THD+N vs Frequency
VDD = 2.4V, RL = 16Ω, POUT = 20mW
THD+N vs Frequency
VDD = 3V, RL = 16Ω, POUT = 27mW
10
5
10
5
2
1
2
1
0.5
0.5
THD+N (%)
THD+N (%)
FREQUENCY (Hz)
0.2
0.1
0.05
0.2
0.1
0.05
0.02
0.01
0.005
0.02
0.01
0.005
0.002
0.001
20
0.002
0.001
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 8.
6
5k 10k 20k
FREQUENCY (Hz)
Figure 4.
10
5
50 100 200 500 1k 2k
Figure 9.
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Typical Performance Characteristics (TA = 25°C) (continued)
20
10
10
5
5
2
2
THD+N (%)
THD+N (%)
20
THD+N vs Output Power
VDD = 1.8V, RL = 32Ω
1
0.5
0.2
1
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
1m
0.01
1m
2m
5m
10m 20m
50m 100m
THD+N vs Output Power
VDD = 2.4V, RL = 32Ω
2m
OUTPUT POWER (W)
20
10m 20m
50m 100m
Figure 10.
Figure 11.
THD+N vs Output Power
VDD = 3V, RL = 32Ω
THD+N vs Output Power
VDD = 1.8V, RL = 16Ω
10
10
5
5
2
2
1
THD+N (%)
THD+N (%)
5m
OUTPUT POWER (W)
1
0.5
0.2
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
10m
30m
20m
0.01
1m
50m 70m 100m
40m
60m 80m
2m
5m
10m 20m
50m 100m
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 13.
THD+N vs Output Power
VDD = 2.4V, RL = 16Ω
THD+N vs Output Power
VDD = 3V, RL = 16Ω
20
10
10
5
5
2
2
THD+N (%)
THD+N (%)
20
Figure 12.
1
0.5
0.2
1
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
10m
30m
20m
40m
50m 70m 100m
60m 80m
OUTPUT POWER (W)
0.01
10m
30m
20m
40m
50m 70m 100m
60m 80m
OUTPUT POWER (W)
Figure 14.
Figure 15.
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POWER SUPPLY REJECTION RATIO (dB)
20
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
POWER SUPPLY REJECTION RATIO (dB)
20
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
8
POWER SUPPLY REJECTION RATIO (dB)
PSRR vs Frequency
VDD = 1.8V, RL = 32Ω, 4.7μ
50 100 200 500 1k 2k
5k 10k 20k
PSRR vs Frequency
VDD = 2.4V, RL = 32Ω, 4.7μ
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
50 100 200 500 1k 2k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 16.
Figure 17.
PSRR vs Frequency
VDD = 3V, RL = 32Ω, 4.7μ
POWER SUPPLY REJECTION RATIO (dB)
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
50 100 200 500 1k 2k
5k 10k 20k
20
50 100 200 500 1k 2k
FREQUENCY (Hz)
Figure 18.
Figure 19.
PSRR vs Frequency
VDD = 2.4V, RL = 32Ω, 1μ
50 100 200 500 1k 2k
5k 10k 20k
5k 10k 20k
PSRR vs Frequency
VDD = 3V, RL = 32Ω, 1μ
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
50 100 200 500 1k 2k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20.
Figure 21.
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5k 10k 20k
PSRR vs Frequency
VDD = 1.8V, RL = 32Ω, 1μ
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
Typical Performance Characteristics (TA = 25°C) (continued)
5k 10k 20k
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Crosstalk vs Frequency
VDD = 1.8V, RL = 32Ω,POUT = 9mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
CROSSTALK (dB)
CROSSTALK (dB)
Typical Performance Characteristics (TA = 25°C) (continued)
Crosstalk vs Frequency
VDD = 1.8V, RL = 32Ω, POUT = 9mW
Channel A Driven, Channel B Measured
50 100 200 500 1k 2k
5k 10k 20k
20
5k 10k 20k
Figure 22.
Figure 23.
Crosstalk vs Frequency
VDD = 2.4V, RL = 32Ω, POUT = 17mW
Channel A Driven, Channel B Measured
Crosstalk vs Frequency
VDD = 2.4V, RL = 32Ω, POUT = 17mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
50 100 200 500 1k 2k
5k 10k 20k
20
FREQUENCY (Hz)
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 24.
Figure 25.
Crosstalk vs Frequency
VDD = 3V, RL = 32Ω, POUT = 27mW
Channel A Driven, Channel B Measured
Crosstalk vs Frequency
VDD = 3V, RL = 32Ω, POUT = 27mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
CROSSTALK (dB)
CROSSTALK (dB)
50 100 200 500 1k 2k
FREQUENCY (Hz)
CROSSTALK (dB)
CROSSTALK (dB)
FREQUENCY (Hz)
50 100 200 500 1k 2k
5k 10k 20k
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26.
Figure 27.
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Crosstalk vs Frequency
VDD = 1.8V, RL = 16Ω, POUT = 11mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
CROSSTALK (dB)
CROSSTALK (dB)
Typical Performance Characteristics (TA = 25°C) (continued)
Crosstalk vs Frequency
VDD = 1.8V, RL = 16Ω, POUT = 11mW
Channel A Driven, Channel B Measured
50 100 200 500 1k 2k
5k 10k 20k
20
Figure 29.
Crosstalk vs Frequency
VDD = 2.4V, RL = 16Ω, POUT = 24mW
Channel A Driven, Channel B Measured
Crosstalk vs Frequency
VDD = 2.4V, RL = 16Ω, POUT = 24mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
50 100 200 500 1k 2k
5k 10k 20k
20
FREQUENCY (Hz)
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 30.
Figure 31.
Crosstalk vs Frequency
VDD = 3V, RL = 16Ω, POUT = 42mW
Channel A Driven, Channel B Measured
Crosstalk vs Frequency
VDD = 3V, RL = 16Ω, POUT = 42mW
Channel B Driven, Channel A Measured
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20
CROSSTALK (dB)
CROSSTALK (dB)
5k 10k 20k
Figure 28.
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 32.
10
50 100 200 500 1k 2k
FREQUENCY (Hz)
CROSSTALK (dB)
CROSSTALK (dB)
FREQUENCY (Hz)
Figure 33.
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Typical Performance Characteristics (TA = 25°C) (continued)
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
Output Power vs Supply Voltage
RL = 16Ω
OUTPUT POWER (W)
OUTPUT POWER (W)
Output Power vs Supply Voltage
RL = 32Ω
THD + N = 10%
THD + N = 1%
1.5
1.8
2.1
2.4
2.7
3
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
3.3
THD + N = 10%
THD + N = 1%
1.5
1.8
POWER SUPPLY VOLTAGE (V)
3.3
Output Power vs Load Resistance
VDD = 1.8V
Output Power vs Load Resistance
VDD = 2.4V
40
35
30
12
THD+N = 10%
10
8
THD+N = 1%
6
4
25
THD+N = 10%
20
15
THD+N = 1%
10
5
2
0
0
100
200
300
400
500
600
0
100
200
300
400
500
600
LOAD RESISTANCE (W)
LOAD RESISTANCE (W)
Figure 36.
Figure 37.
Output Power vs Load Resistance
VDD = 3.0V
Load Dissipation vs Amplifier Dissipation
VDD = 1.8V
50
40
0.040
AMPLIFIER DISSIPATION (W)
60
OUTPUT POWER (W)
3
Figure 35.
14
70
2.7
POWER SUPPLY VOLTAGE (V)
16
0
2.4
Figure 34.
OUTPUT POWER (W)
OUTPUT POWER (W)
18
2.1
THD+N = 10%
30
THD+N = 1%
20
10
THD+N = 1%
0.035
0.030
RL = 16:
0.025
0.020
THD+N = 10%
0.015
RL = 32:
0.010
0.005
0
0
100
200
300
400
500
600
LOAD RESISTANCE (W)
0.000
0.000
0.004
0.008
0.012
0.016
LOAD DISSIPATION/CHANNEL (W)
Figure 38.
Figure 39.
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Typical Performance Characteristics (TA = 25°C) (continued)
Amplifier Dissipation vs Load Dissipation
VDD = 2.4V
Amplifier Dissipation vs Load Dissipation
VDD = 3.0V
0.120
AMPLIFIER DISSIPATION (W)
AMPLIFIER DISSIPATION (W)
0.080
0.070
THD+N = 1%
0.060
RL = 16
0.050
THD+N = 10%
0.040
0.030
RL = 32
0.020
RL = 16:
0.080
THD+N = 10%
0.060
RL = 32:
0.040
0.020
0.010
0.000
0.000
THD+N = 1%
0.100
0.010
0.020
0.030
0.000
0.000 0.010 0.020 0.030 0.040 0.050 0.060
0.040
LOAD DISSIPATION/CHANNEL (W)
LOAD DISSIPATION/CHANNEL (W)
Figure 40.
Figure 41.
POWER SUPPLY CURRENT (mA)
Power Supply Current vs Power Supply Voltage
VIN = 0V
1.2
1
0.8
0.6
0.4
0.2
0
1.5
1.8
2.1
2.4
2.7
3
3.3
POWER SUPPLY VOLTAGE (V)
Figure 42.
12
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APPLICATION INFORMATION
AMPLIFIER CONFIGURATION
As shown in Figure 1, the LM4980 consists of a stereo pair of audio amplifiers. These amplifiers operate on a
single supply and have single-ended inputs and outputs. The quiescent operating point of each amplifier input
and output is equal to the voltage applied to the VMID pin (usually VDD/2).
CMIDCAP VALUE SELECTION
Careful consideration should be paid to value of CMIDCAP, the capacitor connected between the MIDCAP pin and
ground. The value of CMIDCAP determines how fast the LM4980 settles to quiescent operation and determines the
amount of output transient suppression. Choosing CMIDCAP equal to 4.7μF along with a small value of CIN (in the
range of 0.1μF to 1.0μF), produces shutdown function that is essentially output-transient free. Choosing CIN no
larger than necessary for the desired bandwidth helps minimize clicks and pops. This ensures that output
transients are minimized when power is first applied or the LM4980 resumes operation after shutdown. The
MIDCAP offers the following benefits: better linearity for reduced THD+N, reduced channel-to-channel crosstalk,
and less susceptibility to ground noise. For the ultimate suppression of output transient when power is applied or
removed, ensure that the voltage applied to the SHDN pin is a logic low. This will activate the micro-power
shutdown.
OPTIMIZING OUTPUT-GROUND NOISE REDUCTION
In addition to the output-ground noise reduction afforded by CMIDCAP, further reduction can be achieved by the
inclusion of a ferrite bead. The ferrite bead (FB) is placed between ground and common connection between the
CMIDCAP and the headphone ground connection. This is shown in Figure 43. The ferrite bead is beneficial in
environments where the headphone and CMIDCAP ground connection is shared with circuitry (such as video) that
may inject noise on a common ground.
LM4980
VMIDCAP
FB
Figure 43. Adding a ferrite bead improves ground-noise suppression
OPTIMIZING OUTPUT TRANSIENT SUPPRESSION
The LM4980 contains circuitry that eliminates turn-on and shutdown output transients ("clicks and pops"). For this
discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode
is deactivated. The turn-on time delay is the time duration that occurs between the application of the power
supply voltage or deactivating shutdown and when the applied input signal appears at the amplifier outputs.
CMIDCAP's value plays a significant role in the suppression of output transients. The amount of suppression
increases as CMIDCAP's value increases. However, changing the value of CMIDCAP alters the LM4980's turn-on
time. There is a linear relationship between the value of CMIDCAP and the turn-on time. Here are some typical
turn-on times for various values of CMIDCAP.
Table 1. Typical turn-on time versus CMIDCAP value
CMIDCAP VALUE (µF)
Turn-On Time (ms)
4.7
250
6.8
360
10.0
530
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STAND-ALONE VMID VOLTAGE GENERATION
The LM4980 is designed to take advantage of audio DACs (digital-to-analog converters) and other signal
sources that, in addition to generating an analog signal, also create an AC ground potential. This AC ground
potential is typically VDD/2. This VDD/2 is applied to the LM4980’s VMID pin (pin 4).
Using two external resistors allows the LM4980 to be easily used in applications where the VMID voltage is not
internally generated and supplied to the LM4980 by other circuits. Figure 44 shows this configuration.
VDD
51 k:
LM4980
VMID
4.7 PF
51 k:
Figure 44. Simple circuit generates LM4980's VMID voltage
SELECTING THE OUTPUT COUPLING CAPACITOR VALUE
To ensure that no performance degrading DC current flows through the load (something with which speakers
would just as soon not have to tolerate), coupling capacitors are necessary between the amplifier output pins and
the load. Besides blocking DC current, the output coupling capacitor value, together with the load resistance,
produces a low frequency amplitude rolloff, whose cutoff frequency is found using Equation 1.
f-3 dB =
1
2SRLOADCCOUPLING
(1)
When driving 32Ω headphones, the 220µF CCOUPLING capacitors shown in Figure 3 produce a cutoff frequency
equal to 23Hz.
The output coupling capacitors also influence the output transient behavior at power-up and when activating or
deactivating shutdown. As CCOUPLING’s value increases, output transient magnitude can also increase. This
increase can be mitigated by a corresponding increase in CMIDCAP’s value. A minimum starting point when
selecting CMIDCAP’s value is 6.8µF when using 220µF output coupling capacitors.
SELECTING THE INPUT CAPACITOR VALUE
Amplifiying the lowest audio frequencies requires a relatively high value input coupling capacitor, (CIN in
Figure 3). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In
many cases, however, the headphones used in portable systems have limited ability to reproduce signals below
60Hz. Applications using headphones with this limited frequency response reap little improvement by using a
high value input capacitor. A small value of Ci (in the range of 0.1μF to 1.0μF), is recommended.
DRIVING POWERED SPEAKERS
Though the LM4980 is design primarily to drive headphones, in many cases, it may be called on to act as a line
level driver when powered speakers or other devices may be connected to the amplifier outputs. For powered
speakers or other devices with typical input resistances (10kΩ) that are significantly higher than the typical
headphone resistance (32Ω), the output transients may not sufficiently suppressed when using the Figure 3
circuit. If this is anticipated, a minor modification of an additional resistor (a nominal value of 1kΩ) between each
output and ground in the Figure 3 circuit is needed to ensure that the output transient suppression is not
compromised. This reduces both the load resistance seen by the LM4980 and the magnitude of power-on and
shutdown output transients.
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POWER DISSIPATION
Power dissipation has to be evaluated and considered when designing a successful amplifier. A direct
consequence of the power delivered to a load an amplifier is internal power dissipation. The maximum peramplifier power dissipation for a given application can be derived from the power dissipation graphs or from
Equation 2.
PDMAX = VDD2/ 2πRLOAD
(2)
It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. Since the typical application
is for headphone operation (16Ω impedance) using a 3.0V supply the maximum power dissipation is less than
29mW. Therefore, in the case of this headphone amplifier, the power dissipation is not a major concern.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important for low noise performance and high power supply
rejection. The capacitor location on the power supply pins should be as close to the device as possible. Typical
applications employ a 3.0V regulator with 10µF tantalum or electrolytic capacitor and a ceramic bypass capacitor
which aid in supply stability. This does not eliminate the need for local power supply bypassing connected as
close as possible to the LM4980’s supply pin. A power supply bypass capacitor value in the range of 1.0µF to
10µF is recommended.
MICRO POWER SHUTDOWN
The voltage applied to the shutdown (SHDN) pin controls the LM4980’s shutdown function. Activate micro-power
shutdown by applying a logic-low voltage to the SHDN pin. When active, the LM4980’s micro-power shutdown
feature turns off the amplifier’s bias circuitry, reducing the supply current. The trigger point is 0.4V (max) for a
logic-low level, and 1.4V (min) for a logic-high level. The low 0.1μA (typ) shutdown current is achieved by
applying a voltage that is as near as ground as possible to the SHDN pin. A voltage that is higher than ground
may increase the shutdown current.
There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw
switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ pull-up resistor
between the SHDN pin and GND. Connect the switch between the SHDN pin and VDD. Select normal amplifier
operation by closing the switch. Opening the switch connects the SHDN pin to ground, activating micro-power
shutdown. The switch and resistor ensure that the SHDN pin will not float. This prevents unwanted state
changes. In a system with a microprocessor or microcontroller, use a digital output to apply the control voltage to
the SHDN pin. Driving the SHDN pin with active circuitry eliminates the pull-up resistor.
SUGGESTED PCB SCHEMATIC
Figure 45 is the schematic for the suggested PCB Layout. This schematic and its associated PCB provide both a
lean tested layout and platform that can be used to verify the LM4980's outstanding audio performance.
Suggested PCB Design and Layout
Figure 46 through Figure 49 show a suggested PCB layout for a headphone amplifier circuit using the LM4980 .
PCB Layout Guidelines
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
MINIMIZING THD+N
PCB trace impedance on the power, ground, and all output traces should be minimized to achieve optimal THD
performance. Therefore, use PCB traces that are as wide as possible for these connections. As the gain of the
amplifier is increased, the trace impedance will have an ever increasing adverse affect on THD performance. At
unity-gain (0dB) the parasitic trace impedance effect on THD performance is reduced but still a negative factor in
the THD performance of the LM4980 in a given application.
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GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION
Power and Ground Circuits
For two layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can greatly enhance low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique will require a greater amount of design time but will not increase the final price of the
board. The only extra parts required may be some jumpers.
Single-Point Power and Ground Connections
The analog power traces should be connected to the digital traces through a single point (link). A "PI-filter" can
be helpful in minimizing high frequency noise coupling between the analog and digital sections. Further, place
digital and analog power traces over the corresponding digital and analog ground traces to minimize noise
coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signal traces should be located as far away as possible from analog
components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and cross talk.
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Schematic for the LM4980 Suggested PCB Layout
Figure 45.
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Suggested PCB Layout
Figure 46. Top Layer
18
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Figure 47. Bottom Layer
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Figure 48. Silkscreen Layer
20
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Figure 49. Top Layer Pads
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REVISION HISTORY
Rev
Date
1.0
6/08/05
Initial release.
1.1
6/29/05
Correct typographical and schematic errors.
Re-released D/S to the WEB.
1.2
7/18/05
Replaced curves 20142971 and 72 with
20142990 and 91 respectively, then rereleased D/S to the WEB.
Changes from Revision B (April 2013) to Revision C
•
22
Description
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 21
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM4980SD/NOPB
ACTIVE
WSON
DSC
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
L4980
LM4980SDX/NOPB
ACTIVE
WSON
DSC
10
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
L4980
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM4980SD/NOPB
WSON
DSC
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM4980SDX/NOPB
WSON
DSC
10
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM4980SD/NOPB
WSON
DSC
10
1000
203.0
190.0
41.0
LM4980SDX/NOPB
WSON
DSC
10
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DSC0010A
SDA10A (Rev A)
www.ti.com
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