LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
LMC6084 Precision CMOS Quad Operational Amplifier
Check for Samples: LMC6084
FEATURES
1
(Typical Unless Otherwise Stated)
2
•
•
•
•
•
•
•
Low Offset Voltage: 150 μV
Operates from 4.5V to 15V Single Supply
Ultra Low Input Bias Current: 10 fA
Output Swing to within 20 mV of Supply Rail,
100k Load
Input Common-Mode Range Includes V−
High Voltage Gain: 130 dB
Improved Latchup Immunity
APPLICATIONS
•
•
•
•
•
•
Instrumentation Amplifier
Photodiode and Infrared Detector Preamplifier
Transducer Amplifiers
Medical Instrumentation
D/A Converter
Charge Amplifier for Piezoelectric Transducers
DESCRIPTION
The LMC6084 is a precision quad low offset voltage
operational amplifier, capable of single supply
operation. Performance characteristics include ultra
low input bias current, high voltage gain, rail-to-rail
output swing, and an input common mode voltage
range that includes ground. These features, plus its
low offset voltage, make the LMC6084 ideally suited
for precision circuit applications.
Other applications using the LMC6084 include
precision full-wave rectifiers, integrators, references,
and sample-and-hold circuits.
This device is built with National's advanced DoublePoly Silicon-Gate CMOS process.
For designs with more critical power demands, see
the LMC6064 precision quad micropower operational
amplifier.
For a single or dual operational amplifier with similar
features, see the LMC6081 or LMC6082 respectively.
PATENT PENDING
Connection Diagram
Figure 1. 14-Pin PDIP/SOIC
Top View
Figure 2. Input Bias Current
vs Temperature
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings (1) (2)
Differential Input Voltage
±Supply Voltage
(V+) +0.3V, (V−) −0.3V
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
16V
Output Short Circuit to V+
See (3)
Output Short Circuit to V−
See (4)
Lead Temperature (Soldering, 10 Sec.)
260°C
Storage Temp. Range
−65°C to +150°C
Junction Temperature
150°C
ESD Tolerance (5)
2 kV
Current at Input Pin
±10 mA
Current at Output Pin
±30 mA
Current at Power Supply Pin
40 mA
Power Dissipation
See (6)
(1)
(2)
(3)
(4)
(5)
(6)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
Do not connect output to V+, when V+ is greater than 13V or reliability will be adversely affected.
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
Human body model, 1.5 kΩ in series with 100 pF.
The maximum power dissipation is a function of TJ(Max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(Max) − TA) /θJA.
Operating Ratings (1)
Temperature Range
−55°C ≤ TJ ≤ +125°C
LMC6084AM
−40°C ≤ TJ ≤ +85°C
LMC6084AI, LMC6084I
4.5V ≤ V+ ≤ 15.5V
Supply Voltage
Thermal Resistance (θJA)
(2)
14-Pin PDIP
81°C/W
14-Pin SOIC
126°C/W
See (3)
Power Dissipation
(1)
(2)
(3)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
All numbers apply for packages soldered directly into a PC board.
For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. All
numbers apply for packages soldered directly into a PC board.
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V,
V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
VOS
Parameter
Conditions
Input Offset Voltage
TCVOS
Typ (1)
LMC6084AM
150
Input Offset Voltage
Limit
(2)
LMC6084AI
Limit
(2)
LMC6084I
Limit (2)
Units
350
350
800
μV
1000
800
1300
Max
μV/°C
1.0
Average Drift
IB
IOS
(1)
(2)
2
Input Bias Current
0.010
Input Offset Current
pA
100
4
4
Max
100
2
2
Max
0.005
pA
Typical values represent the most likely parametric norm.
All limits are guaranteed by testing or statistical analysis.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V,
V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
Parameter
Conditions
RIN
Input Resistance
CMRR
Common Mode
0V ≤ VCM ≤ 12.0V
Rejection Ratio
V+ = 15V
Positive Power Supply
5V ≤ V+ ≤ 15V
Rejection Ratio
VO = 2.5V
Negative Power Supply
0V ≤ V− ≤ −10V
+PSRR
−PSRR
Typ (1)
LMC6084AM
LMC6084AI
LMC6084I
Limit (2)
Limit (2)
Limit (2)
75
75
66
dB
72
72
63
Min
75
75
66
dB
72
72
63
Min
84
84
74
dB
81
81
71
Min
−0.1
−0.1
−0.1
V
0
0
0
Max
V+ − 2.3
V+ − 2.3
V+ − 2.3
V
Tera Ω
>10
85
85
94
Rejection Ratio
VCM
Input Common-Mode
V+ = 5V and 15V
Voltage Range
for CMRR ≥ 60 dB
−0.4
V+ − 1.9
+
AV
Large Signal
RL = 2 kΩ (3)
VO
Output Swing
V − 2.5
V − 2.5
Min
400
300
V/mV
300
300
200
Min
180
180
90
V/mV
70
100
60
Min
400
400
200
V/mV
150
150
80
Min
100
100
70
V/mV
35
50
35
Min
4.80
4.80
4.75
V
4.70
4.73
4.67
Min
0.13
0.13
0.20
V
0.19
0.17
0.24
Max
4.50
4.50
4.40
V
4.24
4.31
4.21
Min
0.40
0.40
0.50
V
0.63
0.50
0.63
Max
14.50
14.50
14.37
V
14.30
14.34
14.25
Min
0.26
0.35
0.35
0.44
V
0.48
0.45
0.56
Max
13.90
13.35
13.35
12.92
V
12.80
12.86
12.44
Min
1.16
1.16
1.33
V
1.42
1.32
1.58
Max
16
16
13
mA
8
10
8
Min
16
16
13
mA
11
13
10
Min
28
28
23
mA
18
22
18
Min
28
28
23
mA
19
22
18
Min
Sinking
350
Sourcing
1200
V+ = 5V
150
4.87
RL = 2 kΩ to 2.5V
0.10
V+ = 5V
4.61
RL = 600Ω to 2.5V
0.30
V+ = 15V
14.63
RL = 2 kΩ to 7.5V
V+ = 15V
RL = 600Ω to 7.5V
0.79
IO
Output Current
Sourcing, VO = 0V
22
V+ = 5V
Sinking, VO = 5V
IO
Output Current
21
Sourcing, VO = 0V
30
Sinking, VO = 13V (4)
34
+
V = 15V
(3)
(4)
+
400
1400
Sinking
+
V − 2.6
Sourcing
Voltage Gain
RL = 600Ω (3)
Units
V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V.
Do not connect output to V+, when V+ is greater than 13V or reliability will be adversely affected.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
3
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V,
V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
IS
Parameter
Supply Current
Conditions
All Four Amplifiers
Typ (1)
LMC6084AM
LMC6084AI
LMC6084I
Limit (2)
Limit (2)
Limit (2)
3.0
3.0
3.0
mA
3.6
3.6
3.6
Max
3.4
3.4
3.4
mA
4.0
4.0
4.0
Max
1.8
V+ = +5V, VO = 1.5V
All Four Amplifiers
2.2
V+ = +15V, VO = 7.5V
Units
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, Boldface limits apply at the temperature extremes. V+ = 5V,
V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
Parameter
SR
Slew Rate
GBW
Gain-Bandwidth Product
φm
Phase Margin
Conditions
See (3)
(4)
Typ (1)
1.5
LMC6084AM LMC6084AI LMC6084I
Limit (2)
Limit (2)
Limit (2)
0.8
0.8
0.8
0.5
0.6
0.6
Units
V/μs
Min
1.3
MHz
50
Deg
Amp-to-Amp Isolation
See
140
dB
en
Input-Referred Voltage Noise
F = 1 kHz
22
nV/√Hz
in
Input-Referred Current Noise
F = 1 kHz
0.0002
pA/√Hz
T.H.D.
Total Harmonic Distortion
F = 10 kHz, AV = −10
0.01
%
RL = 2 kΩ, VO = 8 VPP
±5V Supply
(1)
(2)
(3)
(4)
4
Typical values represent the most likely parametric norm.
All limits are guaranteed by testing or statistical analysis.
V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Input referred V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turm with 1 kHz to produce VO = 12 VPP.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
Typical Performance Characteristics
Distribution of LMC6084
Input Offset Voltage
(TA = +25°C)
Distribution of LMC6084
Input Offset Voltage
(TA = −55°C)
Figure 3.
Figure 4.
Distribution of LMC6084
Input Offset Voltage
(TA = +125°C)
Input Bias Current
vs Temperature
Figure 5.
Figure 6.
Supply Current
vs Supply Voltage
Input Voltage
vs Output Voltage
Figure 7.
Figure 8.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
5
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics (continued)
6
Common Mode
Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
Figure 9.
Figure 10.
Input Voltage Noise
vs Frequency
Output Characteristics
Sourcing Current
Figure 11.
Figure 12.
Output Characteristics
Sinking Current
Gain and Phase Response
vs Temperature (−55°C to +125°C)
Figure 13.
Figure 14.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
Typical Performance Characteristics (continued)
Gain and Phase Response
vs
Capacitive Load with RL = 600Ω
Gain and Phase Response
vs
Capacitive Load with RL = 500 kΩ
Figure 15.
Figure 16.
Open Loop
Frequency Response
Inverting Small Signal
Pulse Response
Figure 17.
Figure 18.
Inverting Large Signal
Pulse Response
Non-Inverting Small
Signal Pulse Response
Figure 19.
Figure 20.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
7
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics (continued)
8
Non-Inverting Large
Signal Pulse Response
Crosstalk Rejection
vs Frequency
Figure 21.
Figure 22.
Stability
vs
Capacitive Load, RL = 600Ω
Stability
vs
Capacitive Load RL = 1 MΩ
Figure 23.
Figure 24.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
APPLICATIONS HINTS
AMPLIFIER TOPOLOGY
The LMC6084 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing
even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage
is taken directly from the internal integrator, which provides both low output impedance and large gain. Special
feed-forward compensation design techniques are incorporated to maintain stability over a wider range of
operating conditions than traditional micropower op-amps. These features make the LMC6084 both easier to
design with, and provide higher speed than products typically found in this ultra-low power class.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the
LMC6084.
Although the LMC6084 is highly stable over a wide range of operating conditions, certain precautions must be
met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and
even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce
phase margins.
When high input impedances are demanded, guarding of the LMC6084 is suggested. Guarding input lines will
not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High
Impedance Work)
The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors
(as in Figure 25 ) such that:
(1)
(2)
(3)
or
R1 CIN ≤ R2 Cf
Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired
pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating
for input capacitance.
Figure 25. Cancelling the Effect of Input Capacitance
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor
is normally included in this integrator stage. The frequency location of the dominant pole is affected by the
resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate
resistive load in parallel with the capacitive load (see typical curves).
Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created
by the combination of the op-amp's output impedance and the capacitive load. This pole induces phase lag at the
unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response.
With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 26.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
9
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Figure 26. LMC6084 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads
In the circuit of Figure 26, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency
component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the
overall feedback loop.
Capacitive load driving capability is enhanced by using a pull up resistor to V+ Figure 27. Typically a pull up
resistor conducting 500 μA or more will significantly improve capacitive load responses. The value of the pull up
resistor must be determined based on the current sinking capability of the amplifier with respect to the desired
output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical
Characteristics).
Figure 27. Compensating for Large Capacitive Loads with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires
special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the
LMC6084, typically less than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of
obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board,
even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or
contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6084's inputs
and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp's
inputs, as in Figure 28. To have a significant effect, guard rings should be placed on both the top and bottom of
the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier
inputs, since no leakage current can flow between two points at the same potential. For example, a PC board
trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the
trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the
LMC6084's actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a
resistance of 1011Ω would cause only 0.05 pA of leakage current. See Figure 29 for typical connections of guard
rings for standard op-amp configurations.
10
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
Figure 28. Example of Guard Ring in P.C. Board Layout
Inverting Amplifier
Non-Inverting Amplifier
Follower
Figure 29. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few
circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the
amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an
excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but
the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 30.
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
11
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Latchup
CMOS devices tend to be susceptible to latchup due to their internal parasitic SCR effects. The (I/O) input and
output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate
lead. The LMC6084 is designed to withstand 100 mA surge current on the I/O pins. Some resistive method
should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR,
there is a minimum holding current for any latchup mode. Limiting current to the supply pins will also inhibit
latchup susceptibility.
(Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board).
Figure 30. Air Wiring
Typical Single-Supply Applications
(V+ = 5.0 VDC)
The extremely high input impedance, and low power consumption, of the LMC6084 make it ideal for applications
that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held
pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure
transducers.
Figure 31 shows an instrumentation amplifier that features high differential and common mode input resistance
(>1014Ω), 0.01% gain accuracy at AV = 1000, excellent CMRR with 1 kΩ imbalance in bridge source resistance.
Input current is less than 100 fA and offset drift is less than 2.5 μV/°C. R2 provides a simple means of adjusting
gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize CMRR without using
super precision matched resistors. For good CMRR over temperature, low drift resistors should be used.
If R1 = R5, R3 = R6, and R4 = R7; then
12
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
LMC6084
www.ti.com
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
∴AV ≈ 100 for circuit shown (R2 = 9.822k).
Figure 31. Instrumentation Amplifier
Figure 32. Low-Leakage Sample and Hold
Figure 33. 1 Hz Square Wave Oscillator
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
13
LMC6084
SNOS657D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
•
14
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 13
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LMC6084
PACKAGE OPTION ADDENDUM
www.ti.com
23-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
LMC6084AIM
ACTIVE
SOIC
D
14
55
TBD
Call TI
Call TI
-40 to 85
LMC6084
AIM
LMC6084AIM/NOPB
ACTIVE
SOIC
D
14
55
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LMC6084
AIM
LMC6084AIMX
ACTIVE
SOIC
D
14
TBD
Call TI
Call TI
-40 to 85
LMC6084
AIM
LMC6084AIMX/NOPB
ACTIVE
SOIC
D
14
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LMC6084
AIM
LMC6084IM
ACTIVE
SOIC
D
14
TBD
Call TI
Call TI
-40 to 85
LMC6084IM
LMC6084IM/NOPB
ACTIVE
SOIC
D
14
55
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LMC6084IM
LMC6084IMX
ACTIVE
SOIC
D
14
2500
TBD
Call TI
Call TI
-40 to 85
LMC6084IM
LMC6084IMX/NOPB
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LMC6084IM
2500
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
23-Sep-2013
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMC6084AIMX/NOPB
SOIC
D
14
2500
330.0
16.4
6.5
9.35
2.3
8.0
16.0
Q1
LMC6084IMX
SOIC
D
14
2500
330.0
16.4
6.5
9.35
2.3
8.0
16.0
Q1
LMC6084IMX/NOPB
SOIC
D
14
2500
330.0
16.4
6.5
9.35
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMC6084AIMX/NOPB
SOIC
D
14
2500
367.0
367.0
35.0
LMC6084IMX
SOIC
D
14
2500
367.0
367.0
35.0
LMC6084IMX/NOPB
SOIC
D
14
2500
367.0
367.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
工商网监
湘ICP备2023018690号
