LMV1090TL/NOPB

LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 LMV1090 Dual Input, Far Field Noise Suppression Microphone Amplifier Check for Samples: LMV1090 FEATURES DESCRIPTION • • • • • • • • The LMV1090 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce background acoustic noise, while delivering superb speech clarity in voice communication applications. 1 23 No Loss of Voice Intelligibility No Added Processing Delay Low Power Consumption Differential Outputs Excellent RF Immunity Adjustable 12 - 54dB Gain Shutdown Function Space-Saving 16–Bump DSBGA Package APPLICATIONS • • • • • Mobile Headset Mobile and Handheld Two-Way Radios Bluetooth and Other Powered Headsets Hand-held Voice Microphones Cell Phones KEY SPECIFICATIONS • • • • • • • The LMV1090 preserves near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 50cm from the microphones. Up to 20dB of far-field rejection is possible in a properly configured and using ±0.5dB matched microphones. Part of the PowerWise ™ family of energy efficient solutions, the LMV1090 consumes only 600μA of supply current providing superior performance over DSP solutions consuming greater than ten times the power. The dual microphone inputs and the processed signal output are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply. Far Field Noise Suppression Electrical (FFNSE at f = 1kHz): 34dB (typ) SNRIE 26dB (typ) Supply Current: 600μA (typ) Standby Current 0.1μA (typ) Signal-to-Noise Ratio (Voice band): 65dB (typ) Total Harmonic Distortion + Noise: 0.1% (typ) PSRR (217Hz): 99dB (typ) 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. is a trademark of ~ Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2013, Texas Instruments Incorporated LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com System Diagram Far-field noise, > 50 cm Near-Field Voice Tra ffic N ois e Lo ud Up to 4 cm Pure analog solution provides superior performance over DSP solutions Music Analog Noise Cancelling Block Crowd Noise Anno unce men hin c Ma 2 LMV1090 Near-Field Voice ts eN o ise Low-cost omnidirectional microphones Submit Documentation Feedback Far field noise reduced by up to 20 dB in properly configured and using ±0.5 dB matched microphones Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 GND Mic1- Mic1+ Mic2- Mic2+ VDD VDD Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 EN Shutdown Pre-Amp Gain (6-36 dB) Pre-Amp Gain (6-36 dB) Bias REF SDA SCL 2 100 nF C2 I CVDD 2 I C Interface CB 10 nF Post Amp Gain (6-18 dB) Post Amp Gain (6-18 dB) OUT- LPF- OUT+ LPF+ Optimized Audio Ouput * CLP2 Optimized Audio Ouput * CLP1 www.ti.com * The value of the low-pass filter capacitor is application dependent, see the application section for additional information. RIN2 1.1 k: RIN4 1.1 k: 470 nF 470 nF CIN4 CIN3 470 nF 470 nF CIN2 CIN1 RIN1 1.1 k: RIN3 1.1 k: Mic Bias 1 PF C1 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 Typical Application Figure 1. Typical Dual Microphone Far Field noise Cancelling Application Submit Documentation Feedback 3 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com Connection Diagram 1 2 3 4 A MIC1- MIC1+ MIC2- MIC2+ B GND LPF+ OUT+ REF C VDD LPF- OUT- Mic Bias D EN SDA SCL I CVDD 2 Figure 2. 16–Bump DSBGA (Top View) See YZR0016 Package PIN DESCRIPTIONS Bump Number Pin Name Pin Function Pin Type A1 MIC1– Microphone 1 negative input Analog Input A2 MIC1+ Microphone 1 positive input Analog Input A3 MIC2– Microphone 2 negative input Analog Input A4 MIC2+ Microphone 2 positive input Analog Input B1 GND Amplifier ground Ground B2 LPF+ Low Pass Filter for positive output Analog Input B3 OUT+ Positive optimized audio output Analog Output B4 REF Reference voltage de-coupling Analog Reference C1 VDD Power supply Supply C2 LPF- Low Pass Filter for negative output Analog Input C3 OUT- Negative optimized audio output Analog Output C4 Mic Bias Microphone Bias Analog Output D1 EN Chip enable Digital input D2 SDA I2C data Digital Input/Output I2C clock Digital Input I C power supply Supply D3 D4 SCL 2 I CVDD 2 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 4 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V Storage Temperature -85°C to +150°C Power Dissipation (3) Internally Limited ESD Rating (4) 2000V ESD Rating (5) 200V CDM 500V Junction Temperature (TJMAX) 150°C Mounting Temperature Infrared or Convection (20 sec.) 235°C Thermal Resistance θJA (DSBGA) 70°C/W Soldering Information See AN-1112 “microSMD Wafers Level Chip Scale Package.” (1) (2) (3) (4) (5) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1090, TJMAX = 150°C and the typical θJA for this DSBGA package is 70°C/W. Refer to the Thermal Considerations section for more information. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. Operating Ratings (1) 2.7V ≤ VDD ≤ 5.5V Supply Voltage 2 I CVDD Supply Voltage (2) 1.7V ≤ I2CVDD ≤ 5.5V TMIN ≤ TA ≤ TMAX (1) (2) −40°C ≤ TA ≤ +85°C “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The voltage at I2CVDD must not exceed the voltage on VDD. Electrical Characteristics 3.3V (1) (2) Unless otherwise specified, all limits specified for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, EN = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol SNR (1) (2) (3) (4) Parameter Signal-to-Noise Ratio Conditions LMV1090 Typical (3) Limit (4) Units (Limits) VIN = 18mVP-P A-weighted, Audio band 63 dB VOUT = 18VP-P, voice band (300–3400Hz) 65 dB eN Input Referred Noise level A-Weighted VIN Maximum Input Signal THD+N < 1%, Pre Amp Gain = 6dB μVRMS 5 880 820 mVP-P (min) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The Electrical Characteristics tables list specified specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured Datasheet min/max specification limits are ensured by test, or statistical analysis. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 5 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com Electrical Characteristics 3.3V(1)(2) (continued) Unless otherwise specified, all limits specified for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, EN = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol VOUT THD+N ZIN ZOUT Parameter Typical (3) Limit (4) Units (Limits) 1.1 VRMS (min) 0.2 % (max) Maximum AC Output Voltage Differential Out+, OutTHD+N < 1% 1.2 DC Level at Outputs Out+, Out- 820 Total Harmonic Distortion + Noise Differential Out+ and Out- 0.1 Input Impedance 142 Output Impedance (Differential) 220 Load Impedance (Out+, Out-) (5) RLOAD CLOAD AM Microphone Preamplifier Gain Range minimum maximum AMR Microphone Preamplifier Gain Adjustment Resolution ZLOAD LMV1090 Conditions AP Post Amplifier Gain Range APR Post Amplifier Gain Resolution mV kΩ Ω 10 100 6 36 2 minimum maximum dB dB 1.7 2.3 6 18 3 kΩ (min) pF (max) dB (min) dB (max) dB dB 2.6 3.4 dB (min) dB (max) FFNSE Far Field Noise Suppression Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 34 42 26 dB dB SNRIE Signal-to-Noise Ratio Improvement Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 26 33 18 dB dB PSRR Power Supply Rejection Ratio fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) 99 85 dB (min) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) 95 80 dB (min) CMRR Common Mode Rejection Ratio input referred 60 1.85 2.15 V (min) V (max) 0.80 mA (max) Input Referred, Input AC grounded (5) (6) 6 2.0 dB VBM Microphone Bias Supply Voltage IBIAS = 1.2mA eVBM Mic bias noise voltage on VREF pin A-Weighted, CB = 10nF IDDQ Supply Quiescent Current VIN = 0V 0.60 IDD Supply Current VIN = 25mVP-P both inputs Noise cancelling mode 0.60 ISD Shut Down Current EN pin = GND 0.1 0.7 μA (max) IDDI2C I2C supply current I2C Idle Mode 25 100 nA (max) TON Turn-On Time (6) 40 ms (max) TOFF Turn-Off Time (6) 60 ms (max) μVRMS 7 mA Ensured by design. Ensured by design. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 Electrical Characteristics 5.0V (1) (2) Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 5V, VIN = 18mVP-P, EN = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol SNR Parameter Signal-to-Noise Ratio Conditions LMV1090 Typical (3) Limit (4) Units (Limits) VIN = 18mVP-P A-weighted, Audio band 63 dB VOUT = 18mVP-P, voice band (300–3400Hz) 65 dB μVRMS eN Input Referred Noise level A-Weighted VIN Maximum Input Signal THD+N < 1% 880 820 mVP-P (min) Maximum AC Output Voltage f = 1kHz, THD+N < 1% between differential output 1.2 1.1 VRMS (min) 0.2 % (max) VOUT DC Output Voltage THD+N ZIN ZOUT Total Harmonic Distortion + Noise 820 Differential Out+ and Out- Input Impedance Microphone Preamplifier Gain Range AMR Microphone Preamplifier Gain Adjustment Resolution AP Post Amplifier Gain Range APR Post Amplifier Gain Adjustment Resolution 0.1 mV 142 Output Impedance AM 5 minimum maximum 220 Ω 6 36 dB dB 2 minimum maximum kΩ 1.7 2.3 6 18 3 dB (min) dB (max) dB dB 2.6 3.4 dB (min) dB (max) FFNSE Far Field Noise Suppression Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Method) 34 42 26 dB dB SNRIE Signal-to-Noise Ratio Improvement Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 26 33 18 dB dB fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) 99 85 dB (min) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) 95 80 dB (min) Input Referred, Input AC grounded PSRR CMRR Common Mode Rejection Ratio input referred 60 VBM Microphone Bias Supply Voltage IBIAS = 1.2mA 2.0 eVBM Microphone bias noise voltage on VREF pin A-Weighted, CB = 10nF IDDQ Supply Quiescent Current VIN = 0V 0.60 IDD Supply Current VIN = 25mVP-P both inputs Noise cancelling mode 0.60 mA ISD Shut Down Current EN pin = GND 0.1 μA 2 IDDI C (1) (2) (3) (4) (5) Power Supply Rejection Ratio 2 I C supply current 2 I C Idle Mode dB 1.85 2.15 μVRMS 7 25 V ( min) V (max) 0.80 mA (max) 100 nA (max) TON Turn On Time (5) 40 mA (max) TOFF Turn Off Time (5) 60 ms (max) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The voltage at I2CVDD must not exceed the voltage on VDD. Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured Datasheet min/max specification limits are ensured by test, or statistical analysis. Ensured by design. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 7 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com Digital Interface Characteristics I2C_VDD = 2.2V to 5.5V (1) (2) The following specifications apply for VDD = 5.0V and 3.3V, TA = 25°C, 2.2V ≤ I2C_VDD ≤ 5.5V, unless otherwise specified. Symbol (1) (2) (3) (4) (5) Parameter Conditions LMV1090 Typical (3) Limits (4) (5) Units (Limits) t1 I2C Clock Period 2.5 µs (min) t2 I2C Data Setup Time 100 ns (min) t3 I2C Data Stable Time 0 ns (min) t4 Start Condition Time 100 ns (min) t5 Stop Condition Time 100 ns (min) t6 I2C Data Hold Time 100 ns (min) 2 2 VIH I C Input Voltage High EN, SCL, SDA 0.7xI CVDD V (min) VIL I2C Input Voltage Low EN, SCL, SDA 0.3xI2CVDD V (max) The Electrical Characteristics tables list specified specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured The voltage at I2CVDD must not exceed the voltage on VDD. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. Datasheet min/max specification limits are ensured by test, or statistical analysis. Digital Interface Characteristics I2C_VDD = 1.7V to 2.2V The following specifications apply for VDD = 5.0V and 3.3V, TA = 25°C, 1.7V ≤ I2C_VDD ≤ 2.2V, unless otherwise specified. Symbol (1) (2) 8 Parameter Conditions LMV1090 Typical (1) Limits (2) Units (Limits) t1 I2C Clock Period 2.5 µs (min) t2 I2C Data Setup Time 250 ns (min) t3 I2C Data Stable Time 0 ns (min) t4 Start Condition Time 250 ns (min) t5 Stop Condition Time 250 ns (min) t6 I2C Data Hold Time 250 ns (min) 2 2 VIH I C Input Voltage High EN, SCL, SDA 0.7xI CVDD V (min) VIL I2C Input Voltage Low EN, SCL, SDA 0.3xI2CVDD V (max) Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured Datasheet min/max specification limits are ensured by test, or statistical analysis. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 Test Methods LMV1090 Mic2+ Osc2 LPF 470 nF Mic2- OUT+ AC Voltmeter 470 nF Mic1+ Osc1 470 nF Mic1- OUT- 470 nF Figure 3. FFNSE, NFSLE, SNRIE Test Circuit FAR FIELD NOISE SUPPRESSION (FFNSE) For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones (see Figure 22). Which means the far field sound source is equidistance from the two microphones. This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the FFNSE test. The block diagram from Figure 17 is used with the following procedure to measure the FFNSE. 1. A sine wave with equal frequency and amplitude (25mVP-P) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. FFNSE = Y - X dB NEAR FIELD SPEECH LOSS (NFSLE) For optimum near field speech preservation, the sound source should be in an endfire array configuration from the two microphones (see Figure 23). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSLE test. The schematic from Figure 17 is used with the following procedure to measure the NFSLE. 1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. NFSLE = Y - X dB SIGNAL TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRIE) The SNRIE is the ratio of FFNSE to NFSLE and is defined as: SNRIE = FFNSE - NFSLE (1) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 9 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Frequency Mic2 = AC GND, Mic1 = 36mVP-P Noise Canceling Mode 10 10 1 1 THD+N (%) THD+N (%) THD+N vs Frequency Mic1 = AC GND, Mic2 = 36mVP-P Noise Canceling Mode 0.1 0.1 0.01 0.01 0.001 20 100 0.001 20 10k 20k 1k 100 Figure 5. THD+N vs Frequency Mic1 = 36mVP-P Mic1 Pass Through Mode THD+N vs Frequency Mic2 = 36mVP-P Mic2 Pass Through Mode 10 10 1 1 0.1 0.1 0.01 0.001 20 100 1k FREQUENCY (Hz) 10k 20k 0.001 20 100 10k 20k 1k FREQUENCY (Hz) Figure 6. Figure 7. THD+N vs Input Voltage Mic1 = AC GND, f = 1kHz Mic2 Noise Canceling Mode THD+N vs Input Voltage Mic2 = AC GND, f = 1kHz Mic1 Noise Canceling Mode 100 100 10 10 THD+N (%) THD+N (%) 10k 20k Figure 4. 0.01 1 0.1 0.01 0.001 10 1k FREQUENCY (Hz) THD+N (%) THD+N (%) FREQUENCY (Hz) 1 0.1 0.01 0.1 0.01 0.001 1 0.01 0.1 INPUT VOLTAGE (VP-P) INPUT VOLTAGE (VP-P) Figure 8. Figure 9. Submit Documentation Feedback 1 Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Input Voltage f = 1kHz Mic1 Pass Through Mode THD+N vs Input Voltage f = 1kHz Mic2 Pass Through Mode 10 10 THD+N (%) 100 THD+N (%) 100 1 0.1 1 0.1 0.01 0.001 0.01 0.1 0.01 0.001 1 0.01 0.1 1 INPUT VOLTAGE (VP-P) Figure 10. Figure 11. PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic1 Pass Through Mode PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic2 Pass Through Mode +0 +0 -10 -10 -20 -20 -30 -30 -40 -40 PSRR (dB) PSRR (dB) INPUT VOLTAGE (VP-P) -50 -60 -70 -80 -50 -60 -70 -80 -90 -90 -100 -100 -110 20 100 1k FREQUENCY (Hz) 10k 20k -110 20 100 1k FREQUENCY (Hz) 10k 20k Figure 12. Figure 13. PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Noise Canceling Mode Far Field Noise Suppression Electrical vs Frequency 50 +0 -10 -20 40 -40 FFNSE (dB) PSRR (dB) -30 -50 -60 -70 30 20 -80 10 -90 -100 -110 20 100 1k FREQUENCY (Hz) 0 100 10k 20k 1k 10k FREQUENCY (Hz) Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 11 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. Signal-to-Noise Ratio Electrical vs Frequency 35 30 SNRIE (dB) 25 20 15 10 5 0 100 1k 10k FREQUENCY (Hz) Figure 16. 12 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 LMV1090 www.ti.com SNAS472I – MAY 2009 – REVISED MAY 2013 APPLICATION DATA INTRODUCTION The LMV1090 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a communication system. A simplified block diagram is provided in Figure 17. Post Amp Gain (6 dB - 18 dB) Preamp Gain (6 dB - 36 dB) Mic1 Analog Noise Cancelling Block OUT+ Optimized Audio Ouput OUT- Mic2 Figure 17. Simplified Block Diagram of the LMV1090 The output signal of the microphones is amplified by a pre-amplifier with adjustable gain between 6dB and 36dB. After the signals are matched the analog noise cancelling suppresses the far field noise signal. The output of the analog noise cancelling processor is amplified in the post amplifier with adjustable gain between 6dB and 18dB. For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1090 and the output of the LMV1090 is also differential. The adjustable gain functions can be controlled via I2C. Power Supply Circuits A low drop-out (LDO) voltage regulator in the LMV1090 allows the device to be independent of supply voltage variations. The Power On Reset (POR) circuitry in the LMV1090 requires the supply voltage to rise from 0V to VDD in less than 100ms. The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the VREF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output. Most of the logic levels for the digital control interface are relative to I2CVDD voltage. This eases interfacing to the micro controller of the application containing the LMV1090. The supply voltage on the I2CVDD pin must never exceed the voltage on the VDD pin. Only the four pins that determine the default power up gain have logic levels relative to VDD. Shutdown Function As part of the Powerwise™ family, the LMV1090 consumes only 0.50mA of current. In many applications the part does not need to be continuously operational. To further reduce the power consumption in the inactive period, the LMV1090 provides two individual microphone power down functions. When either one of the shutdown functions is activated the part will go into shutdown mode consuming only a few μA of supply current. SHUTDOWN VIA HARDWARE PIN The hardware shutdown function is operated via the EN pin. In normal operation the EN pin must be at a 'high' level (VDD). Whenever a 'low' level (GND) is applied to the EN pin the part will go into shutdown mode disabling all internal circuits. Gain Balance and Gain Budget In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain setting in the preamplifier will result in clipping and saturation in the noise cancelling processor and output stages. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1090 13 LMV1090 SNAS472I – MAY 2009 – REVISED MAY 2013 www.ti.com The gain ranges and maximum signal levels for the different functional blocks are shown in Figure 18. Two examples are given as a guideline on how to select proper gain settings. Pre Amp Gain (6 dB - 36 dB) Gain (Max. 0 dB) Post Amp Gain (6 dB - 18 dB) OUT+ Analog Noise Cancelling Block Mic1 or Mic2 Maximum AC Input Voltage