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LPV7215
SNOSAI6J – SEPTEMBER 2005 – REVISED AUGUST 2016
LPV7215 Micropower, CMOS Input, RRIO, 1.8-V, Push-Pull Output Comparator
1 Features
•
•
•
•
•
•
•
•
1
3 Description
+
(For V = 1.8 V, Typical Unless Otherwise Noted)
Ultra-Low Power Consumption: 580 nA
Wide Supply Voltage Range: 1.8 V to 5.5 V
Propagation Delay: 4.5 µs
Push-Pull Output Current Drive at 5 V 19 mA
Temperature Range: −40°C to 125°C
Rail-to-Rail Input
Tiny 5-Pin SOT-23 and SC70 Packages
2 Applications
•
•
•
•
•
RC Timers
Window Detectors
IR Receivers
Multivibrators
Alarm and Monitoring Circuits
The LPV7215 device is an ultra-low-power
comparator with a typical power supply current of
580 nA. It has the best-in-class power supply current
versus propagation delay performance available
among TI's low-power comparators. The propagation
delay is as low as 4.5 µs with 100-mV overdrive at
1.8-V supply.
Designed to operate over a wide range of supply
voltages, from 1.8 V to 5.5 V, with ensured operation
at 1.8 V, 2.7 V, and 5 V, the LPV7215 is ideal for use
in a variety of battery-powered applications. With railto-rail common-mode voltage range, the LPV7215 is
well suited for single-supply operation.
Featuring a push-pull output stage, the LPV7215
allows for operation with absolute minimum power
consumption when driving any capacitive or resistive
load.
Available in a choice of space-saving packages, the
LPV7215 is ideal for use in handheld electronics and
mobile phone applications. The LPV7215 is
manufactured with TI's advanced VIP50 process.
Device Information(1)
PART NUMBER
LPV7215
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
2.90 mm × 1.60 mm
SC70 (5)
2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Supply Current vs Supply Voltage
Propagation Delay vs Overdrive
900
18
VCM = 0.8V
+
V = 1.8V
TA = 25°C
85°C
700
600
PROPAGATION DELAY (Ps)
SUPPLY CURRENT (nA)
800
25°C
500
-40°C
400
300
200
13
tPD L-H
8
100
tPD H-L
0
0
1
2
3
4
SUPPLY VOLTAGE (V)
5
6
3
1
10
100
1000
OVERDRIVE (mV)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LPV7215
SNOSAI6J – SEPTEMBER 2005 – REVISED AUGUST 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
3
3
4
4
4
6
7
9
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: 1.8 V ...............................
Electrical Characteristics: 2.7 V ...............................
Electrical Characteristics: 5 V ...................................
Typical Characteristics ..............................................
Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 16
8
Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Applications ................................................ 20
9 Power Supply Recommendations...................... 24
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 24
11 Device and Documentation Support ................. 25
11.1
11.2
11.3
11.4
11.5
11.6
Device Support ....................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
25
12 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (April 2013) to Revision J
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Updated values in the Thermal Information table to align with JEDEC standards. ............................................................... 4
Changes from Revision H (April 2013) to Revision I
•
2
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 22
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SNOSAI6J – SEPTEMBER 2005 – REVISED AUGUST 2016
5 Pin Configuration and Functions
DBV and DCK Package
5-Pin SOT-23 and SC70
Top View
Pin Functions
PIN
NO.
NAME
1
VOUT
–
I/O
DESCRIPTION
O
Output
2
V
P
Negative Supply
3
VIN+
I
Noninverting Input
4
VIN–
I
Inverting Input
P
Positive Supply
+
5
V
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VIN differential
+
MIN
MAX
UNIT
−2.5
2.5
V
6
V
V− − 0.3
V+ + 0.3
V
150
°C
150
°C
−
Supply voltage (V - V )
Voltage at input and output pins
Junction temperature, TJ
(2)
−65
Storage temperature, Tstg
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA . All numbers apply for packages soldered directly onto a PCB.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM) (1)
±2000
Machine model (MM) (2)
±200
UNIT
V
Human-body model, applicable std. MIL-STD-883, Method 3015.7.
Machine model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22C101-C (ESD FICDM std. of JEDEC).
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Temperature
(1)
Supply voltage (V+ – V−)
(1)
MIN
MAX
UNIT
–40
125
°C
1.8
5.5
V
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA . All numbers apply for packages soldered directly onto a PCB.
6.4 Thermal Information
LPV7215
THERMAL METRIC
(1)
DBV (SOT-23)
DCK (SC70)
5 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance (2)
234
456
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
153
110.8
°C/W
RθJB
Junction-to-board thermal resistance
51.7
59.8
°C/W
ψJT
Junction-to-top characterization parameter
38
3.6
°C/W
ψJB
Junction-to-board characterization parameter
51.2
59
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
n/a
°C/W
(1)
(2)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA . All numbers apply for packages soldered directly onto a PCB.
6.5 Electrical Characteristics: 1.8 V
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 1.8V, V− = 0 V, and VCM = V+/2, VO= V−. (1)
PARAMETER
TEST CONDITIONS
TA = 25°C
VCM = 0.3 V
IS
Supply current
VOS
Input offset voltage
TCVOS
Input offset average drift
(5)
IB
Input bias current
IOS
Input offset current
(1)
(2)
(3)
(4)
(5)
4
See
(3)
580
790
VCM = 1.6 V
(2)
UNIT
750
980
nA
1300
±0.3
±6
±8
±0.4
Temperature
extremes
(4)
MAX
1050
Temperature
extremes
TA = 25°C
VCM = 1.8 V
TYP
Temperature
extremes
TA = 25°C
VCM = 0 V
(2)
Temperature
extremes
TA = 25°C
VCM = 1.5 V
MIN
±5
mV
±7
±1
µV/C
−40
fA
10
fA
Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using
statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
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Electrical Characteristics: 1.8 V (continued)
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 1.8V, V− = 0 V, and VCM = V+/2, VO= V−.(1)
PARAMETER
CMRR
Common-mode rejection ratio
TEST CONDITIONS
66
TA = 25°C
VCM Stepped from
Temperature
1.2 V to 1.8 V
extremes
68
TA = 25°C
VCM Stepped from
Temperature
0 V to 1.8 V
extremes
44
Power supply rejection ratio
V+ = 1.8 V to 5.5
V, VCM = 0 V
CMVR
Input common-mode voltage range
CMRR ≥ 40 dB
AV
Voltage gain
Output swing high
IO = 1 mA
VO
Output swing low
Source
VO = V+/2
Output current
Sink
VO = V+/2
66
Temperature
extremes
63
Temperature
Extremes
–0.1
TA = 25°C
1.63
Temperature
extremes
1.58
TA = 25°C
1.46
Temperature
extremes
1.37
Fall time
87
dB
77
82
dB
1.9
Temperature
extremes
Overdrive = 100
mV
Overdrive = 100
mV
V
dB
1.69
V
1.6
88
180
230
180
Temperature
extremes
TA = 25°C
UNIT
88
Temperature
extremes
310
mV
400
1.75
2.26
1.3
TA = 25°C
2.35
Temperature
extremes
1.45
mA
3.1
13
TA = 25°C
4.5
Temperature
extremes
Overdrive = 10 mV
tfall
(2)
43
TA = 25°C
Overdrive = 10 mV
Rise time
MAX
62
TA = 25°C
IO = −1 mA
Propagation delay
(low to high)
(3)
62
TA = 25°C
IO = −500 µA
Propagation delay
(high to low)
TYP
120
IO = 500 µA
trise
(2)
TA = 25°C
VCM Stepped from
Temperature
0 V to 0.7 V
extremes
PSRR
IOUT
MIN
6.5
µs
9
12.5
TA = 25°C
6.6
Temperature
extremes
9
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
80
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
75
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
70
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
65
ns
ns
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µs
12
5
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6.6 Electrical Characteristics: 2.7 V
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 2.7 V, V− = 0 V, and VCM = V+/2, VO= V−. (1)
PARAMETER
TEST CONDITIONS
MIN
(2)
TA = 25°C
VCM = 0.3 V
IS
Supply current
605
VOS
Input offset voltage
815
Temperature
extremes
TCVOS
Input offset average drift
(5)
IB
Input bias current
IOS
Input offset current
See
CMRR
Common-mode rejection ratio
Power supply rejection ratio
V+ = 1.8 V to 5.5
V, VCM = 0 V
CMVR
Input common-mode voltage range
CMRR ≥ 40 dB
AV
Voltage gain
Output swing high
IO = 1 mA
VO
Output swing low
6
1010
Temperature
extremes
66
71
±6
±5
47
Temperature
extremes
46
TA = 25°C
66
Temperature
extremes
63
Temperature
extremes
−0.1
TA = 25°C
2.57
Temperature
extremes
2.53
TA = 25°C
2.47
±1
µV/C
fA
20
fA
90
94
dB
80
82
dB
2.8
V
dB
2.62
V
2.53
2.4
60
Temperature
extremes
Temperature
extremes
mV
−40
63
TA = 25°C
Temperature
extremes
nA
±7
72
TA = 25°C
IO = −1 mA
(4)
(5)
±0.3
TA = 25°C
TA = 25°C
IO = −500 µA
(3)
780
120
IO = 500 µA
UNIT
±8
Temperature
extremes
TA = 25°C
VCM Stepped
from 2.1V to 2.7V Temperature
extremes
PSRR
(2)
Temperature
extremes
VCM = 1.8 V
VCM Stepped
from 0 V to 2.7 V
(1)
±0.3
(4)
VCM Stepped
from 0 V to 1.6 V
(2)
1350
TA = 25°C
VCM = 2.7 V
MAX
1100
TA = 25°C
VCM = 0 V
(3)
Temperature
extremes
TA = 25°C
VCM = 2.4 V
TYP
130
190
120
250
mV
330
Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using
statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
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Electrical Characteristics: 2.7 V (continued)
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 2.7 V, V− = 0 V, and VCM = V+/2, VO= V−.(1)
PARAMETER
TEST CONDITIONS
Source
VO = V+/2
IOUT
Output current
Sink
VO = V+/2
MIN
(2)
TA = 25°C
4.5
Temperature
extremes
3.4
TA = 25°C
5.6
Temperature
extremes
3.2
Overdrive = 10 mV
Propagation delay
(high to low)
Overdrive = 100
mV
TYP
trise
Overdrive = 100
mV
Rise time
tfall
Fall time
MAX
(2)
UNIT
5.7
mA
7.5
14.5
TA = 25°C
5.8
8.5
Temperature
extremes
10.5
Overdrive = 10 mV
Propagation delay
(low to high)
(3)
µs
15
TA = 25°C
7.5
10
Temperature
extremes
12.5
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
90
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
85
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
85
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
75
ns
ns
6.7 Electrical Characteristics: 5 V
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 5 V, V− = 0 V, and VCM = V+/2, VO= V−.
PARAMETER
TEST CONDITIONS
TA = 25°C
VCM = 0.3 V
IS
Supply current
VOS
Input offset voltage
VCM = 5 V
TCVOS
Input offset average drift
(5)
IB
Input bias current
IOS
Input offset current
(1)
(2)
(3)
(4)
(5)
See
612
(1)
MAX
(2)
825
1030
±0.3
±6
±8
TA = 25°C
±5
Temperature
extremes
±7
VCM = 4.5 V
nA
1400
Temperature
extremes
(4)
UNIT
790
1150
Temperature
extremes
TA = 25°C
VCM = 0 V
TYP
(3)
Temperature
extremes
TA = 25°C
VCM = 4.7 V
MIN
(2)
±1
mV
µV/C
−400
fA
20
fA
Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using
statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
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Electrical Characteristics: 5 V (continued)
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 5 V, V− = 0 V, and VCM = V+/2, VO= V−.
PARAMETER
CMRR
Common-mode rejection ratio
TEST CONDITIONS
72
TA = 25°C
VCM Stepped from
Temperature
4.4 V to 5 V
extremes
73
TA = 25°C
VCM Stepped from
Temperature
0 V to 5 V
extremes
53
Power supply rejection ratio
V+ = 1.8 V to 5.5
V, VCM = 0 V
CMVR
Input common-mode voltage range
CMRR ≥ 40 dB
AV
Voltage gain
Output swing high
IO = 1 mA
VO
Output swing low
Source
VO = V+/2
Output current
Sink
VO = V+/2
66
Temperature
extremes
63
Temperature
extremes
−0.1
4.86
TA = 25°C
4.82
Temperature
extremes
4.77
Fall time
92
dB
82
82
dB
5.1
Overdrive = 100
mV
Overdrive = 100
mV
dB
V
4.89
43
90
130
88
170
13
Temperature
extremes
7.5
14.5
17
mA
19
8.5
18
TA = 25°C
7.7
Temperature
extremes
µs
13.5
16
30
TA = 25°C
12
Temperature
extremes
µs
15
20
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
100
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
100
Overdrive = 10 mV
CL = 30 pF, RL = 1 MΩ
115
Overdrive = 100 mV
CL = 30 pF, RL = 1 MΩ
95
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mV
230
TA = 25°C
Temperature
extremes
V
4.94
Temperature
extremes
TA = 25°C
UNIT
98
Temperature
extremes
Overdrive = 10 mV
8
4.9
Temperature
extremes
Overdrive = 10 mV
tfall
(2)
49
TA = 25°C
IO = −1 mA
Rise time
MAX
67
TA = 25°C
IO = −500 µA
Propagation delay
(low to high)
(3)
120
IO = 500 µA
Propagation delay
(high to low)
TYP
66
TA = 25°C
TA = 25°C
trise
(2)
TA = 25°C
VCM Stepped from
Temperature
0 V to 3.9 V
extremes
PSRR
IOUT
MIN
(1)
ns
ns
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6.8 Typical Characteristics
At TJ = 25°C unless otherwise specified.
900
900
VCM = 0.8V
+
V = 1.8V
850
85°C
700
600
SUPPLY CURRENT (nA)
SUPPLY CURRENT (nA)
800
25°C
500
-40°C
400
300
200
800
85°C
750
25°C
700
650
-40°C
600
550
100
500
0
0
1
2
3
4
5
450
6
0
0.5
SUPPLY VOLTAGE (V)
Figure 1. Supply Current vs Supply Voltage
900
1
1.5
2
COMMON MODE INPUT (V)
Figure 2. Supply Current vs Common-Mode Input
900
+
+
V = 2.7V
V = 5V
SUPPLY CURRENT (nA)
SUPPLY CURRENT (nA)
850
800
750
700
85°C
650
25°C
600
550
800
85°C
700
25°C
600
-40°C
-40°C
500
450
0
500
0.5
1
1.5
2
2.5
3
0
COMMON MODE INPUT (V)
Figure 3. Supply Current vs Common-Mode Input
2
3
4
5
6
Figure 4. Supply Current vs Common-Mode Input
30
30
25
OUTPUT CURRENT SOURCING (mA)
OUTPUT CURRENT SINKING (mA)
1
COMMON MODE INPUT VOLTAGE (V)
-40°C
20
25°C
15
85°C
10
5
0
25
-40°C
20
25°C
15
85°C
10
5
0
1
2
3
4
5
1
6
SUPPLY VOLTAGE (V)
2
3
4
5
6
SUPPLY VOLTAGE (V)
Figure 5. Short-Circuit Sinking Current vs Supply Voltage
Figure 6. Short-Circuit Sourcing Current vs Supply Voltage
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Typical Characteristics (continued)
0.6
VCC = 1.8V
0.5
VCC = 2.7V
0.4
0.3
VCC = 5V
0.2
0.1
0
0
1
2
3
4
5
6
OUTPUT VOLTAGE REFERENCED TO GND (V)
OUTPUT VOLTAGE REFERENCED TO GND (V)
At TJ = 25°C unless otherwise specified.
0.6
0.5
85°C
0.4
25°C
0.3
-40°C
0.2
0.1
0
0
1
2
0.6
VCC = 2.7V
0.5
0.4
VCC = 5V
0.2
0.1
0
0
1
2
3
4
5
6
85°C
0.5
25°C
0.4
-40°C
0.3
0.2
0.1
0
0
3
4
5
6
25
VOD = 20 mV
VCM = V /2
85°C
PROPAGATION DELAY L-H (Ps)
PROPAGATION DELAY H-L (Ps)
2
Figure 10. Output Voltage High vs Source Current
VOD = 20 mV
+
25°C
11
10
-40°C
9
8
7
+
VCM = V /2
85°C
20
25°C
15
-40°C
10
5
6
1
2
3
4
5
1
6
2
3
4
5
6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 11. Propagation Delay vs Supply Voltage
10
1
SOURCE CURRENT (mA)
Figure 9. Output Voltage High vs Source Current
12
6
0.6
SOURCE CURRENT (mA)
13
5
Figure 8. Output Voltage Low vs Sink Current
OUTPUT VOLTAGE REFERENCED TO VCC (V)
OUTPUT VOLTAGE REFERENCED TO VCC (V)
Figure 7. Output Voltage Low vs Sink Current
0.3
4
SINK CURRENT (mA)
SINK CURRENT (mA)
VCC = 1.8V
3
Figure 12. Propagation Delay vs Supply Voltage
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Typical Characteristics (continued)
At TJ = 25°C unless otherwise specified.
15
18
PROPAGATION DELAY L-H (Ps)
PROPAGATION DELAY (Ps)
+
V = 1.8V
TA = 25°C
13
tPD L-H
8
1
10
100
VCM = 0.5V
13
12
11
85°C
10
9
25°C
8
-40°C
7
6
tPD H-L
3
+
V = 1.8V
14
5
1000
0
100
200
500
Figure 14. Propagation Delay vs Overdrive
14
18
+
V = 2.7V
VCM = 1.3V
12
11
10
9
85°C
8
25°C
7
-40°C
6
4
+
V = 1.8V
13
0
100
200
300
400
PROPAGATION DELAY L-H (Ps)
PROPAGATION DELAY L-H (Ps)
400
Figure 13. Propagation Delay vs Overdrive
5
VCM = 0.5V
16
14
12
85°C
10
25°C
-40°C
25°C
8
6
500
0
100
200
OVERDRIVE (mV)
300
400
500
OVERDRIVE (mV)
Figure 15. Propagation Delay vs Overdrive
Figure 16. Propagation Delay vs Overdrive
34
30
V+ = 5V
VCM = 2.5V
29
24
19
tPD L-H
14
9
+
V = 5.0V
28
VCM = 4.5V
26
24
22
85°C
20
25°C
18
-40°C
16
85°C
14
12
tPD H-L
4
10
PROPAGATION DELAY L-H (Ps)
PROPAGATION DELAY (Ps)
300
OVERDRIVE (mV)
OVERDRIVE (mV)
10
100
1000
10000
0
100
200
300
400
500
OVERDRIVE (mV)
OVERDRIVE (mV)
Figure 17. Propagation Delay vs Overdrive
Figure 18. Propagation Delay vs Overdrive
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Typical Characteristics (continued)
At TJ = 25°C unless otherwise specified.
12
+
V = 5V
30
VCM = 0.5V
PROPAGATION DELAY (Ps)
PROPAGATION DELAY L-H (Ps)
34
32
28
26
24
85°C
22
20
25°C
18
-40°C
-40°C
16
14
tPDL-H
10
+
V = 5V
8
tPDH-L
tPDL-H
6
+
tPDH-L
V = 1.8V
12
4
10
0
100
200
300
400
500
1
10
100
1000
OVERDRIVE (mV)
RESISTIVE LOAD (k:)
Figure 19. Propagation Delay vs Overdrive
Figure 20. Propagation Delay vs Resistive Load
80
20
V+ = 2.7V
+
V = 1.8V
40
IBIAS (fA)
IBIAS (fA)
0
-20
-40
0
-40
-60
-80
0.3
0
0.6
0.9
1.2
1.5
1.8
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
VCM (V)
VCM (V)
Figure 21. IBIAS vs VCM
Figure 22. IBIAS vs VCM
12
800
+
PROPAGATION DELAY L-H (Ps)
V = 5V
IBIAS (fA)
400
0
-400
-800
VOD = 20 mV
11.5
+
V = 1.8V
85°C
11
10.5
10
25°C
9.5
-40°C
9
8.5
8
7.5
-1200
0
1
2
3
4
0
5
Figure 23. IBIAS vs VCM
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
COMMON MODE VOLTAGE (V)
VCM (V)
12
10000
Figure 24. Propagation Delay vs Common-Mode Input
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Typical Characteristics (continued)
At TJ = 25°C unless otherwise specified.
13
VOD = 20 mV
+
V = 2.7V
85°C
14
13.5
13
25°C
12.5
12
-40°C
11.5
VOD = 20 mV
+
PROPAGATION DELAY H-L (Ps)
PROPAGATION DELAY L-H (Ps)
15
14.5
11
10.5
V = 5V
12
85°C
11
25°C
10
-40°C
9
10
0
0.5
1
1.5
2
2.5
0
3
1
Figure 25. Propagation Delay vs Common-Mode Input
4
5
1400
+
85°C
V = 5V
1200
23
OFFSET VOLTAGE (PV)
PROPAGATION DELAY L-H (Ps)
3
Figure 26. Propagation Delay vs Common-Mode Input
24
22
21
2
COMMON MODE INPUT VOLTAGE (V)
COMMON MODE VOLTAGE (V)
25°C
20
-40°C
19
18 VOD = 20 mV
+
V = 5V
17
0
1
2
85°C
1000
25°C
800
600
-40°C
400
200
3
4
0
5
0
1
2
3
4
5
COMMON MODE VOLTAGE (V)
COMMON MODE VOLTAGE (V)
Figure 27. Propagation Delay vs Common-Mode Input
Figure 28. Offset Voltage vs Common-Mode Input
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7 Detailed Description
7.1 Overview
The LPV7215 is a single-channel comparator with a push-pull output stage. This comparator is optimized for lowpower consumption and single-supply operation with greater than rail-to-rail input operation. The push-pull output
of the LPV7215 supports rail-to-rail output swing and interfaces with TTL/CMOS logic.
7.2 Functional Block Diagram
VCC
+
-
INVERTERS
INN
OUTPUT
INP
+
-
GND
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7.3 Feature Description
Low supply current and fast propagation delay distinguish the LPV7215 from other low-power comparators.
7.3.1 Input Stage
The LPV7215 has rail-to-rail input common-mode voltage range. It can operate at any differential input voltage
within this limit as long as the differential voltage is greater than zero. A differential input of zero volts may result
in oscillation.
The differential input stage of the comparator is a pair of PMOS and NMOS transistors, therefore, no current
flows into the device. The input bias current measured is the leakage current in the MOS transistors and input
protection diodes. This low bias current allows the comparator to interface with a variety of circuitry and devices
with minimal concern about matching the input resistances.
The input to the comparator is protected from excessive voltage by internal ESD diodes connected to both supply
rails. This protects the circuit from both ESD events, as well as signals that significantly exceed the supply
voltages. When this occurs the ESD protection diodes becomes forward-biased and draws current into these
structures, resulting in no input current to the terminals of the comparator. Until this occurs, there is essentially
no input current to the diodes. As a result, placing a large resistor in series with an input that may be exposed to
large voltages, limits the input current but have no other noticeable effect.
14
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Feature Description (continued)
7.3.2 Output Stage
The LPV7215 has a MOS push-pull rail-to-rail output stage. The push-pull transistor configuration of the output
keeps the total system power consumption to a minimum. The only current consumed by the LPV7215 is the less
than 1-µA supply current and the current going directly into the load. No power is wasted through the pullup
resistor when the output is low. The output stage is specifically designed with dead time between the time when
one transistor is turned off and the other is turned on (break-before-make) to minimize shoot through currents.
The internal logic controls the break-before-make timing of the output transistors. The break-before-make delay
varies with temperature and power condition.
7.3.3 Output Current
Even though the LPV7215 uses less than 1-µA supply current, the outputs are able to drive very large currents.
The LPV7215 can source up to 17 mA and can sink up to 19 mA, when operated at 5-V supply. This large
current handling capability allows driving heavy loads directly.
7.3.4 Response Time
Depending upon the amount of overdrive, the propagation delay is typically 6 to 30 µs. The curves showing
propagation delay vs overdrive in the Typical Characteristics section shows the delay time when the input is
preset with 100 mV across the inputs and then is driven the other way by 10 mV to 500 mV.
The output signal can show a step during switching depending on the load. A fast RC time constant due to both
small capacitive and resistive loads shows a significant step in the output signal. A slow RC time constant due to
either a large resistive or capacitive load has a clipped corner on the output signal. The step is observed more
prominently during a falling transition from high to low.
The plot in Figure 29 shows the output for single 5-V supply with a 100-kΩ resistor. The step is at 1.3 V.
5
4
VOUT (V)
3
2
1
0
TIME (2 Ps/DIV)
Figure 29. Output Signal Without Capacitive Load
The plot in Figure 30 shows the output signal when a 20-pF capacitor is added as a load. The step is at about
2.5 V.
5
VOUT (V)
4
3
2
1
0
TIME (2 Ps/DIV)
Figure 30. Output Signal With 20-pF Load
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7.4 Device Functional Modes
7.4.1 Capacitive and Resistive Loads
The propagation delay is not affected by capacitive loads at the output of the LPV7215. However, resistive loads
slightly affect the propagation delay on the falling edge by a reduction of almost 2 µs depending on the load
resistance value.
7.4.2 Noise
Most comparators have rather low gain. This allows the output to spend time between high and low when the
input signal changes slowly. The result is that the output may oscillate between high and low when the
differential input is near zero. The exceptionally high gain of this comparator, 120 dB, eliminates this problem.
Less than 1 µV of change on the input drives the output from one rail to the other rail. If the input signal is noisy,
the output cannot ignore the noise unless some hysteresis is provided by positive feedback (see Hysteresis).
7.4.3 Hysteresis
To improve propagation delay when low overdrive is needed, hysteresis can be added.
7.4.4 Inverting Comparator With Hysteresis
The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage
V+ of the comparator as shown in Figure 31. When VIN at the inverting input is less than VA, the voltage at the
noninverting node of the comparator (VIN < VA), the output voltage is high (for simplicity assume VO switches as
high as V+). The three network resistors can be represented as R1//R3 in series with R2.
The lower input trip voltage VA1 is defined as Equation 1.
VA1 = VCCR2 / ((R1//R3) + R2)
(1)
When VIN is greater than VA, the output voltage is low or very close to ground. In this case the three network
resistors can be presented as R2//R3 in series with R1.
The upper trip voltage VA2 is defined as Equation 2.
VA2 = VCC (R2//R3) / ((R1+ (R2//R3)
(2)
The total hysteresis provided by the network is defined as ΔVA = VA1 – VA2, as shown in Equation 3.
DVA =
16
+ VCCR1R 2
R1R 2 + R1R3 + R 2R3
(3)
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Device Functional Modes (continued)
Figure 31. Inverting Comparator With Hysteresis
7.4.5 Noninverting Comparator With Hysteresis
A noninverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the
inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise up
to VIN1 where VIN1 is calculated by Equation 4.
VIN1 =
VREF (R1 + R 2 )
R2
(4)
As soon as VO switches to VCC, VA steps to a value greater than VREF, which is given by Equation 5.
VA = VIN +
(VCC - VIN1) R1
R1 + R 2
(5)
To make the comparator switch back to its low state, VIN must equal VREF before VA again equals VREF. VIN2 can
be calculated by Equation 6.
VIN2 =
VREF (R1 + R 2 ) - VCC R1
R2
(6)
The hysteresis of this circuit is the difference between VIN1 and VIN2, as shown in Equation 7.
ΔVIN = VCCR1/R2
(7)
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Device Functional Modes (continued)
VCC
-
VREF
VA
VIN
VO
+
R1
RL
R2
Figure 32. Noninverting Comparator With Hysteresis
Figure 33. Noninverting Comparator With Hysteresis
7.4.6 Zero Crossing Detector
In a zero crossing detector circuit, the inverting input is connected to ground and the noninverting input is
connected to a 100-mVPP AC signal. As the signal at the noninverting input crosses 0 V, the comparator’s output
changes state.
Figure 34. Zero Crossing Detector
To improve switching times and to center the input threshold to ground a small amount of positive feedback is
added to the circuit. The voltage divider, R4 and R5, establishes a reference voltage, V1, at the positive input. By
making the series resistance, R1 plus R2 equal to R5, the switching condition, V1 = V2, is satisfied when VIN = 0.
The positive feedback resistor, R6, is made very large with respect to R5 (R6 = 2000 R5). The resultant hysteresis
established by this network is very small (ΔV1 < 10 mV) but it is sufficient to insure rapid output voltage
transitions. Diode D1 is used to insure that the inverting input terminal of the comparator never goes below
approximately −100 mV. As the input terminal goes negative, D1 will forward bias, clamping the node between R1
and R2 to approximately −700 mV. This sets up a voltage divider with R2 and R3 preventing V2 from going below
ground. The maximum negative input overdrive is limited by the current handling ability of D1.
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Device Functional Modes (continued)
VCC
R3
R1
R4
R2
-
VIN
V2
D1
VO
V1
+
R6
R5
Figure 35. Zero Crossing Detector With Positive Feedback
7.4.7 Threshold Detector
Instead of tying the inverting input to 0 V, the inverting input can be tied to a reference voltage. As the input on
the noninverting input passes the VREF threshold, the comparator’s output changes state. It is important to use a
stable reference voltage to ensure a consistent switching point.
Figure 36. Threshold Detector
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LPV7215 is an ultra-low-power comparator with a typical power supply current of 580 nA. It has the best-inclass power supply current versus propagation delay performance available among TI's low-power comparators.
The propagation delay is as low as 4.5 µs with 100-mV overdrive at 1.8-V supply.
8.2 Typical Applications
8.2.1 Square Wave Generator
R4
C1
VC
VO
+
R1
V+
VA
R2
R3
V+
0
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Figure 37. Square Wave Generator Schematic
8.2.1.1 Design Requirements
A typical application for a comparator is as a square wave oscillator. The circuit in Figure 38 generates a square
wave whose period is set by the RC time constant of the capacitor C1 and resistor R4. The maximum frequency
is limited by the large signal propagation delay of the comparator and by the capacitive loading at the output,
which limits the output slew rate.
8.2.1.2 Detailed Design Procedure
Figure 38. Square Wave Oscillator
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Typical Applications (continued)
Consider the output of Figure 38 to be high to analyze the circuit. That implies that the inverted input (VC) is
lower than the noninverting input (VA). This causes the C1 to be charged through R4, and the voltage VC
increases until it is equal to the noninverting input. The value of VA at this point is in Equation 8.
VA1 =
VCC ´ R 2
R 2 + R1 P R3
(8)
If R1 = R2 = R3 then VA1 = 2 VCC/3
At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point, as
shown in Equation 9:
VA2 =
VCC (R 2 P R3 )
R1 + (R 2 P R3 )
(9)
If R1 = R2 = R3 then VA2 = VCC/3
The capacitor C1 now discharges through R4, and the voltage VC decreases until it is equal to VA2, at which point
the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it
takes to discharge C1 from 2 VCC/3 to VCC/3, which is given by R4C1 × ln2. Hence the formula for the frequency is
given by Equation 10:
F = 1/(2 × R4 × C1 × ln2)
(10)
8.2.1.3 Application Curves
Figure 39 shows the simulated results of an oscillator using the following values:
1.
2.
3.
4.
R1 = R2 = R3 = R4 = 100 kΩ
C1 = 100 pF, CL = 20 pF
V+ = 5 V, V– = GND
CSTRAY (not shown) from Va to GND = 10 pF
6
VOUT
5
Va
VOUT (V)
4
3
2
1
Vc
0
-1
0
10
20
30
40
50
TIME (µs)
Figure 39. Square Wave Oscillator Output Waveform
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Typical Applications (continued)
8.2.2 Window Detector
A window detector monitors the input signal to determine if it falls between two voltage levels.
The comparator outputs A and B are high only when VREF1 < VIN < VREF2 or within the window. These are defined
as:
VREF1 = R3 / (R1+ R2 + R3) × V+
VREF2 = (R2+ R3) / (R1 + R2 + R3) × V+
(11)
(12)
Others names for window detectors are: threshold detector, level detectors, and amplitude trigger or detector.
V+
R1
VREF2
+
A
OUTPUT A
B
OUTPUT B
R2
VIN
+
VREF1
R3
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Figure 40. Window Detector
VIN
V
OUTPUT B
+
VREF2
VREF1
OUTPUT A
BOTH OUTPUTS
ARE HIGH
Figure 41. Window Detector Output Signal
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Typical Applications (continued)
8.2.3 Crystal Oscillator
A simple crystal oscillator using the LPV7215 is shown in Figure 42. Resistors R1 and R2 set the bias point at the
comparator’s noninverting input. Resistors, R3 and R4 and capacitor C1 set the inverting input node at an
appropriate DC average level based on the output. The crystal’s path provides resonant positive feedback and
stable oscillation occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor
tolerances and to a lesser extent by the comparator offset.
Copyright © 2016, Texas Instruments Incorporated
Figure 42. Crystal Oscillator
8.2.4 IR Receiver
The LPV7215 can also be used as an infrared receiver. The infrared photo diode creates a current relative to the
amount of infrared light present. The current creates a voltage across RD. When this voltage level crosses the
voltage applied by the voltage divider to the inverting input, the output transitions.
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Figure 43. IR Receiver
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9 Power Supply Recommendations
Comparators are very sensitive to input noise. To minimize supply noise, power supplies must be capacitively
decoupled by a 0.01-µF ceramic capacitor in parallel with a 10-µF electrolytic capacitor.
10 Layout
10.1 Layout Guidelines
Proper grounding and the use of a ground plane help ensure the specified performance of the LPV7215.
Minimizing trace lengths, reducing unwanted parasitic capacitance and using surface-mount components also
helps.
10.2 Layout Example
Figure 44. LPV7215 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti
DIP Adapter Evaluation Module, http://www.ti.com/tool/dip-adapter-evm
TI Universal Operational Amplifier Evaluation Module, http://www.ti.com/tool/opampevm
11.1.2 Documentation Support
11.1.2.1 Related Documentation
For related documentation, see the following
AN-74 - A Quad of Independently Functioning Comparators (SNOA654).
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LPV7215MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
C30A
LPV7215MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
C30A
LPV7215MG/NOPB
ACTIVE
SC70
DCK
5
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
C37
LPV7215MGX/NOPB
ACTIVE
SC70
DCK
5
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
C37
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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