OPA4132PA

® OPA 132 OPA 2132 OPA 4132 OPA 132 OPA 2132 OPA 4132 OPA132 OPA2132 OPA4132 High Speed FET-INPUT OPERATIONAL AMPLIFIERS FEATURES q FET INPUT: IB = 50pA max q WIDE BANDWIDTH: 8MHz q HIGH SLEW RATE: 20V/µs q LOW NOISE: 8nV/√Hz (1kHz) q LOW DISTORTION: 0.00008% q HIGH OPEN-LOOP GAIN: 130dB (600Ω load) q WIDE SUPPLY RANGE: ±2.5 to ±18V q LOW OFFSET VOLTAGE: 500µV max q SINGLE, DUAL, AND QUAD VERSIONS Offset Trim –In +In V– 1 2 3 4 8-Pin DIP, SO-8 OPA132 8 7 6 5 Offset Trim V+ Output NC DESCRIPTION The OPA132 series of FET-input op amps provides high-speed and excellent dc performance. The combination of high slew rate and wide bandwidth provide fast settling time. Single, dual, and quad versions have identical specifications for maximum design flexibility. High performance grades are available in the single and dual versions. All are ideal for generalpurpose, audio, data acquisition and communications applications, especially where high source impedance is encountered. OPA132 op amps are easy to use and free from phase inversion and overload problems often found in common FET-input op amps. Input cascode circuitry provides excellent common-mode rejection and maintains low input bias current over its wide input voltage range. OPA132 series op amps are stable in unity gain and provide excellent dynamic behavior over a wide range of load conditions, including high load capacitance. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. Single and dual versions are available in 8-pin DIP and SO-8 surface-mount packages. Quad is available in 14-pin DIP and SO-14 surface-mount packages. All are specified for –40°C to +85°C operation. International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • © 1995 Burr-Brown Corporation OPA2132 Out A –In A +In A V– 1 2 3 4 8-Pin DIP, SO-8 A B 8 7 6 5 V+ Out B –In B +In B OPA4132 Out A –In A +In A V+ +In B –In B Out B 1 2 A 3 4 5 B 6 7 14-Pin DIP SO-14 C 9 8 –In C Out C D 12 11 10 +In D V– +In C 14 13 Out D –In D • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PDS-1309B PDS-1309B Printed in U.S.A. December, 1995 SPECIFICATIONS At TA = +25°C, VS = ±15V, unless otherwise noted. OPA132P, U OPA2132P, U PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature(1) vs Power Supply Channel Separation (dual and quad) INPUT BIAS CURRENT Input Bias Current(2) vs Temperature Input Offset Current(2) NOISE Input Voltage Noise Noise Density, f = 10Hz f = 100Hz f = 1kHz f = 10kHz Current Noise Density, f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain (V–)+2.5 96 CONDITION MIN TYP ±0.25 ±2 5 0.2 MAX ±0.5 ±10 15 MIN OPA132PA, UA OPA2132PA, UA OPA4132PA, UA TYP ±0.5 * * * * * * MAX ±2 * 30 UNITS mV µV/°C µV/V µV/V pA pA Operating Temperature Range VS = ±2.5V to ±18V RL = 2kΩ VCM = 0V VCM = 0V +5 ±50 See Typical Curve ±2 ±50 * * 23 10 8 8 3 ±13 100 1013 || 2 1013 || 6 110 110 110 120 126 130 8 ±20 0.7 1 0.5 0.00008 0.00009 (V+)–1.2 (V–)+0.5 (V+)–1.5 (V–)+1.2 (V+)–2.5 (V–)+2.2 (V+)–0.9 (V–)+0.3 (V+)–1.2 (V–)+0.9 (V+)–2.0 (V–)+1.9 ±40 See Typical Curve ±15 ±4 * * * * * * 104 104 104 (V+)–2.5 * 86 * * * * * * 94 * * * 120 120 * * * * * * * * * * * * * * * * ±18 ±4.8 +85 +125 * * * * * * * * * * * * * nV/√Hz nV/√Hz nV/√Hz nV/√Hz fA/√Hz V dB Ω || pF Ω || pF dB dB dB MHz V/µs µs µs µs % % V V V V V V mA VCM = –12.5V to +12.5V VCM = –12.5V to +12.5V RL = 10kΩ, VO = –14.5V to +13.8V RL = 2kΩ, VO = –13.8V to +13.5V RL = 600Ω, VO = –12.8V to +12.5V FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise G = –1, 10V Step, CL = 100pF G = –1, 10V Step, CL = 100pF G = ±1 1kHz, G = 1, VO = 3.5Vrms RL = 2kΩ RL = 600Ω RL = 10kΩ RL = 2kΩ RL = 600Ω OUTPUT Voltage Output, Positive Negative Positive Negative Positive Negative Short-Circuit Current Capacitive Load Drive (Stable Operation) POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current (per amplifier) TEMPERATURE RANGE Operating Range Storage Thermal Resistance, θJA 8-Pin DIP SO-8 Surface-Mount 14-Pin DIP SO-14 Surface-Mount *Specifications same as OPA132P, OPA132U. ±2.5 IO = 0 –40 –40 V V mA °C °C °C/W °C/W °C/W °C/W 100 150 80 110 NOTES: (1) Guaranteed by wafer test. (2) High-speed test at TJ = 25°C. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® OPA132, 2132, 4132 2 ABSOLUTE MAXIMUM RATINGS Supply Voltage, V+ to V– .................................................................... 36V Input Voltage .................................................... (V–) –0.7V to (V+) +0.7V Output Short-Circuit(1) .............................................................. Continuous Operating Temperature ................................................. –40°C to +125°C Storage Temperature ..................................................... –40°C to +125°C Junction Temperature ...................................................................... 150°C Lead Temperature (soldering, 10s) ................................................. 300°C NOTE: (1) Short-circuit to ground, one amplifier per package. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE INFORMATION MODEL Single OPA132PA OPA132P OPA132UA OPA132U Dual OPA2132PA OPA2132P OPA2132UA OPA2132U Quad OPA4132PA OPA4132UA PACKAGE 8-Pin Plastic DIP 8-Pin Plastic DIP SO-8 Surface-Mount SO-8 Surface-Mount 8-Pin Plastic DIP 8-Pin Plastic DIP SO-8 Surface-Mount SO-8 Surface-Mount 14-Pin Plastic DIP SO-14 Surface-Mount PACKAGE DRAWING NUMBER(1) 006 006 182 182 006 006 182 182 010 235 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. ORDERING INFORMATION MODEL Single OPA132PA OPA132P OPA132UA OPA132U Dual OPA2132PA OPA2132P OPA2132UA OPA2132U Quad OPA4132PA OPA4132UA PACKAGE 8-Pin Plastic DIP 8-Pin Plastic DIP SO-8 Surface-Mount SO-8 Surface-Mount 8-Pin Plastic DIP 8-Pin Plastic DIP SO-8 Surface-Mount SO-8 Surface-Mount 14-Pin Plastic DIP SO-14 Surface-Mount TEMPERATURE RANGE –40°C –40 °C –40 °C –40°C –40 °C –40°C –40°C –40°C to to to to to to to to +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C –40°C to +85°C –40°C to +85°C ® 3 OPA132, 2132, 4132 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. OPEN-LOOP GAIN/PHASE vs FREQUENCY 160 140 120 –45 0 POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 120 100 –PSR Voltage Gain (dB) 80 60 40 20 0 –20 0.1 1 10 100 1k 10k 100k 1M G –90 Phase Shift (°) φ PSR, CMR (dB) 100 80 60 40 20 0 +PSR CMR –135 –180 10M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 1k CHANNEL SEPARATION vs FREQUENCY 160 RL = ∞ Channel Separation (dB) Voltage Noise (nV/√Hz) Current Noise (fA/√Hz) 140 100 Voltage Noise 10 120 Dual and quad devices. G = 1, all channels. Quad measured channel A to D or B to C—other combinations yield improved rejection. 100 1k Frequency (Hz) RL = 2kΩ 100 Current Noise 1 1 10 100 1k Frequency (Hz) 10k 100k 1M 80 10k 100k INPUT BIAS CURRENT vs TEMPERATURE 100k 10k Input Bias Current (pA) 10 INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE 9 High Speed Test High Speed Test Warmed Up Input Bias Current (pA) 0 25 50 75 100 125 8 7 6 5 4 3 2 1 0 1k 100 Dual 10 1 0.1 –75 –50 –25 Ambient Temperature (°C) Single Quad –15 –10 –5 0 5 10 15 Common-Mode Voltage (V) ® OPA132, 2132, 4132 4 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. AOL, CMR, PSR vs TEMPERATURE 130 4.3 QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 60 Quiescent Current Per Amp (mA) AOL, CMR, PSR (dB) 120 Open-Loop Gain 4.1 110 ±ISC ±IQ 40 PSR 4.0 30 100 CMR 90 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 3.9 20 3.8 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 10 OFFSET VOLTAGE PRODUCTION DISTRIBUTION 12 10 Typical production distribution of packaged units. Single, dual and quad units included. 12 10 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Typical production distribution of packaged units. Single, dual and quad units included. Percent of Amplifiers (%) 8 6 4 2 0 Percent of Amplifiers (%) 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 –1400 –1200 –1000 –800 –600 –400 –200 1000 1200 1400 200 400 600 800 Offset Voltage (µV) Offset Voltage Drift (µV/°C) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.01 RL 2kΩ 600Ω 0.001 G = +10 30 MAXIMUM OUTPUT VOLTAGE vs FREQUENCY VS = ±15V Maximum output voltage without slew-rate induced distortion Output Voltage (Vp-p) THD+Noise (%) 20 0.0001 G = +1 VO = 3.5Vrms 0.00001 10 100 1k Frequency (Hz) 10k 100k 10 VS = ±5V VS = ±2.5V 10k 100k Frequency (Hz) 1M 10M 0 8.0 0 Short-Circuit Current (mA) ® 4.2 50 5 OPA132, 2132, 4132 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE G =1, CL = 100pF LARGE-SIGNAL STEP RESPONSE G = 1, CL = 100pF 50mV/div 5V/div 200ns/div 1µs/div SETTLING TIME vs CLOSED-LOOP GAIN 100 SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 60 50 G = +1 G = –1 Settling Time (µs) Overshoot (%) 10 0.01% 40 30 20 10 FPO 0.1% 1 0.1 ±1 ±10 ±100 ±1000 Closed-Loop Gain (V/V) G = ±10 0 100pF 1nF Load Capacitance 10nF OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 15 14 Output Voltage Swing (V) VIN = 15V –55°C 25°C 25°C 125°C 85°C 125°C 85°C 13 12 11 10 –10 –11 –12 –13 –14 –15 0 VIN = –15V 10 20 30 40 25°C –55°C 50 60 Output Current (mA) ® OPA132, 2132, 4132 6 APPLICATIONS INFORMATION OPA132 series op amps are unity-gain stable and suitable for a wide range of general-purpose applications. Power supply pins should be bypassed with 10nF ceramic capacitors or larger. OPA132 op amps are free from unexpected output phasereversal common with FET op amps. Many FET-input op amps exhibit phase-reversal of the output when the input common-mode voltage range is exceeded. This can occur in voltage-follower circuits, causing serious problems in control loop applications. OPA132 series op amps are free from this undesirable behavior. All circuitry is completely independent in dual and quad versions, assuring normal behavior when one amplifier in a package is overdriven or short-circuited. OPERATING VOLTAGE OPA132 series op amps operate with power supplies from ±2.5V to ±18V with excellent performance. Although specifications are production tested with ± 15V supplies, most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the typical performance curves. OFFSET VOLTAGE TRIM Offset voltage of OPA132 series amplifiers is laser trimmed and usually requires no user adjustment. The OPA132 (single op amp version) provides offset voltage trim connections on pins 1 and 8. Offset voltage can be adjusted by connecting a potentiometer as shown in Figure 1. This adjustment should be used only to null the offset of the op amp, not to adjust system offset or offset produced by the signal source. Nulling offset could degrade the offset voltage drift behavior of the op amp. While it is not possible to predict the exact change in drift, the effect is usually small. 10nF V+ Trim Range: ±4mV typ 100kΩ 7 2 3 10nF 1 8 OPA132 4 6 OPA132 single op amp only. Use offset adjust pins only to null offset voltage of op amp—see text. V– FIGURE 1. OPA132 Offset Voltage Trim Circuit. INPUT BIAS CURRENT The FET-inputs of the OPA132 series provide very low input bias current and cause negligible errors in most applications. For applications where low input bias current is crucial, junction temperature rise should be minimized. The input bias current of FET-input op amps increases with temperature as shown in the typical performance curve “Input Bias Current vs Temperature.” The OPA132 series may be operated at reduced power supply voltage to minimize power dissipation and temperature rise. Using ±3V supplies reduces power dissipation to one-fifth that at ±15V. The dual and quad versions have higher total power dissipation than the single, leading to higher junction temperature. Thus, a warmed-up quad will have higher input bias current than a warmed-up single. Furthermore, an SOIC will generally have higher junction temperature than a DIP at the same ambient temperature because of a larger θJA. Refer to the specifications table. Circuit board layout can also help minimize junction temperature rise. Temperature rise can be minimized by soldering the devices to the circuit board rather than using a socket. Wide copper traces will also help dissipate the heat by acting as an additional heat sink. Input stage cascode circuitry assures that the input bias current remains virtually unchanged throughout the full input common-mode range of the OPA132 series. See the typical performance curve “Input Bias Current vs CommonMode Voltage.” ® 7 OPA132, 2132, 4132