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PTB48580AAZ

PTB48580AAZ

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    DIP8

  • 描述:

    CONV DC-DC +-5V 3A DUAL SMD

  • 数据手册
  • 价格&库存
PTB48580AAZ 数据手册
Not Recommended for New Designs PTB48580 Series Dual Complementary-Output DC/DC Converter for DSL SLTS240 DECEMBER 2004 Features • Dual Complementary Outputs (±5 V, ±12 V) • Input Voltage Range: 36 V to 75 V • On/Off Enable for Sequencing • 1500 VDC Isolation • Over-Current Protection • Over-Temperature Shutdown • Under-Voltage Lockout • • • • • Temp Range: –40 to +85 °C Industry Standard Outline Fixed Frequency Operation Synchronizes with PTB48500 Powers line driver ICs for AC-7 and other xDSL chipsets • Safety Approvals: (Pending): EN60950 UL/cUL60950 Description Pin Configuration The PTB48580 series of isolated DC/DC converter modules produce a complementary pair of regulated supply voltages for powering line-driver ICs in xDSL telecom applications. The modules operate from a standard telecom (-48 V) central office (CO) supply and can provide up to a 30 W of power in a balanced load configuration. The A-suffix module (±5 V) is designed to power the line driver ICs for the AC-7 ADSL chipset. Other voltage options will power other analog applications requiring a complementary supply with relatively balanced loads. The outputs can also be easily configured for single-ended use. The modules incorporate an On/Off enable control, output current limit, over-temperature protection, and input Pin under-voltage lockout (UVLO) as standard features. The control inputs, “Enable” and “Sync In,” are compatible with the “EN Out” and “Sync Out” signals of the PTB48500 DC/DC converter. This allows the power-up and switching frequency of the PTB48580 series to be directly controlled from a PTB48500. Together a PTB48500 and a PTB48580A converter meet all the system power and sequencing requirements of an AC-7 ADSL chipset. The PTB48580 series uses doublesided surface mount contruction. The package size is based on an industry standard outline and does not require a heatsink. Both through-hole and surface mount pin configurations are available. 1 2 3 4 5 6 7 8 Shaded functions indicate signals that are referenced to –V I. * Denotes negative logic: Open = Outputs Off = Normal operation –VI Stand-Alone Application PTB48580 +VI +VO 1 2 3 +VI +VO 5 L O A D Sync In ±VO Adj Enable COM 7 6 COM –VI 4 L O A D –VI –VO –VO For technical support and further information visit http://power.ti.com 8 Function +VI Sync In Enable * –V I +VO COM VO Adjust –V O Not Recommended for New Designs PTB48580 Series Dual Complementary-Output DC/DC Converter for DSL SLTS240 DECEMBER 2004 Ordering Information Base Pt. No. (PTB48580xxx) Output Voltage (PTB48580❒xx) Package Options (PT48580x❒❒) Order Prefix PTB48580xxx Code A B Code AH AS Description Basic Model Voltage ±5 V ±12 V Description Horiz. T/H SMD, Standard (2) Pkg Ref. (1) (ERV) (ERS) Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout (2) “Standard” option specifies 63/37, Sn/Pb pin solder material. Pin Descriptions +VI : The positive input supply for the module with respect to –VI. When powering the module from a –48 V telecom central office supply, this input is connected to the primary system ground. ±VO Adjust: Using a single resistor, this pin allows the magnitude of both ‘+VO’ and ‘–VO’ to be adjusted together, either higher or lower than their preset value. If not used, this pin should be left open circuit. –VI: The negative input supply for the module, and the 0 VDC reference for the ‘Enable*’, and ‘Sync In’ signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. Enable*: This is an open-collector (open-drain) negative logic input that enables the module output. This pin is referenced to -V I. A logic ‘0’ at this pin enables the module’s outputs, and a high impedance disables the outputs. If this feature is not used the pin should be connected to –VI. Note: Connecting this input directly to the “EN Out” pin of the PTB4850x enables the output voltages from both converters (PTB4850x and PTB48580) to power up in sequence. +VO: The positive output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘+VO’ has the same magnitude, but is the complement to that at ‘-VO’. –VO: The negative output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘-VO’ has the same magnitude, but is the complement to that at ‘+VO’. COM: The secondary return reference for the module’s regulated output voltages. This node is dc isolated from the input supply pins. Environmental and General Specifications Sync In: This pin is used when the PTB48580 and PTB4850x DC/DC converter modules are used together. Connecting this pin to the ‘Sync Out’ of the PTB4850x module allows the PTB48580 to be synchronized to the same switch conversion frequency as the PTB4850x. (Unless otherwise stated, all voltages are with respect to –VI) Characteristics Symbols Conditions Min Typ Max Units Input Voltage Range Isolation Voltage Capacitance Resistance Operating Temperature Range Over-Temperature Protection VI 36 1500 — 10 –40 — — 48 — 1500 — — 115 (i) 10 TREFLOW TS –40 — 75 — — — +85 — — 235 (ii) 125 VDC V pF MΩ °C Solder Reflow Temperature Storage Temperature Mechanical Shock Over output load range Input–output/input–case Input to output Input to output Over VI Range Shutdown threshold Hysterisis Surface temperature of module body or pins — Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted Mil-STD-883D, Method 2007.2 T/H 20-2000 Hz SMD TA OTP Mechanical Vibration Weight Flammability — — °C °C °C — 500 — G’s — — — 20 5 13.5 — — — grams G’s Meets UL 94V-O Notes: (i) This parameter is guaranteed be design (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. For technical support and further information visit http://power.ti.com Not Recommended for New Designs PTB48580A Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS240 DECEMBER 2004 (Unless otherwise stated, T A =25°C, VI =48 V, C I =0 µF, ±CO =0 µF, |+I O | = |–I O |, and |±I O | =0.5 |±IO |max) PTB48580A Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage PO |±IO | |+IO | – |–IO | |±VO | 0 0 0 4.75 (2) — — — 5 30 (1) 3 (2) 1 (3) 5.25 (2) W A A V Temperature Variation Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) ∆Regtemp ∆Regline ∆Regload η ±Vr — — — — — ±1 ±0.1 ±0.2 86 25 — ±0.4 ±0.4 — 50 (4) %VO %VO %VO % mVpp Transient Response tS ∆VO pk IOtrip Total output power from ±VO Over VI range, |+IO | – |–IO | ≤ 0.1 A |+IO | ≥0.1 A, |–IO | ≥ 0.1 A Inlcudes set-point, line, |+IO | – |–IO | ≤ 0.1 A –40 ≤TA ≤+85°C –40 ≤TA ≤ +85°C, |±IO | =0.1 A ±VO Over VI range, balanced load ±VO Over ±IO range, balanced load ±VO PO =PO max 20 MHz bandwidth, CO =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±IO max |±VO| over/undershoot VI =36 V reset followed by auto-recovery Continuous over-current trip, |±IO |PK |+IO | = |–IO | Duty |+VO | and |–VO | adjust simulataneously Over VI and IO ranges VI increasing VI decreasing Referenced to –VI (pin 4) — — 3.3 30 ±1 4.3 — — 5.3 µs %VO A — — 3.5 440 — — 6.5 10 — 470 (6) 33 32 — — 6 (5) 500 — — A % V kHz V +3.6 –0.2 — — — — 0 — — — 2 10 2 — +75 (7) +0.8 –1 — — — 2,000 (8) V 2.8 — — 106 Hrs Over Current Threshold Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout |±VO | adj ƒS VIon VIoff On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability VIH VIL IIL II standby tON CI CO MTBF Notes: (1) (2) (3) (4) (5) (6) (7) pin 3 open circuit |±IO | =1 A, |±VO | rising 0 to 0.95 |±VO | TYP Capacitance from either output to COM (pin 6) Per Telcordia SR-332 50% stress, TA =40°C, ground benign mA mA ms µF µF See Safe Operating Area curves or contact the factory for the appropriate derating. Under balanced load conditions, load current flowing out of +VO is balanced to within ±0.1 A of that flowing into –VO . A load imbalance is the difference in current flowing from +V O to –VO . The module can operate with a higher imbalance but with reduced specifications. Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V O (pin 5) or –VO (pin 8), to COM (pin 6). When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’s maximum power rating. This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com Not Recommended for New Designs PTB48580A Typical Characteristics Dual Complementary-Output DC/DC Converter for DSL SLTS240 DECEMBER 2004 PTB48580A Characteristic Data @VI =48 V (See Notes A) Safe Operating Area PTB48580A Efficiency vs Load Current (See Note B) (See Note C) Balanced Load, VI =48 VDC (See Note B) 90 90 80 Ambient Temperature – °C Efficiency – % 80 70 60 50 Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 40 20 0 0.5 1 1.5 2 2.5 3 |±IO| – Balanced Output Current – A 0 0.5 1 1.5 2 2.5 3 |±IO| – Balanced Output Current – A Power Dissipation vs Load Current (See Note B) P D – Power Dissipation – W 6 5 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 |±IO| – Balanced Output Current – A Cross Regulation, ∆|+V O| vs |–IO|, with |+IO| = 1 A |+VO| – Cross Regulation – mV 300 200 100 0 -100 -200 -300 0 0.5 1 1.5 2 2.5 3 |–IO| – Output Current – A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 1 A |-VO| – Cross Regulation – mV 300 200 100 0 -100 -200 -300 0 0.5 1 1.5 2 2.5 3 |+IO| – Output Current – A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +V O is equal to that flowing into –VO. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 2 oz. copper. For technical support and further information visit http://power.ti.com Not Recommended for New Designs PTB48580B Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS240 DECEMBER 2004 (Unless otherwise stated, T A =25°C, VI =48 V, C I =0 µF, ±CO =0 µF, |+I O | = |–I O |, and |±I O | =0.5 |±IO |max) PTB48580B Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage PO |±IO | |+IO | – |–IO | |±VO | 0 0 0 11.6 (2) — — — 12 30 (1) 1.25 (2) 0.5 (3) 12.4 (2) W A A V Temperature Variation Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) ∆Regtemp ∆Regline ∆Regload η ±Vr — — — — — ±1 ±0.1 ±0.1 88 50 — ±0.5 ±1 — 100 (4) %VO %VO %VO % mVpp Transient Response tS ∆VO pk IOtrip Total output power from ±VO Over VI range, |+IO | – |–IO | ≤ 0.1 A |+IO | ≥0.1 A, |–IO | ≥ 0.1 A Inlcudes set-point, line, |+IO | – |–IO | ≤ 0.1 A –40 ≤TA ≤+85°C –40 ≤TA ≤ +85°C, |±IO | =0.1 A ±VO Over VI range, balanced load ±VO Over ±IO range, balanced load ±VO PO =PO max 20 MHz bandwidth, CO =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±IO max |±VO | over/undershoot VI =36 V reset followed by auto-recovery Continuous over-current trip, |±IO |PK |+IO | = |–IO | Duty |+VO | and |–VO | adjust simulataneously Over VI and IO ranges VI increasing VI decreasing Referenced to –VI (pin 4) — — 1.4 30 ±1 1.9 — — 2.4 µs %VO A — — 6.5 440 — — 3 10 — 480 (6) 33 32 — — 13.4 (5) 520 — — A % V kHz V +3.6 –0.2 — — — — 0 — — — 2 10 2 — +75 (7) +0.8 –1 — — — 1,500 (8) V 2.8 — — 106 Hrs Over Current Threshold Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability |±VO | adj ƒS VIon VIoff VIH VIL IIL II standby tON CI CO MTBF pin 3 open circuit |±IO | =1 A, |±VO | rising 0 to 0.95 |±VO | TYP Capacitance from either output to COM (pin 6) Per Telcordia SR-332 50% stress, TA =40°C, ground benign mA mA ms µF µF Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +VO is balanced to within ±0.1 A of that flowing into –VO . (3) A load imbalance is the difference in current flowing from +V O to –VO . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10-µF tantalum capacitor connected from +VO (pin 5) or –V O (pin 8), to COM (pin 6). (5) When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’s maximum power rating. (6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. (7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com Not Recommended for New Designs PTB48580B Typical Characteristics Dual Complementary-Output DC/DC Converter for DSL SLTS240 DECEMBER 2004 PTB48580B Characteristic Data @VIN =48 V (See Notes A) Safe Operating Area PTB48580B (See Note C) Balanced Load, VI =48 VDC (See Note B) Efficiency vs Load Current (See Note B) 90 90 Ambient Temperature – °C 80 Efficiency – % 80 70 60 50 70 Airflow 200LFM 100LFM Nat conv 60 50 40 30 40 20 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A Power Dissipation vs Load Current (See Note B) P D – Power Dissipation – W 5 4 3 2 1 0 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 0.6 A |+VO| – Cross Regulation – mV 300 200 100 0 -100 -200 -300 0 0.25 0.5 0.75 1 1.25 |–IO| – Output Current – A Cross Regulation, ∆|–V O| vs |+IO|, with |–IO| = 0.6 A |–VO| – Cross Regulation – mV 300 200 100 0 -100 -200 -300 0 0.25 0.5 0.75 1 1.25 |+IO| – Output Current – A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 2 oz. copper. For technical support and further information visit http://power.ti.com Not Recommended for New Designs Application Notes PTB48580 Series Adjusting the Output Voltages of the PTB48580 Series of DC/DC Converters The PTB48580 series of DC/DC converters produce a balanced pair of complementary output voltages. They are identified +VO and -VO , respectively. The magnitude of both output voltages can be adjusted together as a pair, higher or lower, by up to ±10% of their nominal. The adjustment method uses a single external resistor. 1 The value of the resistor determines the magnitude of the adjustment, and its placement determines whether the magnitude is increased or decreased. The resistor values can be calculated using the appropriate formula (see below). The formula constants are given in Table 1-1. The placement of each resistor is as follows. Adjust Up: To increase the magnitude (3) of both output voltages, place a resistor R1 between ±VO Adj (pin 7) and the -VO (pin 8) voltage rail; see Figure 1-1(a). Figure 1-1a PTB48580 +VO Calculation of Resistor Adjust Values The value of the adjust resistor is calculated using one of the following equations. Use the equation for R1 to adjust up, or (R2) to adjust down. R1 [Adjust Up] = VR RO 2 (VA – VO ) (R2) [Adjust Down] = RO (2 VA – VR ) – RS kΩ 2 (VO – VA ) Where: VO VA VR RO RS = = = = = – RS kΩ Magitude of the original ±VO Magnitude of the adjusted voltage The reference voltage from Table 1-1 The resistance value in Table 1-1 The series resistance from Table 1-1 +VO 5 Table 1-1 ADJUSTMENT RANGE AND FORMULA PARAMETERS ±VO Adj 7 Series Pt. No. 6 VO (nom) VA (min) VA (max) (3) VR RO (kΩ) Ω) RS (kΩ COM R1 Adjust Up –VO 8 –VO Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R2), between V O Adj (pin 7) and the +VO (pin 5) voltage rail; see Figure 1-1(b). PTB48580A PTB48580B 5V 3.5 V 6V 2.495 V 7.5 9.09 12 V 6.5 V 13.4 V 2.495 V 18.2 16.9 Notes: 1. A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R1 or (R2) location, as close to the converter as possible. 2. Never connect capacitors to the ±VO Adj pin. Capacitance added to this pin can affect the stability of the regulated output. Figure 1-1b PTB48580 +VO +VO 5 (R2) Adj Down ±VO Adj 7 6 COM 8 –VO For technical support and further information visit http://power.ti.com –VO 3. When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’s maximum power rating of 30 W. For example, when the PTB48580A is adjusted to ±6 V (12 V in the single output configuration), the load current is limited to 2.5 A. Not Recommended for New Designs Application Notes PTB48580 Series Configuring the PTB48580 Series of DC/DC Converters for DSL Applications Power-Up Sequencing The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB48580 are allowed to power up independently, especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the “EN Out” pin of the PTB4850x is directly connected to the activelow “Enable” input of the PTB48580 (see Figure 2-1). This allows the PTB4850x to momentarily hold off the outputs from the PTB48580 until the logic-level voltages have risen first. Figure 2-2 shows the power-up waveforms of all four supply voltages from the schematic of Figure 2-1. When operated as a pair, the PTB4850x and PTB48580 converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB48580 produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB48580 may be configured for power-up sequencing, and also synchronized to a common switch conversion frequency. Figure 2-1 shows the required cross-connects between the two converters to enable these two features. Figure 2-2; Power-Up Sequencing Waveforms Switching Frequency Synchronization Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC ripple components from the converters. The beat frequency can vary considerably with any slight variation in either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple waveforms, which would normally require separate filters at the input of each converter. When the switch frequency of the converters are synchronized, the ripple components are constrained to the fundamental and higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment of input ripple. VCCIO (1 V/Div) VCORE (1 V/Div) +VTCVR (5 V/Div) –VTCVR (5 V/Div) HORIZ SCALE: 10 ms/Div Figure 2-1; Example of PTB4850x & PTB48580A Modules Configured for DSL Applications –48 V RTN V O2 Adj +V I + Input Filter –48 V – PTB4850xA VO 1 VCCIO VO 2 VCORE Enable –VI COM EN Out Sync Out Sync In ±V O Adj +V I +V O +VTCVR PTB48580A COM Enable –VI –VO –VTCVR For technical support and further information visit http://power.ti.com PACKAGE OPTION ADDENDUM www.ti.com 19-Dec-2019 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) PTB48580AAH NRND ThroughHole Module ERV 8 15 RoHS (In Work) & non-Green SN N / A for Pkg Type -40 to 85 PTB48580AAS NRND Surface Mount Module ERS 8 15 Non-RoHS & non-Green SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB48580AAZ NRND Surface Mount Module ERS 8 15 RoHS (In Work) & non-Green SNAGCU Level-3-260C-168 HR -40 to 85 PTB48580BAH NRND ThroughHole Module ERV 8 15 RoHS (In Work) & non-Green SN N / A for Pkg Type -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
PTB48580AAZ 价格&库存

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