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REF2125
SBAS798 – SEPTEMBER 2017
REF2125 Low-Drift, Low-Power, Small-Footprint, Series Voltage Reference
With Clean Start
1 Features
3 Description
•
•
•
•
•
•
•
•
•
The REF2125 device is a low temperature drift
(6 ppm/°C), low-power, high-precision CMOS voltage
reference, featuring ±0.05% initial accuracy, low
operating current with power consumption less than
95 μA. This device also offers very low output noise
of 5 μVp-p /V, which enables its ability to maintain high
signal integrity with high-resolution data converters
and noise critical systems.
1
Initial Accuracy: ±0.05% (maximum)
Temperature Coefficient : 6 ppm/°C (maximum)
Operating Temperature Range: −40°C to +125°C
Output Current: ±10 mA
Low Quiescent Current: 95 μA (maximum)
Wide Input Voltage: 12 V
Output 1/f Noise (0.1 Hz to 10 Hz): 5 µVPP/V
Excellent Long-Term Stability 30 ppm/1000 hrs
Small Footprint 5-Pin SOT-23 Package
2 Applications
•
•
•
•
•
•
•
•
Precision Data Acquisition Systems
Power Monitoring
PLC Analog I/O Modules
Industrial Instrumentation
Field Transmitters
Test Equipment
4 - 20mA Loop sensors
LCR Meters
Stability and system reliability are further improved by
the low output-voltage hysteresis of the device and
low long-term output voltage drift. Furthermore, the
small size and low operating current of the devices
(95 μA) make them ideal for portable and batterypowered applications.
REF2125 is specified for the wide temperature range
of −40°C to +125°C. Contact the TI sales
representative for additional voltage options.
Device Information(1)
PART NAME
REF2125
PACKAGE
SOT-23 (5)
BODY SIZE (NOM)
2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
10
10
-
Input Signal
+
124
ADS1287
1 nF
REF
VIN
CIN
1µF
REF21xx
COUT
10 µF
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
REF2125
SBAS798 – SEPTEMBER 2017
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
7
9
Solder Heat Shift.....................................................
Long-Term Stability .................................................
Thermal Hysteresis .................................................
Power Dissipation ...................................................
Noise Performance .................................................
Applications and Implementation ...................... 18
9.1 Application Information............................................ 18
9.2 Typical Application: Basic Voltage Reference
Connection ............................................................... 18
10 Power-Supply Recommendations ..................... 19
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
12.5
12.6
Parameter Measurement Information ................ 11
7.1
7.2
7.3
7.4
7.5
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
8.2 Functional Block Diagram ....................................... 15
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 16
11
12
12
13
14
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
Detailed Description ............................................ 15
8.1 Overview ................................................................. 15
4 Revision History
2
DATE
REVISION
NOTES
September 2017
*
Initial release
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5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
EN
1
VIN
2
CS
3
5
GND
4
VOUT
Not to scale
Pin Functions
PIN
NO.
NAME
TYPE
1
EN
Input
2
VIN
Power
DESCRIPTION
Enable connection. Enables or disables the device.
Input supply voltage connection.
3
CS
Input
4
VOUT
Output
Clean start pin. Connect to a resistor or capacitor to enable the clean start feature.
Reference voltage output.
5
GND
Ground
Ground connection.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage
Output voltage
MIN
MAX
IN
VREF + 0.05
13
EN
–0.3
IN + 0.3
VREF
–0.3
5.5
V
20
mA
Output short circuit current
Temperature
(1)
Operating, TA
–55
150
Storage Tstg
–65
170
UNIT
V
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM
12
UNIT
IN
Supply input voltage (IL = 0 mA, TA = 25°C)
EN
Enable voltage
0
IN
V
IL
Output current
–10
10
mA
TA
Operating temperature
–40
125
°C
(1)
VREF + VDO
MAX
(1)
25
V
Dropout voltage.
6.4 Thermal Information
REF2125
THERMAL METRIC (1)
DBV (SOT-23)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
185
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
156
°C/W
RθJB
Junction-to-board thermal resistance
29.6
°C/W
ψJT
Junction-to-top characterization parameter
33.8
°C/W
ψJB
Junction-to-board characterization parameter
29.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage
accuracy
Output voltage
temperature
coefficient (1)
–0.05%
0.05%
–40°C ≤ TA ≤ 125°C
2.5
6
ppm/°C
LINE AND LOAD REGULATION
VIN = 2.55 V to 12 V , TA = 25°C
ΔV(OΔVIN)
ΔV(OΔIL)
Line regulation
Load regulation
VIN = VREF + VDO
125°C
(2)
2
to 12 V, −40°C ≤ TA ≤
IL = 0 mA to 10 mA, VIN = 3 V,
TA = 25°C
Sourcing
IL = 0 mA to 10 mA, VIN = 3 V,
−40°C ≤ TA ≤ 125°C
Sourcing
IL = 0 mA to –10 mA, VIN =
VREF+ VDO (2), TA = 25°C
Sinking
IL = 0 mA to –10 mA, VIN =
VREF+ VDO (2), −40°C ≤ TA ≤
125°C
Sinking
15
20
30
ppm/mA
40
70
VREF = 0, CCS = No connect, TA = 25°C
Short-circuit current (3) RCS = 500kΩ, TA = 25°C
ISC
ppm/V
CCS = GND, TA = 25°C
18
mA
7
mA
0.5
mA
NOISE
en p-p
Output voltage
noise (4)
en
Output voltage noise
density
ƒ = 0.1 Hz to 10 Hz
5
μV p-p/V
ƒ = 10 Hz to 10 kHz
24
μV rms
ƒ = 1 kHz
0.25
ppm/√Hz
HYSTERESIS AND LONG TERM STABILITY
Long-term stability (5)
1000 hours
30
Output voltage
hysteresis (6)
TA = 25°C to −40°C to 125°C to 25°C, Cycle 1
30
TA = 25°C to −40°C to 125°C to 25°C, Cycle 2
10
0.1% of output voltage settling, CL = 10 µF,
REF2125
2.5
ppm
ppm
TURNON
tON
Turnon time
ms
CAPACITIVE LOAD
Stable output
capacitor value
CL
−40°C ≤ TA ≤ 125°C
0.1
10
µF
OUTPUT VOLTAGE
VREF
(1)
(2)
(3)
(4)
(5)
(6)
Output voltage
REF2125
2.5
V
Temperature drift is specified according to the box method. See Feature Description for more details.
Dropout voltage under test condition is 100mV.
In clean start section it is referred as IPEAK.
The peak-to-peak noise measurement procedure is explained in more detail in Noise Performance.
Long-term stability measurement procedure is explained in more in detail in Long-Term Stability.
The thermal hysteresis measurement procedure is explained in more detail in Thermal Hysteresis.
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Electrical Characteristics (continued)
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VIN
Input voltage
IL
Output current
capacity
IQ
Quiescent current
VDO
Dropout voltage
VREF + VDO
Sourcing
VIN = VREF + VDO (2) to 12 V
Sinking
−40°C ≤ TA ≤ 125°C
Active mode
72
95
−40°C ≤ TA ≤ 125°C
Shutdown
mode
2.5
3
10
ENABLE pin voltage
IEN
ENABLE pin leakage
current
6
100
IL = 10 mA, −40°C ≤ TA ≤ +125°C
500
1.6
Voltage reference in shutdown mode (EN = 0)
ENABLE = VIN, −40°C ≤ TA ≤ 125°C
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µA
50
IL = 0 mA, −40°C ≤ TA ≤ +125°C
Voltage reference in active mode (EN = 1)
V
mA
–10
IL = 0 mA, TA= 25°C
VEN
12
VIN = VREF + VDO (2) to 12 V
0.5
1
2
mV
V
µA
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6.6 Typical Characteristics
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA , CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
0.02
Population (%)
Output Voltage Accuracy (%)
0.015
0.01
0.005
0
-0.005
-0.01
-0.015
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
3.25
3.50
3.75
4.00
4.25
4.50
4.75
5.00
-0.02
-50
-25
0
D001
Drift (ppm/°C)
(-40°C to 125°C)
Figure 1. Temperature Drift
100
125
D002
-20
Power Supply Rejection Ratio (dB)
74.5
Quiescent Current (µA)
75
Figure 2. Output Voltage Accuracy vs Temperature
75
74
73.5
73
72.5
72
71.5
71
-50
25
50
Temperature (°C)
-25
0
25
50
Temperature (°C)
75
100
125
CL = 1uF
CL = 10uF
-40
-60
-80
-100
-120
10
100
D004
Figure 3. Quiescent Current vs Temperature
1k
Frequency (Hz)
10k
100k
D005
Figure 4. Power-Supply Rejection Ratio vs Frequency
800
ILOAD
720
+1mA
+1mA
Noise (nV/vHz)
640
560
480
-1mA
400
1mA/div
320
4mV/div
VOUT
240
160
80
0
10
100
1k
Frequency(Hz)
10k
100k
D009
Figure 5. Noise Performance 10 Hz to 10 kHz
250µs/div
(CL = 1µF, IOUT = 1mA)
Figure 6. Load Transient
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Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA , CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
ILOAD
ILOAD
+1mA
+10mA
+1mA
+10mA
10mA/div
-1mA
-10mA
1mA/div
4mV/div
VOUT
VOUT
100mV/div
250µs/div
(CL = 10µF, IOUT = 1mA)
250µs/div
(CL = 1µF, IOUT = 10mA)
D010
Figure 7. Load Transient
D010
Figure 8. Load Transient
ILOAD
-10mA
+10mA
10mA/div
VIN
4V/div
+10mA
20mV/div
VOUT
VOUT
15mV/div
250µs/div
(CL = 10µF, IOUT = 10mA)
250µs/div
(CL = 1µF)
D010
Figure 9. Load Transient
Figure 10. Line Transient
VIN
En
4V/div
5mV/div
D011
1V/div
VOUT
VOUT
250µs/div
(CL = 10µF)
0.5ms/div
D011
Figure 12. Start-Up
Figure 11. Line Transient
8
D018
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Typical Characteristics (continued)
2.6
30%
2.5
25%
2.4
20%
Population (%)
2.3
2.2
15%
10%
D016
0
Thermal Hysteresis - Cycle 1 (ppm)
D013
Figure 14. Thermal Hysteresis Distribution (Cycle 1)
Figure 13. Quiescent Current Shutdown Mode
30%
50%
25%
40%
Population (%)
Population (%)
80
110 125
60
85
40
35
60
Temperature (°C)
20
10
-20
0
-15
-40
2
-40
-60
5%
2.1
-80
Quiescent Current Off (µA)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA , CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
20%
15%
30%
20%
10%
10%
0.02
0.01
D017
Solder Heat Shift (%)
D016
Thermal Hysteresis - Cycle 2 (ppm)
0
-0.01
40
30
20
10
0
-10
-20
-30
-40
0
0
-0.02
5%
Refer to Solder Heat Shift for more information
Figure 16. Solder Heat Shift Distribution
Figure 15. Thermal Hysteresis Distribution (Cycle 2)
8.7
0.23
8.4
Load Regulation Sourcing (ppm/mA)
0.24
Line Regulation (ppm/V)
0.22
0.21
0.2
0.19
0.18
0.17
0.16
0.15
0.14
0.13
-40
-20
0
20
40
60
80
Temperature (°C)
100
120
140
8.1
7.8
7.5
7.2
6.9
6.6
6.3
6
5.7
-40
-20
D019
Figure 17. Line Regulation
0
20
40
60
80
Temperature (°C)
100
120
140
D020
Figure 18. Load Regulation Sourcing
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Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA , CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
50
47.5
45
2µV/div
Load Regulation Sinking (ppm/mA)
55
52.5
42.5
40
37.5
35
32.5
30
-40
-20
0
20
40
60
80
Temperature (°C)
100
120
Time 1s/div
140
D08_
D021
Figure 20. 0.1-Hz to 10-Hz Noise (VREF)
Figure 19. Load Regulation Sinking
65
Output Voltage Stability (ppm)
55
45
35
25
15
5
-5
-15
-25
0
100
200
300
400
500 600
Hours
700
800
900 1000
D015
Figure 21. Long Term Stability - 1000 hours (VREF)
10
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7 Parameter Measurement Information
7.1 Solder Heat Shift
The materials used in the manufacture of the REF2125 have differing coefficients of thermal expansion, resulting
in stress on the device die when the part is heated. Mechanical and thermal stress on the device die can cause
the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow soldering is a
common cause of this error.
In order to illustrate this effect, a total of 32 devices were soldered on four printed circuit boards [16 devices on
each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow
profile. The reflow profile is as shown in Figure 22. The printed circuit board is comprised of FR4 material. The
board thickness is 1.65 mm and the area is 114 mm × 152 mm.
300
Temperature (ƒC)
250
200
150
100
50
0
0
50
100
150
200
250
300
Time (seconds)
350
400
C01
Figure 22. Reflow Profile
The reference and bias output voltages are measured before and after the reflow process; the typical shift is
displayed in Figure 23. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible
depending on the size, thickness, and material of the printed circuit board. An important note is that the
histograms display the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is
common on PCBs with surface-mount components on both sides, causes additional shifts in the output bias
voltage. If the PCB is exposed to multiple reflows, solder the device in the second pass to minimize its exposure
to thermal stress.
50%
Population (%)
40%
30%
20%
0.02
0.01
0
-0.01
0
-0.02
10%
D017
Solder Heat Shift (%)
Figure 23. Solder Heat Shift Distribution, VREF (%)
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7.2 Long-Term Stability
One of the key parameters of the REF2125 reference is long-term stability. Typical characteristic expressed as:
curves shows the typical drift value for the REF2125 is 30 ppm from 0 to 1000 hours. This parameter is
characterized by measuring 32 units at regular intervals for a period of 1000 hours. It is important to understand
that long-term stability is not ensured by design and that the output from the device may shift beyond the typical
30 ppm specification at any time. For systems that require highly stable output voltages over long periods of
time, the designer should consider burning in the devices prior to use to minimize the amount of output drift
exhibited by the reference over time
65
Output Voltage Stability (ppm)
55
45
35
25
15
5
-5
-15
-25
0
100
200
300
400
500 600
Hours
700
800
900 1000
D015
Figure 24. Long Term Stability - 1000 hours (VREF)
7.3 Thermal Hysteresis
Thermal hysteresis is measured with the REF2125 soldered to a PCB, similar to a real-world application.
Thermal hysteresis for the device is defined as the change in output voltage after operating the device at 25°C,
cycling the device through the specified temperature range, and returning to 25°C. Hysteresis can be expressed
by Equation 1:
VHYST
§ | VPRE VPOST
¨
VNOM
©
|·
6
¸ u 10 ppm
¹
where
•
•
•
•
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after the device has cycled from 25°C through the specified temperature
range of –40°C to +125°C and returns to 25°C.
(1)
Typical thermal hysteresis distribution is as shown in Figure 25.
12
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Thermal Hysteresis (continued)
30%
Population (%)
25%
20%
15%
10%
Thermal Hysteresis - Cycle 1 (ppm)
80
60
40
20
0
-20
-40
-60
0
-80
5%
D016
Figure 25. Thermal Hysteresis Distribution (VREF)
7.4 Power Dissipation
The REF2125 voltage reference is capable of source and sink up to 10 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient temperatures, the input voltage and
load current must be carefully monitored to ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the device can be calculated with Equation 2:
TJ TA PD u RTJA
where
•
•
•
•
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
(2)
Because of this relationship, acceptable load current in high temperature conditions may be less than the
maximum current-sourcing capability of the device. In no case should the part be operated outside of its
maximum power rating because doing so can result in premature failure or permanent damage to the device.
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7.5 Noise Performance
2µV/div
Typical 0.1-Hz to 10-Hz voltage noise can be seen in Figure 26 . Device noise increases with output voltage and
operating temperature. Additional filtering can be used to improve output noise levels, although care must be
taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement
setup is shown in Figure 26.
Time 1s/div
D08_
Figure 26. 0.1-Hz to 10-Hz Noise (VREF)
14
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8 Detailed Description
8.1 Overview
The REF2125 is part of a family of low-noise, precision bandgap voltage references that are specifically designed
for excellent initial voltage accuracy and drift. The Functional Block Diagram is a simplified block diagram of the
REF2125 showing basic band-gap topology.
8.2 Functional Block Diagram
EN
Enable
Blocks
IN
Digital
CS
Clean
Start
Vdd
Bandgap
core
Buffer
GND
OUT
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8.3 Feature Description
8.3.1 Supply Voltage
The REF2125 family of references features an extremely low dropout voltage. The REF2125 can be operated
with a supply of only 1 mV above the output voltage in an unloaded condition. For loaded conditions, a typical
dropout voltage versus load is shown on the front page. The REF2125 features a low quiescent current that is
extremely stable over changes in both temperature and supply. The typical room temperature quiescent current
is 72 μA, and the maximum quiescent current over temperature is just 95 μA. Supply voltages below the
specified levels can cause the REF2125 to momentarily draw currents greater than the typical quiescent current.
Use a power supply with a fast rising edge and low output impedance to easily prevent this issue.
8.3.2 Low Temperature Drift
The REF2125 is designed for minimal drift error, which is defined as the change in output voltage over
temperature. The drift is calculated using the box method, as described by Equation 3:
VREF(MAX) VREF(MIN)
·
§
6
Drift = ¨
¸ u 10
V
Temperature
Range
u
© REF
¹
(3)
8.3.3 Load Current
The REF2125 family is specified to deliver a current load of ±10 mA per output. The VREF output of the device
are protected from short circuits by limiting the output short-circuit current to 18 mA. The device temperature
increases according to Equation 4:
TJ TA PD u RTJA
where
•
•
•
•
TJ = junction temperature (°C),
TA = ambient temperature (°C),
PD = power dissipated (W), and
RθJA = junction-to-ambient thermal resistance (°C/W)
(4)
The REF2125 maximum junction temperature must not exceed the absolute maximum rating of 150°C.
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Feature Description (continued)
8.3.4 Clean Start Feature
In many applications (for example, loop powered applications), the supply at VIN has inductive impedance. This
can cause the supply to dip during start-up because of the large output capacitor connected to the voltage
reference and the inductive supply. The REF2125 family has an internal clean start block to control the peak of
the inrush current during start-up. This feature is illustrated in Functional Block Diagram. The peak of inrush
current can be calculated as Equation 5:
IPEAK | 466PA 13.54PA u RCS
where
•
•
IPEAK = Peak of inrush current (µA), has a range of [0.5 mA, 19 mA],
Rcs = External resistor connected to the CS pin
(5)
During power up, IPEAK is split between the device current and output current. The output current (IOUT) is split
between output capacitor and load current (ILOAD). The device current can be estimated to be IQ+IOUT/183, where
IQ is quiescent current at no load. Hence for a given ILOAD it is important to choose Rcs such that IPEAK is larger
than ILOAD. Above equations capture typical characteristics and hence it is suggested to include ±25% margins
while budgeting for inrush current and also while choosing Rcs for a given ILOAD. This inrush current continues to
stay at the limiting value (IPEAK) till output reaches close to VREF (2.5 V).
When a Ccs is also connected in parallel to Rcs, The inrush current limit shall rise exponentially to the steady
state value (IPEAK) as calculated using above equations, with a time constant of Rcs × Ccs. Hence the initial (and
maximum) rate of rise of inrush current shall be IPEAK /(Rcs × Ccs). Because the inrush current rate is limited, the
loop powered supply dip is controlled.
8.4 Device Functional Modes
8.4.1
EN Pin
When the ENABLE pin of the REF2125 is pulled high, the device is in active mode. The device must be in active
mode for normal operation. The REF2125 can be placed in a low-power mode by pulling the ENABLE pin low.
When in shutdown mode, the output of the device becomes high impedance and the quiescent current of the
device reduces to 2 µA in shutdown mode. The EN pin must not be pulled higher than VIN supply voltage. See
the Thermal Information for logic high and logic low voltage levels.
8.4.2 Negative Reference Voltage
For applications requiring a negative and positive reference voltage, the REF2125 and OPA735 can be used to
provide a dual-supply reference from a 5-V supply. Figure 27 shows the REF2125 used to provide a 2.5-V supply
reference voltage. The low drift performance of the REF2125 complements the low offset voltage and zero drift of
the OPA735 to provide an accurate solution for split-supply applications. Take care to match the temperature
coefficients of R1 and R2.
16
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Device Functional Modes (continued)
+5V
1
2
REF2125
3
4
+2.5V
5
R1
10 NŸ
CCS
RCS
R2
10 NŸ
_
OPA735
-2.5V
+
GND
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Figure 27. REF2125 and OPA735 Create Positive and Negative Reference Voltages
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9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
As this device has many applications and setups, there are many situations that this datasheet can not
characterize in detail. Basic applications includes positive/negative voltage reference and data acquisition
systems. For more information see application sections in the REF32xx data sheet.
9.2 Typical Application: Basic Voltage Reference Connection
The circuit shown in Figure 28 shows the basic configuration for the REF2125 references. Connect bypass
capacitors according to the guidelines in Input and Output Capacitors.
10
10
-
Input Signal
+
124
ADS1287
1 nF
REF
VIN
CIN
1µF
REF21xx
COUT
10 µF
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Figure 28. Basic Reference Connection
9.2.1 Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the
parameters listed in Table 1 as the input parameters.
Table 1. Design Example Parameters
DESIGN PARAMETER
Input voltage VIN
VALUE
5V
Output voltage VOUT
2.5 V
REF2125 input capacitor
1 µF
REF2125 output capacitor
10 µF
9.2.2 Detailed Design Procedure
9.2.2.1 Input and Output Capacitors
A 1-μF to 10-μF electrolytic or ceramic capacitor can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. Connect an additional 0.1-μF ceramic capacitor in parallel to
reduce high frequency supply noise.
A ceramic capacitor of at least 0.1 μF must be connected to the output to improve stability and help filter out high
frequency noise. An additional 1-μF to 10-μF electrolytic or ceramic capacitor can be added in parallel to improve
transient performance in response to sudden changes in load current; however, keep in mind that doing so
increases the turnon time of the device.
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Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors
(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1-μF ceramic capacitor in parallel
to reduce overall ESR on the output.
9.2.2.2 VIN Slew Rate Considerations
In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient
anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry
loses power.
To avoid such conditions, ensure that the input voltage wave-form has both a rising and falling slew rate close to
6 V/ms.
9.2.2.3 Shutdown/Enable Feature
The REF2125 references can be switched to a low power shut-down mode when a voltage of 0.5 V or lower is
input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 1.6 V or higher.
During shutdown, the supply current drops to less than 2 μA, useful in applications that are sensitive to power
consumption.
If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.5 V and 1.6 V
because this causes a large increase in the supply current of the device and may keep the reference from
starting up correctly. If not using the shutdown feature, however, the ENABLE pin can simply be tied to the IN
pin, and the reference remains operational continuously.
9.2.3 Application Curves
75
2.6
Quiescent Current Off (µA)
Quiescent Current (µA)
74.5
74
73.5
73
72.5
72
2.4
2.3
2.2
2.1
71.5
71
-50
2.5
-25
0
25
50
Temperature (°C)
75
100
125
2
-40
-15
D004
Figure 29. Quiescent Current vs Temperature
10
35
60
Temperature (°C)
85
110 125
D013
Figure 30. Quiescent Current Shutdown Mode
10 Power-Supply Recommendations
The REF2125 family of references feature an extremely low-dropout voltage. These references can be operated
with a supply of only 50 mV above the output voltage. TI recommends a supply bypass capacitor ranging
between 0.1 µF to 10 µF.
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11 Layout
11.1 Layout Guidelines
Figure 31 illustrates an example of a PCB layout for a data acquisition system using the REF2125. Some key
considerations are:
• Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF of the REF2125.
• Decouple other active devices in the system per the device specifications.
• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
11.2 Layout Example
EN
1
IN
2
5 GND
REF21XX
C
CS
R
3
4 OUT
C
Figure 31. Layout Example
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt
Monitors
• Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
REF2125IDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
19DD
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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