REF34-Q1
REF34-Q1
SBAS901C – JULY 2018 – REVISED OCTOBER
2020
SBAS901C – JULY 2018 – REVISED OCTOBER 2020
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REF34-Q1 Low-Drift, Low-Power, Small-Footprint Series
Voltage References
1 Features
3 Description
•
The REF34-Q1 devices are low-temperature-drift
(6 ppm/°C), low-power, high-precision CMOS voltage
references. The devices have ±0.05% initial accuracy
and low operating current with power consumption
less than 95 μA. These devices also offer very low
output noise of 3.8 µV PP/V, which enable the devices
to maintain high signal integrity with high-resolution
data converters and noise critical systems.
•
•
•
•
•
•
•
•
•
•
•
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to +125°C
ambient operating temperature
– Device HBM ESD classification level 2
– Device CDM ESD classification level C6
Initial accuracy: ±0.05% (maximum)
Temperature coefficient : 6 ppm/°C (maximum)
Operating temperature range: −40°C to +125°C
Output voltage options: 2.5V, 3.0V, 3.3V, 4.096V,
5.0V
Output current: ±10 mA
Low quiescent current: 95 μA (maximum)
Low shutdown mode current: 3 μA (maximum)
Wide input voltage: 12 V
Output 1/f noise (0.1 Hz to 10 Hz): 3.8 µVPP/V
Excellent long-term stability 25 ppm/1000 hrs
Available in 6-pin and 5-Pin SOT-23 package and
8-pin MSOP package
2 Applications
•
•
•
•
•
Stability and system reliability are further improved by
the low output-voltage hysteresis of these devices and
low long-term output voltage drift. Furthermore, the
small size and low operating current of the devices
(95 μA) make them an excellent choise for batterypowered applications. The REF34-Q1 features an
enable pin that can set the device into shutdown
where it consumes a low stand by current (3 μA) to
help with overall system power during standby.
The REF34-Q1 family is specified for the wide
temperature range of −40°C to +125°C. Contact the
TI sales representative for additional voltage options.
Device Information (1)
Body control modules
On board chargers
Traction inverters
Battery management systems
Advanced driver assistance systems
PART NUMBER
PACKAGE
BODY SIZE (NOM)
REF34xx-Q1
SOT-23 (6)
2.90 mm × 1.60 mm
REF34xxS-Q1
SOT-23 (5)
2.90 mm × 1.60 mm
REF34xx-Q1
VSSOP (8)
4.00 mm × 4.00 mm
(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
0.4
3V VDD
0.36
VDD
VREF+
2.5V VREF
VREF-
ADS7828-Q1
OUT
IN
GND
EN
REF3425-Q1
3.3V VDD
I2C
I2C
VDD
GPIO0
GPIOx
0.28
+25°C
0.24
0.2
-40°C
0.16
0.12
0.08
0.04
0
-10
TDA2 (MCU)
Copyright © 2017, Texas Instruments Incorporated
Simplified Schematic
+125°C
0.32
Dropout Voltage (V)
AIN0
AIN1
AIN2
AIN3
-5
0
Load Current (mA)
5
10
drop
Dropout vs Current Load Over Temperature
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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© 2020 Texas
Instruments
Incorporated
intellectual
property
matters
and other important disclaimers. PRODUCTION DATA.
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
6.1 Pin Functions ............................................................. 3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings ....................................... 4
7.2 ESD Ratings .............................................................. 4
7.3 Recommended Operating Conditions ........................4
7.4 Thermal Information ...................................................4
7.5 Electrical Characteristics ............................................5
8 Typical Characteristics................................................... 7
9 Parameter Measurement Information.......................... 12
9.1 Solder Heat Shift.......................................................12
9.2 Long-Term Stability................................................... 13
9.3 Thermal Hysteresis................................................... 13
9.4 Power Dissipation..................................................... 14
9.5 Noise Performance................................................... 15
10 Detailed Description....................................................16
10.1 Overview................................................................. 16
10.2 Functional Block Diagram....................................... 16
10.3 Feature Description.................................................16
10.4 Device Functional Modes........................................17
11 Application and Implementation................................ 18
11.1 Application Information............................................18
11.2 Typical Applications.................................................18
12 Power Supply Recommendations..............................23
13 Layout...........................................................................23
13.1 Layout Guidelines................................................... 23
13.2 Layout Example...................................................... 23
14 Device and Documentation Support..........................25
14.1 Documentation Support.......................................... 25
14.2 Receiving Notification of Documentation Updates..25
14.3 Support Resources................................................. 25
14.4 Trademarks............................................................. 25
14.5 Electrostatic Discharge Caution..............................25
14.6 Glossary..................................................................25
15 Mechanical, Packaging, and Orderable
Information.................................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (August 2020) to Revision C (October 2020)
Page
• Added information for REF34-Q1 DGK Package............................................................................................... 3
• Added information for REF34xx-Q1 DGK package pin functions....................................................................... 3
Changes from Revision A (September 2018) to Revision B (August 2020)
Page
• Added information for REF34xxS-Q1................................................................................................................. 3
• Added information for REF34xxS-Q1................................................................................................................. 3
Changes from Revision * (July 2018) to Revision A (September 2018)
Page
• Changed Advance Information to Production Data............................................................................................ 1
2
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
5 Device Comparison Table
PRODUCT(1)
VOUT
REF3425-Q1
(1)
REF3425S-Q1
2.5 V
REF3430-Q1
REF3430S-Q1
3.0 V
REF3433-Q1
REF3433S-Q1
3.3 V
REF3440-Q1
REF3440S-Q1
4.096 V
REF3450-Q1
REF3450S-Q1
5.0 V
For full orderable part number please refer to Section 15.
6 Pin Configuration and Functions
GND_F
1
6
OUT_F
NC
1
GND_S
2
5
OUT_S
GND
2
EN
3
4
IN
IN
3
Not to scale
5
NIC
4
OUT
Not to scale
Figure 6-1. DBV Package 6-Pin SOT-23 (Top View)
Figure 6-2. DBV Package 5-Pin SOT-23 (Top View)
ENABLE
1
8
IN
GND_S
2
7
OUT_S
GND_F
3
6
OUT_F
NIC
4
5
NIC
Not to scale
Figure 6-3. DGK Package 8-Pin VSSOP (Top View)
6.1 Pin Functions
PIN
NAME
REF34xx-Q1
(DBV)
GND_F
1
GND_S
GND
REF34xxS-Q1
(DBV)
REF34xxQ1 (DGK)
TYPE
DESCRIPTION
-
3
Ground
Ground force connection
2
-
2
Ground
Ground sense connection
-
2
-
Ground
Ground connection
ENABLE
3
-
1
Input
IN
4
3
8
Power
Input supply voltage connection
Enable connection. Enables or disables the device.
OUT_S
5
-
7
Output
Reference voltage output sense connection
OUT_F
6
-
6
Output
Reference voltage output force connection
OUT
-
4
-
Output
NC
-
1
-
-
Test pin, connect from 0V to 18V
NIC
-
5
4,5
-
No internal connection
Reference voltage output connection
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
Input voltage
Output voltage
MAX
UNIT
IN
–0.3
13
V
EN
–0.3
IN + 0.3
V
VOUT
–0.3
5.5
V
20
mA
Output short circuit current
Operating temperature range, TA
–55
150
°C
Storage temperature range, Tstg
–65
170
°C
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied. These are stress ratings only and functional operation of the device at these or any other conditions
beyond those specified in the Electrical Characteristics Table is not implied.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002(1)
±2500
Charged-device model (CDM), per AEC
Q100-011
±1500
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
VOUT + V
IN
Input Voltage
EN
Enable Voltage
0
IN
V
IL
Output Current
–10
10
mA
TA
Operating Temperature
–40
125
°C
(1)
DO
12
UNIT
(1)
25
V
VDO = Dropout voltage
7.4 Thermal Information
REF34-Q1
THERMAL
DBV
DBV
DGK
5 PINS
6 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
122.6
122.6
174.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
80.2
80.2
61.3
°C/W
RθJB
Junction-to-board thermal resistance
42
42
95.5
°C/W
ΨJT
Junction-to-top characterization parameter
23.2
23.2
8.5
°C/W
ΨJB
Junction-to-board characterization parameter
41.9
41.9
93.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
4
METRIC(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
7.5 Electrical Characteristics
At VIN = VOUT + VDO, COUT = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃;
Typical specifications at TA = 25℃ unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
0.05
%
ACCURACY AND DRIFT
Output voltage accuracy TA = 25℃
–0.05
Output voltage
temperature coefficient
2.5
(1)
6
ppm/℃
LINE & LOAD REGULATION
ΔVO/ΔVIN
VIN = VOUT + VDO (2) to 12 V
Line Regulation
IL = 0 mA to 10mA, VIN
= VOUT+ VDO (3)
ΔVO/ΔIL
2
VIN = VOUT + VDO (2) to 12 V
Load Regulation
15
Sourcing
ppm/V
20
Sourcing
30
Sinking, REF3425-Q1
40
Sinking, REF3430-Q1
43
Sinking, REF3433-Q1
48
Sinking, REF3440-Q1
60
IL = 0 mA to –10mA, VIN Sinking, REF3450-Q1
= VOUT+ VDO (3)
Sinking, REF3425-Q1
70
ppm/mA
70
Sinking, REF3430-Q1
75
Sinking, REF3433-Q1
84
Sinking, REF3440-Q1
98
Sinking, REF3450-Q1
140
NOISE
enp-p
0.1Hz ≤ f ≤ 10Hz
Low frequency noise (4) 0.1Hz ≤ f ≤ 10Hz (REF3440–Q1 and REF3450–
Q1)
en
Integrated wide band
noise
en
Output voltage noise
density
5
µV p–p/V
3.8
10Hz ≤ f ≤ 10kHz
24
f = 1kHz
µVrms
0.25
f = 1kHz (REF3440–Q1 and REF3450–Q1)
ppm/√Hz
0.2
LONG TERM STABILITY AND HYSTERESIS
Long-term stability (5)
DBV Package
(5)
DGK Package
Long-term stability
DBV Package
Output voltage thermal
hysteresis (6)
DGK Package
0 to 1000h at 35℃
25
1000h to 2000h at 35℃
10
0 to 1000h at 35℃
17
25°C, –40°C,125°C,
25°C Cycle 1
30
25°C, –40°C,125°C,
25°C Cycle 2
10
25°C, –40°C,125°C,
25°C Cycle 1
20
25°C, –40°C,125°C,
25°C Cycle 2
10
ppm
ppm
TURN-ON TIME
tON
Turn-on time
0.1% of output voltage settling, CL = 10 µF,
REF3425–Q1
2.5
ms
CAPACITIVE LOAD
CL
Stable output capacitor
range
0.1
10
µF
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At VIN = VOUT + VDO, COUT = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃;
Typical specifications at TA = 25℃ unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
OUTPUT VOLTAGE
VOUT
Output voltage
REF3425Q1
2.5
REF3430Q1
3.0
REF3433Q1
3.3
REF3440Q1
4.096
REF3450Q1
5.0
V
POWER SUPPLY
Input voltage
IL
Output current capacity VIN = VOUT + VDO to 12 V
IQ
Quiescent current
VDO
Dropout voltage
DO
–10
12
V
10
mA
Active mode
72
95
Shutdown mode (7)
2.5
3
IL = 0 mA
50
IL = 0 mA
100
IL = 10 mA
500
Voltage reference in active mode (EN = 1)
VEN
ENABLE pin voltage (7)
IEN
ENABLE pin leakage
current (7)
VEN = VIN = 12V
ISC
Short circuit current
VOUT = 0 V at TA = 25°C
(1)
(2)
(3)
(4)
(5)
(6)
(7)
6
VOUT + V
VIN
1.6
Voltage reference in shutdown mode (EN = 0)
0.5
µA
mV
V
1
2
µA
18
22
mA
Temperature drift is specified according to the box method. See Low Temperature Drift section for more details.
VDO for line regulation test is 50 mV.
VDO for load regulation test is 500 mV.
The peak-to-peak noise measurement is explained in more detail in section Noise Performance.
Long-term stability measurement procedure is explained in more detail in section Long–Term Stability.
Thermal hysteresis measurement procedure is explained in more detail in section Thermal Hysteresis.
Not applicable for REF34S device (DBV - 5 pin package)
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8 Typical Characteristics
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
74
Population (%)
Quiescent Current (mA)
73
12V
72
71
5V
70
3.3V
69
3V
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
3.25
3.50
3.75
4.00
4.25
4.50
4.75
5.00
68
-40
-15
10
D001
Drift (ppm/°C)
(-40°C to 125°C)
35
60
Temperature (°C)
85
110 125
Vinv
Figure 8-2. VIN vs IQ Over Temperature
75
0.015
74.5
0.01
74
Quiescent Current (µA)
Output Voltage Accuracy (%)
Figure 8-1. Temperature Drift
0.02
0.005
0
-0.005
-0.01
-0.015
-0.02
-50
73.5
73
72.5
72
71.5
-25
0
25
50
Temperature (°C)
75
100
71
-50
125
Figure 8-3. Output Voltage Accuracy vs Temperature
0
25
50
Temperature (°C)
75
100
125
D004
Figure 8-4. Quiescent Current vs Temperature
0.24
-20
CL = 1uF
CL = 10uF
0.23
0.22
-40
Line Regulation (ppm/V)
Power Supply Rejection Ratio (dB)
-25
D002
-60
-80
-100
0.21
0.2
0.19
0.18
0.17
0.16
0.15
0.14
-120
10
100
1k
Frequency (Hz)
10k
100k
0.13
-40
-20
D005
Figure 8-5. Power-Supply Rejection Ratio vs Frequency
0
20
40
60
80
Temperature (°C)
100
120
140
D019
Figure 8-6. Line Regulation
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
8 Typical Characteristics (continued)
8.7
55
8.4
52.5
Load Regulation Sinking (ppm/mA)
Load Regulation Sourcing (ppm/mA)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
8.1
7.8
7.5
7.2
6.9
6.6
6.3
6
5.7
-40
-20
0
20
40
60
80
Temperature (°C)
100
120
140
50
47.5
45
42.5
40
37.5
35
32.5
30
-40
-20
0
20
D020
40
60
80
Temperature (°C)
120
140
D021
Figure 8-8. Load Regulation Sinking
Figure 8-7. Load Regulation Sourcing
800
ILOAD
720
+1mA
+1mA
640
Noise (nV/vHz)
100
560
-1mA
480
1mA/div
400
4mV/div
320
VOUT
240
160
80
0
10
100
1k
Frequency(Hz)
10k
250µs/div
(CL = 1µF, IOUT = 1mA)
100k
D009
D010
Figure 8-10. Load Transient
Figure 8-9. Noise Performance 10 Hz to 10 kHz
ILOAD
ILOAD
+1mA
+10mA
+1mA
+10mA
10mA/div
-10mA
-1mA
1mA/div
4mV/div
VOUT
100mV/div
250µs/div
(CL = 10µF, IOUT = 1mA)
250µs/div
(CL = 1µF, IOUT = 10mA)
D010
Figure 8-11. Load Transient
8
VOUT
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D010
Figure 8-12. Load Transient
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
8 Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
ILOAD
-10mA
+10mA
10mA/div
VIN
4V/div
+10mA
20mV/div
VOUT
15mV/div
250µs/div
(CL = 10µF, IOUT = 10mA)
VOUT
250µs/div
D010
(CL = 1µF)
Figure 8-13. Load Transient
D011
Figure 8-14. Line Transient
Quiescent Current Off (µA)
2.6
VIN
4V/div
VOUT
5mV/div
2.5
2.4
2.3
2.2
2.1
2
-40
250µs/div
(CL = 10µF)
Figure 8-15. Line Transient
25%
25%
20%
20%
Thermal Hysteresis - Cycle 1 (ppm)
D016
Figure 8-17. Thermal Hysteresis Distribution (Cycle 1) - DBV
Package
110 125
D013
Thermal Hysteresis - Cycle 2 (ppm)
40
30
20
10
0
-10
80
60
0
40
0
20
5%
0
5%
-20
85
10%
-20
10%
-40
35
60
Temperature (°C)
15%
-30
15%
-40
Population (%)
30%
-60
10
Figure 8-16. Quiescent Current Shutdown Mode
30%
-80
Population (%)
-15
D011
D016
Figure 8-18. Thermal Hysteresis Distribution (Cycle 2) - DBV
Package
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
8 Typical Characteristics (continued)
30%
25%
25%
20%
20%
DGKt
40%
30
40
0.02
0.01
0
D017
Solder Heat Shift (%)
0
0
0.02
0
0.01
10%
-0.01
20%
10%
-0.01
20
30%
-0.02
Population (%)
40%
-0.02
Population (%)
50%
20%
DGKt
Figure 8-20. Thermal Hysteresis Distribution (Cycle 2) - DGK
Package
50%
30%
10
Thermal Hysteresis - Cycle 2 (ppm)
Thermal Hysteresis - Cycle 1 (ppm)
Figure 8-19. Thermal Hysteresis Distribution (Cycle 1) - DGK
Package
0
120
90
0
-90
60
0
30
0
-30
5%
-60
5%
-10
10%
-20
10%
15%
-30
15%
-40
Population (%)
30%
-120
Population (%)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
DGKs
Solder Heat Shift (%)
Refer to Section 9.1 for more information
Refer to Section 9.1 for more information
Figure 8-21. Solder Heat Shift Distribution - DBV Package
Figure 8-22. Solder Heat Shift Distribution - DGK Package
2µV/div
En
1V/div
VOUT
Time 1s/div
0.5ms/div
D08_
D018
Figure 8-23. Turnon Time (Enable)
10
Figure 8-24. 0.1-Hz to 10-Hz Noise (VREF)
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SBAS901C – JULY 2018 – REVISED OCTOBER 2020
8 Typical Characteristics (continued)
10
10
5
5
Output Voltage Stability (ppm)
Output Voltage Stability (ppm)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
0
-5
-10
-15
-20
-25
-30
0
-5
-10
-15
-20
-25
-30
-35
-35
-40
-40
0
100
200
300
400
500 600
Hours
700
800
900 1000
0
100
D022
Figure 8-25. Long Term Stability - 1000 hours (VREF) - DBV
Package
200
300
400
500 600
Hours
700
800
900 1000
DGKl
Figure 8-26. Long Term Stability - 1000 hours (VREF) - DGK
Package
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9 Parameter Measurement Information
9.1 Solder Heat Shift
The materials used in the manufacture of the REF34-Q1 have differing coefficients of thermal expansion,
resulting in stress on the device die when the part is heated. Mechanical and thermal stress on the device die
can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow
soldering is a common cause of this error.
In order to illustrate this effect, a total of 32 devices were soldered on four printed circuit boards [16 devices on
each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow
profile. The reflow profile is as shown in Figure 9-1. The printed circuit board is comprised of FR4 material. The
board thickness is 1.65 mm and the area is 114 mm × 152 mm. All measurements were taken after baking at
150°C.
300
Temperature (ƒC)
250
200
150
100
50
0
0
50
100
150
200
250
300
350
Time (seconds)
400
C01
Figure 9-1. Reflow Profile
50%
40%
40%
0
D017
Solder Heat Shift (%)
DGKs
Solder Heat Shift (%)
Figure 9-2. Solder Heat Shift Distribution, VREF (%)
- DBV Package
12
0.02
0
0.02
0
0.01
10%
-0.01
10%
0.01
20%
0
20%
30%
-0.01
30%
-0.02
Population (%)
50%
-0.02
Population (%)
The reference output voltage is measured before and after the reflow process; the typical shift is displayed in
Figure 9-2. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending
on the size, thickness, and material of the printed circuit board. An important note is that the histograms display
the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with
surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is
exposed to multiple reflows, the device must be soldered in the second pass to minimize its exposure to thermal
stress.
Figure 9-3. Solder Heat Shift Distribution, VREF (%)
- DGK Package
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9.2 Long-Term Stability
10
10
5
5
Output Voltage Stability (ppm)
Output Voltage Stability (ppm)
One of the key parameters of the REF34-Q1 references is long-term stability. Typical characteristic expressed
as: curves shows the typical drift value for the REF34-Q1 is 25 ppm from 0 to 1000 hours. This parameter is
characterized by measuring 32 units at regular intervals for a period of 1000 hours. It is important to understand
that long-term stability is not ensured by design and that the output from the device may shift beyond the typical
25 ppm specification at any time. For systems that require highly stable output voltages over long periods of
time, the designer should consider burning in the devices prior to use to minimize the amount of output drift
exhibited by the reference over time
0
-5
-10
-15
-20
-25
-30
0
-5
-10
-15
-20
-25
-30
-35
-35
-40
-40
0
100
200
300
400
500 600
Hours
700
800
900 1000
0
100
D022
Figure 9-4. Long Term Stability - 1000 hours (VREF)
- DBV Package
200
300
400
500 600
Hours
700
800
900 1000
DGKl
Figure 9-5. Long Term Stability - 1000 hours (VREF)
- DGK Package
9.3 Thermal Hysteresis
Thermal hysteresis is measured with the REF34-Q1 soldered to a PCB, similar to a real-world application.
Thermal hysteresis for the device is defined as the change in output voltage after operating the device at 25°C,
cycling the device through the specified temperature range, and returning to 25°C. Hysteresis can be expressed
by Equation 1:
VHYST
§ | VPRE VPOST | ·
6
¨
¸ u 10 ppm
V
NOM
©
¹
(1)
where
•
•
•
•
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after the device has cycled from 25°C through the specified temperature
range of –40°C to +125°C and returns to 25°C.
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30%
25%
25%
20%
20%
D016
Thermal Hysteresis - Cycle 1 (ppm)
40
30
20
10
0
80
60
40
20
0
0
-20
0
-40
5%
-60
5%
-10
10%
-20
10%
15%
-30
15%
-40
Population (%)
30%
-80
Population (%)
Typical thermal hysteresis distribution is as shown in Figure 9-6.
D016
Thermal Hysteresis - Cycle 2 (ppm)
30%
25%
25%
20%
20%
DGKt
Thermal Hysteresis - Cycle 1 (ppm)
Thermal Hysteresis - Cycle 2 (ppm)
40
30
20
10
0
120
90
60
30
0
0
-30
0
-60
5%
-90
5%
-10
10%
-20
10%
15%
-30
15%
-40
Population (%)
30%
-120
Population (%)
Figure 9-6. Thermal Hysteresis Distribution (VREF) - Figure 9-7. Thermal Hysteresis Distribution (VREF) DBV Package (Cycle 1)
DBV Package (Cycle 2)
DGKt
Figure 9-8. Thermal Hysteresis Distribution (VREF) - Figure 9-9. Thermal Hysteresis Distribution (VREF) DGK Package (Cycle 2)
DGK Package (Cycle 1)
9.4 Power Dissipation
The REF34-Q1 voltage references are capable of source and sink up to 10 mA of load current across the rated
input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage
and load current must be carefully monitored to ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the device can be calculated with Equation 2:
TJ
TA
PD u RTJA
(2)
where
•
•
•
•
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the
maximum current-sourcing capability of the device. In no case should the device be operated outside of its
maximum power rating because doing so can result in premature failure or permanent damage to the device.
14
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9.5 Noise Performance
2µV/div
Typical 0.1-Hz to 10-Hz voltage noise can be seen in Figure 9-10 . Device noise increases with output voltage
and operating temperature. Additional filtering can be used to improve output noise levels, although care must
be taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement
setup is shown in Figure 9-10.
Time 1s/div
D08_
Figure 9-10. 0.1-Hz to 10-Hz Noise (VREF)
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10 Detailed Description
10.1 Overview
The REF34-Q1 devices are a family of low-noise, precision bandgap voltage references that are specifically
designed for excellent initial voltage accuracy and drift. The Section 10.2 is a simplified block diagram of the
REF34-Q1 showing basic band-gap topology.
10.2 Functional Block Diagram
GNDF
Enable
Blocks
GNDS
Digital
EN
Inrush
Current
Limit
Vdd
OUTF
OUTS
Bandgap
core
Buffer
IN
10.3 Feature Description
10.3.1 Supply Voltage
The REF34-Q1 family of references features an extremely low dropout voltage. For loaded conditions, a typical
dropout voltage versus load is shown on the front page. The REF34-Q1 family features a low quiescent current
that is extremely stable over changes in both temperature and supply. The typical room temperature quiescent
current is 72 μA, and the maximum quiescent current over temperature is just 95 μA. Supply voltages below the
specified levels can cause the REF34-Q1 to momentarily draw currents greater than the typical quiescent
current. Use a power supply with a fast rising edge and low output impedance to easily prevent this issue.
10.3.2 Low Temperature Drift
The REF34-Q1 devices are designed for minimal drift error, which is defined as the change in output voltage
over temperature. The drift is calculated using the box method, as described by Equation 3:
VREF(MAX) VREF(MIN)
·
§
6
Drift = ¨
¸ u 10
V
Temperature
Range
u
© REF
¹
16
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10.3.3 Load Current
The REF34-Q1 family is specified to deliver a current load of ±10 mA per output. The V REF output of the device
are protected from short circuits by limiting the output short-circuit current to 18 mA. The device temperature
increases according to Equation 4:
TJ
TA
PD u RTJA
(4)
where
•
•
•
•
TJ = junction temperature (°C),
TA = ambient temperature (°C),
PD = power dissipated (W), and
RθJA = junction-to-ambient thermal resistance (°C/W)
The REF34-Q1 maximum junction temperature must not exceed the absolute maximum rating of 150°C.
10.4 Device Functional Modes
10.4.1 EN Pin
When the EN pin of the REF34-Q1 is pulled high, the device is in active mode. The device must be in active
mode for normal operation. The REF34-Q1 can be placed in a low-power mode by pulling the ENABLE pin low.
When in shutdown mode, the output of the device becomes high impedance and the quiescent current of the
device reduces to 2 µA in shutdown mode. The EN pin must not be pulled higher than VIN supply voltage. See
Thermal Information for logic high and logic low voltage levels.
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11 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
11.1 Application Information
As the REF34-Q1 devices have many applications and setups, there are many situations that this data sheet can
not characterize in detail. Basic applications includes positive/negative voltage reference and data acquisition
systems.
Table 11-1. Typical Applications and Companion ADC/DAC
APPLICATIONS
ADC/DAC/CONTROLLER
ADAS
ADS7828-Q1
HEV/EV
ADS7951-Q1, ADS1120-Q1, ADS1258,
BQ76PL455A-Q1
11.2 Typical Applications
11.2.1 Basic Voltage Reference Connection
The circuit shown in Figure 11-1 shows the basic configuration for the REF34-Q1 references. Connect bypass
capacitors according to the guidelines in Section 11.2.1.2.1.
10
10
-
Input Signal
+
124
1 nF
ADS7828-Q1
REF
VIN
CIN
1µF
REF34-Q1
COUT
10 µF
Copyright © 2017, Texas Instruments Incorporated
Figure 11-1. Basic Reference Connection
18
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11.2.1.1 Design Requirements
A detailed design procedure is based on a design example. For this design example, use the parameters listed
in Table 11-2 as the input parameters.
Table 11-2. Design Example Parameters
DESIGN PARAMETER
Input voltage VIN
VALUE
12 V
Output voltage VOUT
5V
REF3450-Q1 input capacitor
1 µF
REF3450-Q1 output capacitor
10 µF
11.2.1.2 Detailed Design Procedure
11.2.1.2.1 Input and Output Capacitors
A 1-μF to 10-μF electrolytic or ceramic capacitor can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. Connect an additional 0.1-μF ceramic capacitor in parallel
to reduce high frequency supply noise.
A ceramic capacitor of at least a 0.1 μF must be connected to the output to improve stability and help filter out
high frequency noise. An additional 1-μF to 10-μF electrolytic or ceramic capacitor can be added in parallel to
improve transient performance in response to sudden changes in load current; however, keep in mind that doing
so increases the turnon time of the device.
Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors
(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1-μF ceramic capacitor in
parallel to reduce overall ESR on the output.
11.2.1.2.2 4-Wire Kelvin Connections
Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this drop can reach
several millivolts or more, introducing a considerable error into the output voltage of the reference. A 1-inch long,
5-millimeter wide trace of 1-ounce copper has a resistance of approximately 100 mΩ at room temperature; at a
load current of 10 mA, this can introduce a full millivolt of error. In an ideal board layout, the reference must be
mounted as close as possible to the load to minimize the length of the output traces, and, therefore, the error
introduced by voltage drop. However, in applications where this is not possible or convenient, force and sense
connections (sometimes referred to as Kelvin sensing connections) are provided as a means of minimizing the
IR drop and improving accuracy.
Kelvin connections work by providing a set of high impedance voltage-sensing lines to the output and ground
nodes. Because very little current flows through these connections, the IR drop across their traces is negligible,
and the output and ground.
It is always advantageous to use Kelvin connections whenever possible. However, in applications where the IR
drop is negligible or an extra set of traces cannot be routed to the load, the force and sense pins for both V OUT
and GND can simply be tied together, and the device can be used in the same fashion as a normal 3-terminal
reference (as shown in Figure 9-6).
11.2.1.2.3 VIN Slew Rate Considerations
In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient
anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry
loses power.
To avoid such conditions, ensure that the input voltage wave-form has both a rising and falling slew rate close to
6 V/ms.
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11.2.1.2.4 Shutdown/Enable Feature
The REF34-Q1 references can be switched to a low power shut-down mode when a voltage of 0.5 V or lower is
input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 1.6 V or higher.
During shutdown, the supply current drops to less than 2 μA, useful in applications that are sensitive to power
consumption.
If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.5 V and 1.6 V
because this causes a large increase in the supply current of the device and may keep the reference from
starting up correctly. If not using the shutdown feature, however, the ENABLE pin can simply be tied to the IN
pin, and the reference remains operational continuously.
11.2.1.3 Application Curves
2.6
75
Quiescent Current Off (µA)
Quiescent Current (µA)
74.5
74
73.5
73
72.5
72
-25
0
25
50
Temperature (°C)
75
100
125
2.3
2.2
2
-40
D004
Figure 11-2. Quiescent Current vs Temperature
20
2.4
2.1
71.5
71
-50
2.5
-15
10
35
60
Temperature (°C)
85
110 125
D013
Figure 11-3. Quiescent Current Shutdown Mode
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11.2.2 Advanced Driver Assistance Systems (ADAS) Microcontroller Connection
11.2.2.1 Basic Voltage Reference Connection
The circuit shown in Figure 11-4 shows the basic configuration for the REF34-Q1 references.
3V VDD
VDD
AIN0
AIN1
AIN2
AIN3
VREF+
2.5V VREF
VREF-
OUT
IN
GND
EN
REF3425-Q1
ADS7828-Q1
3.3V VDD
I2C
VDD
GPIO0
GPIOx
I2C
TDA2 (MCU)
Copyright © 2017, Texas Instruments Incorporated
Figure 11-4. ADAS Microcontroller Application
11.2.2.2 Design Requirements
In ADAS applications it is common to use an ADC with a MCU to monitor the voltage rails to the MCU/DSP/
FPGAs. In figure Figure 11-4 the automotive TI Jacinto™ TDA2 MCU is using a ADS7828-Q1 to monitor several
analog input signals and in ADAS these signals will be the system power rails. It is important to monitor these
power rails because tighter rail requirements allow for further system monitoring and optimization. The
REF3425-Q1 is used in this application to provide the precise voltage reference signal. In these systems it is not
typical to have calibration and such the most precise low power voltage reference is necessary to be able to
measure down to 1% accuracy on key power rails.
For this design example, use the parameters listed in Table 11-3 as the input parameters and desired output
parameters.
Table 11-3. Typical Core Voltage Rail Monitoring
SPECIFICATION
REQUIREMENT
Input Voltage VIN
3V
Output Voltage
2.5V
Voltage Power Rail
1V
Max Error on Voltage Power Rail
1%
Temperature Range
-40°C to 125°C
11.2.2.3 Detailed Design Procedure
It is important to keep track of the error margin in this system to make sure that the total error of the voltage
reference and ADC are less than the maximum 1% error allowed. To calculate the total RSS error of a voltage
reference use Equation 5.
ErrorVREF
Total
Accuracy
2
TempCo
2
TempHyst
2
LongTerm Drift
2
1/ f Noise
2
(5)
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With the RSS error of the voltage reference, the ADC error needs also needs to be calculated using the RSS
method as seen in Equation 6. Equation 7 can then be used to sum both errors. It is important to make sure that
only the applicable voltage reference error in relation to the measured signal is used.
Total Unadjusted Error
ErrorADC
Total
Gain Error
ErrorVREF
ADC Total
2
ErrorVREF@ AIN
Offset Error
2
Total
2
ErrorADC
INL Error
2
DNL Error
2
(6)
2
Total
(7)
11.2.2.4 Enable Feature in ADAS
In ADAS applications it is important to have a low quiescent current when the automotive application does not
require the ADAS system to be in use. This creates a need for a low standby power so the battery life is
preserved but there is also need for the system to still be readily available to start-up with minimal delays. In
such situations the MCU and other systems will go into a standby mode to ensure that the power consumption is
lowered to the absolute minimum. The REF3425-Q1 offers an enable pin that can be controlled by the MCU to
activate shutdown mode with causes the REF3425-Q1 to go into stand by and consume 3 μA (maximum) and
allow for a longer battery life.
22
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12 Power Supply Recommendations
The REF34-Q1 family of references feature an extremely low-dropout voltage. These references can be
operated with a supply of only 50 mV above the output voltage. TI recommends a supply bypass capacitor
ranging between 0.1 µF to 10 µF.
13 Layout
13.1 Layout Guidelines
Figure 13-1 illustrates an example of a PCB layout for a data acquisition system using the REF34-Q1. Some key
considerations are:
• Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF of the REF34-Q1.
• Decouple other active devices in the system per the device specifications.
• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise
pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
13.2 Layout Example
C
GND_F 1
6 OUT_F
GND_S 2
EN
REF34XX
3
5 OUT_S
4
IN
Figure 13-1. Layout Example (REF34xx-Q1 DBV Package)
NC
1
GND 2
5 NIC
REF34S-Q1
CIN
IN
4 OUT
3
COUT
Figure 13-2. Layout Example (REF34xxS-Q1 DBV Package)
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CIN
ENABLE 1
GND_S 2
GND_F 3
8 IN
REF34-Q1
(DGK)
NIC 4
7 OUT_S
6 OUT_F
5 NIC
COUT
Figure 13-3. Layout Example (REF34xx-Q1 DGK Package)
24
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14 Device and Documentation Support
14.1 Documentation Support
14.1.1 Related Documentation
For related documentation see the following:
•
•
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt
Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
14.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
14.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
14.4 Trademarks
Jacinto™ is a trademark of Texas Instruments.
TI E2E™ is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
14.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
14.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
REF3425QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1OLC
REF3425QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2E93
REF3425SQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2D6C
REF3430QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1OMC
REF3430QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2FW3
REF3430SQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2D7C
REF3433QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1ONC
REF3433QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2FV3
REF3433SQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2D8C
REF3440QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1OOC
REF3440QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2FQ3
REF3440SQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2D9C
REF3450QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1OPC
REF3450QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2FX3
REF3450SQDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2DAC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
2-Apr-2021
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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