Product
Folder
Sample &
Buy
Support &
Community
Tools &
Software
Technical
Documents
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
SNx5LBC184 Differential Transceiver With Transient Voltage Suppression
1 Features
3 Description
•
•
The SN75LBC184 and SN65LBC184 devices are
differential data line transceivers in the trade-standard
footprint of the SN75176 with built-in protection
against high-energy noise transients. This feature
provides a substantial increase in reliability for better
immunity to noise transients coupled to the data
cable over most existing devices. Use of these
circuits provides a reliable low-cost direct-coupled
(with no isolation transformer) data line interface
without requiring any external components.
1
•
•
•
•
•
•
•
•
•
•
Integrated Transient Voltage Suppression
ESD Protection for Bus Terminals Exceeds:
±30 kV IEC 61000-4-2, Contact Discharge
±15 kV IEC 61000-4-2, Air-Gap Discharge
±15 kV EIA/JEDEC Human Body Model
Circuit Damage Protection of 400-W Peak
(Typical) Per IEC 61000-4-5
Controlled Driver Output-Voltage Slew Rates
Allow Longer Cable Stub Lengths
250-kbps in Electrically Noisy Environments
Open-Circuit Fail-Safe Receiver Design
1/4 Unit Load Allows for 128 Devices Connected
on Bus
Thermal Shutdown Protection
Power-Up and Power-Down Glitch Protection
Each Transceiver Meets or Exceeds the
Requirements of TIA/EIA-485 (RS-485) and
ISO/IEC 8482:1993(E) Standards
Low Disabled Supply Current 300 μA Maximum
Pin Compatible With SN75176
The SN75LBC184 and SN65LBC184 can withstand
overvoltage transients of 400-W peak (typical). The
conventional combination wave called out in IEC
61000-4-5 simulates the overvoltage transient and
models a unidirectional surge caused by overvoltages
from switching and secondary lightning transients.
Device Information(1)
PART NUMBER
SN65LBC184,
SN75LBC184
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
PDIP (8)
9.81 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
2 Applications
•
•
•
Industrial Networks
Utility Meters
Motor Control
Logic Symbol
NOTE: This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
3
3
4
4
5
5
6
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: Driver ...............................
Electrical Characteristics: Receiver ..........................
Driver Switching Characteristics ...............................
Receiver Switching Characteristics...........................
Dissipation Ratings ...................................................
Typical Characteristics ............................................
Parameter Measurement Information .................. 8
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
12
12
12
13
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 Device and Documentation Support ................. 20
12.1
12.2
12.3
12.4
12.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
13 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (February 2009) to Revision I
•
2
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
5 Pin Configuration and Functions
D Package, P Package
8-Pin SOIC, 8-Pin PDIP
Top View
Pin Functions
PIN
NAME
I/O
NO.
DESCRIPTION
A
6
Bus input/output
Driver output or receiver input (complementary to B)
B
7
Bus input/output
Driver output or receiver input (complementary to A)
D
4
Digital input
Driver data input
DE
3
Digital input
Active-HIGH driver enable
GND
5
Reference potential
Local device ground
R
1
Digital output
Receiver data output
RE
2
Digital input
VCC
8
Supply
Active-LOW receiver enable
4.75-V to 5.25-V supply
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
VCC
Supply voltage
IO
Tstg
(1)
(2)
(3)
(2)
MAX
UNIT
–0.5
7
V
Continuous voltage range at any bus terminal
–15
15
V
Data input/output voltage
–0.3
7
V
Receiver output current
–20
20
mA
Continuous total power dissipation (3)
Internally Limited
Storage temperature
160
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
The driver shuts down at a junction temperature of approximately 160°C. To operate below this temperature, see the Dissipation
Ratings.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC A, B, GND
JS-001 (1)
All pins
V(ESD)
(1)
(2)
Electrostatic
discharge
UNIT
±15000
±3000
Contact discharge (IEC61000-4-2)
A, B, GND (2)
±30000
Air discharge (IEC61000-4-2)
A, B, GND(3)
±15000
All pins (Class 3A)
±8000
All pins (Class 3B)
±200
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
GND and bus pin ESD protection is beyond readily available test equipment capabilities for IEC 61000-4-2, EIA/JEDEC test method
A114-A and MIL-STD-883C method 3015. Ratings listed are limits of test equipment; device performance exceeds these limits.
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
3
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
VI or VIC
Voltage at any bus terminal (separately or common mode)
VIH
High-level input voltage
D, DE, and RE
VIL
Low-level input voltage
D, DE, and RE
|VID|
Differential input voltage
IOH
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
(1)
MIN (1)
TYP
MAX
UNIT
4.75
5
5.25
V
12
V
–7
2
Driver
V
0.8
V
12
V
–60
Receiver
mA
–8
Driver
60
Receiver
4
SN75LBC184
0
70
SN65LBC184
–40
85
mA
°C
The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet.
6.4 Thermal Information
SNx5LBC184
THERMAL METRIC (1)
P [PDIP]
D [SOIC]
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
108.7
172.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
34.8
42.5
°C/W
RθJB
Junction-to-board thermal resistance
23.6
41.4
°C/W
ψJT
Junction-to-top characterization parameter
12
4.6
°C/W
ψJB
Junction-to-board characterization parameter
23.5
40.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
6.5 Electrical Characteristics: Driver
over recommended operating conditions (unless otherwise noted)
PARAMETER
ALTERNATE
SYMBOLS
TEST CONDITIONS
MIN
DE = RE = 5 V No Load
ICC
Supply current
NA
DE = 0 V
RE = 5 V
IIH
High-level input current
(D, DE, RE)
NA
VI = 2.4 V
IIL
Low-level input current
(D, DE, RE)
NA
VI = 0.4 V
–50
VO = –7 V
–250
IOS
Short-circuit output
current OS (2)
NA
12
25
mA
175
300
μA
50
μA
–120
250
250
VO
Output voltage
VOC(PP)
Peak-to-peak change in
common-mode output
voltage during state
transitions
VOC
Common-mode output
voltage
|Vos|
See Figure 8
|ΔVOC(SS)|
Magnitude of change,
common-mode steadystate output voltage
|Vos – Vos|
See Figure 10
|VOD|
Magnitude of
differential output
voltage |VA – VB|
Δ|VOD|
Change in differential
voltage magnitude
between logic states
UNIT
μA
VO = 12 V
High-impedance output
current
(1)
(2)
MAX
VO = VCC
IOZ
NA
No Load
TYP (1)
See Receiver II
Voa, Vob
IO = 0
NA
mA
0
VCC
See Figure 9 and Figure 10
Vo
0.8
1
IO = 0
1.5
RL = 54 Ω, See Figure 8
1.5
V
V
3
V
0.1
V
6
V
V
RL = 54 Ω
||Vt| – |Vt||
mA
0.1
V
All typical values are measured with TA = 25°C and VCC = 5 V.
This parameter is measured with only one output being driven at a time.
6.6 Electrical Characteristics: Receiver
over recommended operation conditions (unless otherwise noted)
PARAMETER
ICC
TEST CONDITIONS
Supply current (total package)
TYP (1)
MAX
UNIT
DE = RE = 0 V, No Load
3.9
mA
RE = 5 V, DE = 0 V, No Load
300
μA
VI = 12 V
250
VI = 12 V, VCC = 0
250
II
Input current
Other input = 0 V
IOZ
High-impedance-state output current
VO = 0.4 V to 2.4 V
Vhys
Input hysteresis voltage
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
VOH
High-level output voltage
IOH = –8 mA, See Figure 11
VOL
Low-level output voltage
IOL = 4 mA, See Figure 11
(1)
MIN
VI = –7 V
–200
VI = –7 V, VCC = 0
–200
±100
70
μA
μA
mV
200
–200
V
mV
2.8
V
0.4
V
All typical values are at VCC = 5 V, TA = 25°C.
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
5
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
6.7 Driver Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(DH) Differential output delay time, low-to-high-level output
1.3
μs
td(DL)
Differential output delay time, high-to-low-level output
1.3
μs
tPLH
Propagation delay time, low-to-high-level output
0.5
1.3
μs
tPHL
Propagation delay time, high-to-low-level output
0.5
1.3
μs
tsk(p)
Pulse skew (| td(DH) – td(DL)|)
75
150
ns
tr
Rise time, single-ended
0.25
1.2
μs
tf
Fall time, single-ended
0.25
1.2
μs
tPZH
Output enable time to high level
RL = 110 Ω
See Figure 6
3.5
μs
tPZL
Output enable time to low level
RL = 110 Ω
See Figure 7
3.5
μs
tPHZ
Output disable time from high level
RL = 110 Ω
See Figure 6
2
μs
tPLZ
Output disable time from low level
RL = 110 Ω
See Figure 7
2
μs
RL = 54 Ω
CL = 50 pF
See Figure 9
6.8 Receiver Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low-to-high-level output
tPHL
Propagation delay time, high-to-low-level output
tsk(p)
Pulse skew (|tPHL– tPLH|)
tr
Rise time, single-ended
tf
Fall time, single-ended
tPZH
Output enable time to high level
tPZL
Output enable time to low level
tPHZ
Output disable time from high level
tPLZ
Output disable time from low level
MIN
TYP
CL = 50 pF, See Figure 11
MAX
UNIT
150
ns
150
ns
50
ns
20
See Figure 11
ns
20
See Figure 12
ns
100
ns
100
ns
100
ns
100
ns
6.9 Dissipation Ratings
6
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
377 mW
P
1150 mW
9.2 mW/°C
736 mW
598 mW
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
6.10 Typical Characteristics
Figure 1. Driver Differential Output Voltage vs Free-Air
Temperature
Figure 2. Driver Propagation Delay Time vs Free-Air
Temperature
Figure 3. Driver Transition Time vs Free-Air Temperature
Figure 4. Differential Output Voltage vs Output Current
Figure 5. Receiver Input Current vs Input Voltage
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
7
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
7 Parameter Measurement Information
A.
The input pulse is supplied by a generator having the following characteristics: PRR = 1.25 kHz, 50% duty cycle, tr ≤
10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 6. Driver tPZH and tPHZ Test Circuit and Voltage Waveforms
A.
The input pulse is supplied by a generator having the following characteristics: PRR = 1.25 kHz, 50% duty cycle, tr ≤
10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 7. Driver tPZL and tPLZ Test Circuit and Voltage Waveforms
A.
Resistance values are in ohms and are 1% tolerance.
B.
CL includes probe and jig capacitance.
Figure 8. Driver Test Circuit, Voltage, and Current Definitions
8
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
Parameter Measurement Information (continued)
Figure 9. Driver Timing, Voltage, and Current Waveforms
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
9
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
Parameter Measurement Information (continued)
A.
Resistance values are in ohms and are 1% tolerance.
B.
CL includes probe and jig capacitance (±10%).
Figure 10. Driver VOC(PP) Test Circuit and Waveforms
A.
This value includes probe and jig capacitance (±10%).
Figure 11. Receiver tPLH and tPHL Test Circuit and Voltage Waveforms
10
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
Parameter Measurement Information (continued)
A.
This value includes probe and jig capacitance (±10%).
Figure 12. Receiver tPZL, tPLZ, tPZH, and tPHZ Test Circuit and Voltage Waveforms
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
11
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
8 Detailed Description
8.1 Overview
The SNx5LBC184 device is a 5-V, half-duplex, RS-485 transceiver with integrated transient voltage suppressors
that prevent circuit damage in the presence of high-energy transients of up to 400-W peak power. This
transceiver has an active-HIGH driver enable and active-LOW receiver enable. The differential driver is suitable
for data transmission up to 250 kbps.
8.2 Functional Block Diagram
VCC
R
/RE
A
DE
B
D
GND
Figure 13. Functional Logic Diagram
8.3 Feature Description
Integrated transient voltage suppressors protect the transceiver against Electrostatic Discharges (ESD) according
to IEC 61000-4-2 of up to ±30 kV and surge transients according to IEC 61000-4-5 of up to 400-W peak.
The differential driver incorporates slew-rate controlled outputs sufficient to transmit data up to 250 kbps. Slewrate control allows for longer unterminated cable runs and longer stub lengths from the main cable trunk than
with faster voltage transitions. A unique receiver design provides a high level failsafe output when the inputs are
left floating.
The SN65LBC184 is characterized from –40°C to 85°C and the SN75LBC184 is characterized from 0°C to 70°C.
12
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
8.4 Device Functional Modes
When the driver enable pin (DE) is logic high, the differential outputs A and B follow the logic states at data input
D. A logic high at D causes A to turn high and B to turn low. In this case, the differential output voltage defined
as VOD = VA – VB is positive. When D is low, the output states reverse, B turns high, A becomes low, and VOD is
negative.
When DE is low, both outputs turn high-impedance. In this condition, the logic state at D is irrelevant.
Table 1. Driver Functions (1)
(1)
INPUT
ENABLE
OUTPUTS
D
DE
A
B
H
H
H
L
Actively drive
bus High
L
H
L
H
Actively drive
bus Low
X
L
Z
Z
Driver disabled
FUNCTION
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage
defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output (R)
turns high. When VID is negative and lower than the negative input threshold, VIT–, the receiver output turns low.
If VID is between VIT+ and VIT–, the output is indeterminate.
When RE is logic high, the receiver output is high-impedance and the magnitude and polarity of VID are
irrelevant. When the transceiver is disconnected from the bus, the receiver provides a failsafe high output.
Table 2. Receiver Functions (1)
(1)
DIFFERENTIAL
INPUT
ENABLE
OUTPUT
VID = VA – VB
RE
R
VID > VIT+
L
H
Receive valid bus
High
VIT– < VID < VIT+
L
?
Indeterminate bus
state
VID < VIT–
L
L
Receive valid bus Low
X
H
Z
Receiver disabled
OPEN
L
H
Receiver failsafe High
FUNCTION
H = high level, L = low level, ? = indeterminate, X = irrelevant, Z =
high impedance (off)
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
13
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
Figure 14. Schematic of Inputs and Outputs
14
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN65LBC184 and SN75LBC184 devices are half-duplex, RS-485 transceivers commonly used for
asynchronous data transmissions. The driver and receiver enable pins allow for the configuration of different
operating modes.
R
R
R
R
R
R
RE
A
RE
A
RE
A
DE
B
DE
B
DE
B
D
D
D
a) Independent driver and
receiver enable signals
D
b) Combined enable signals for
use as directional control pin
D
D
c) Receiver always on
Figure 15. Half-Duplex Transceiver Configurations
a. Using independent enable lines provides the most flexible control as it allows for the driver and the receiver
to be turned on and off individually. While this configuration requires two control lines, it allows for selective
listening into the bus traffic, whether the driver is transmitting data or not.
b. Combining the enable signals simplifies the interface to the controller by forming a single direction-control
signal. In this configuration, the transceiver operates as a driver when the direction-control line is high, and
as a receiver when the direction-control line is low.
c. Only one line is required when connecting the receiver-enable input to ground and controlling only the driverenable input. In this configuration, a node not only receives the data from the bus, but also the data it sends
and can verify that the correct data have been transmitted.
9.2 Typical Application
An RS-485 bus consists of multiple transceivers connected in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic
impedance, Z0, of the cable. This method, known as parallel termination, allows for higher data rates over a
longer cable length.
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
15
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
Typical Application (continued)
R
R
RE
B
DE
D
R
A
R
A
RT
RT
D
A
B
R
A
R
D
R RE DE D
RE
B
DE
D
B
D
D
R RE DE D
Figure 16. Typical RS-485 Network With Half-Duplex Transceivers
9.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of
applications with varying requirements, such as distance, data rate, and number of nodes.
9.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and bus length, meaning the higher the data rate, the shorter
the cable length; and conversely, the lower the data rate, the longer the cable may be without introducing data
errors. While most RS-485 systems use data rates between 10 kbps and 100 kbps, some applications require
data rates up to 250 kbps at distances of 4000 feet and longer. Longer distances are possible by allowing for
small signal jitter of up to 5 or 10%.
10000
Cable Length (ft)
5%, 10%, and 20% Jitter
1000
Conservative
Characteristics
100
10
100
1k
10k
100k
1M
10M
100M
Data Rate (bps)
Figure 17. Cable Length vs Data Rate Characteristic
16
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
Typical Application (continued)
9.2.1.2 Stub Length
When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a nonterminated piece of bus line which can introduce
reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of
a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as
shown in Equation 1.
L(STUB) ≤ 0.1 × tr × v × c
where
•
•
•
tr is the 10/90 rise time of the driver
v is the signal velocity of the cable or trace as a factor of c
c is the speed of light (3 × 108 m/s)
(1)
Per Equation 1, cable-stub lengths when using the SN65LBC184 driver must be not greater than 5.85 meters (19
feet) for a signal velocity of 78% and minimum driver output rise or fall time of 250 ns.
9.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit
load represents a load impedance of approximately 12 kΩ. Because the SN65LBC184 is a 1/4 UL transceiver, it
is possible to connect up to 128 receivers to the bus.
9.2.2 Detailed Design Procedure
9.2.2.1 SN65LBC184 Test Description
1.0
1.0
0.8
0.8
0.6
0.6
I(t) / IP
V(t) / VP
The SN65LBC184 is tested against the IEC 61000-4-5 recommended transient identified as the combination
wave. The combination wave provides a 1.2-/50-μs open-circuit voltage waveform and a 8-/20-μs short-circuit
current waveform shown in Figure 18. The testing is performed with a combination/hybrid pulse generator with an
effective output impedance of 2 Ω. The setup for the overvoltage stress is shown in Figure 19 with all testing
performed with power applied to the SN65LBC184 circuit.
0.4
0.4
0.2
0.2
0.0
0.0
0
20
40
60
80
100
0
10
Time - µs
20
30
40
50
Time - µs
Figure 18. Open-Circuit Voltage and Short-Circuit Current Waveforms
The SN65LBC184 is tested and evaluated for both maximum (single pulse) as well as life test (multiple pulse)
capabilities. The SN65LBC184 is evaluated against transients of both positive and negative polarity and all
testing is performed with the worst-case transient polarity. Transient pulses are applied to the bus pins (A and B)
across ground as shown in Figure 19.
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
17
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
Typical Application (continued)
Key Tech
1.2/50 – 8/20
Combination Pulse
Generator
IP
41.9 Ω
HIGH
A/B
3Ω
LOW
2Ω Internal Impedance
SN75LBC184
VP
GND
Impedance Matching
And Wave Shaping
Figure 19. Overvoltage Stress Test Circuit
9.2.3 Application Curve
An example waveform as seen by the SN65LBC184 is shown in Figure 20. The bottom trace is current, the
middle trace shows the clamping voltage of the device and the top trace is power as calculated from the voltage
and current waveforms. This example shows a peak clamping voltage of 33.6 V and peak current of 16 A, thus
yielding an absorbed peak power of 538 W.
Figure 20. Typical Surge Waveform Measured at Pins 5 and 7
18
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
SN65LBC184, SN75LBC184
www.ti.com
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
10 Power Supply Recommendations
To assure reliable operation at all data rates and supply voltages, each supply should be buffered with a 100-nF
ceramic capacitor located as close to the supply pins as possible. The TPS76350 is a linear voltage regulator
suitable for the 5-V supply.
11 Layout
11.1 Layout Guidelines
Because ESD transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high-frequency
layout techniques must be applied during PCB design.
• Use VCC and ground planes to provide low inductance. High frequency currents follow the path of least
inductance and not the path of least impedance.
• Apply 100-nF to 220-nF bypass capacitors as close as possible to the VCC pins of transceiver, UART, or
controller ICs on the board.
• Use at least two vias for VCC and ground connections of bypass capacitors to minimize effective viainductance.
• Use 1-kΩ to 10-kΩ pullup or pulldown resistors for enable lines to limit noise currents in these lines during
transient events.
11.2 Layout Example
Via to ground
R
Via to VCC
3
C
2
JMP
4 R
MCU
4 R
LBC184
3
Figure 21. Layout Schematic
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
Submit Documentation Feedback
19
SN65LBC184, SN75LBC184
SLLS236I – OCTOBER 1996 – REVISED JUNE 2015
www.ti.com
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN65LBC184
Click here
Click here
Click here
Click here
Click here
SN75LBC184
Click here
Click here
Click here
Click here
Click here
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
Submit Documentation Feedback
Copyright © 1996–2015, Texas Instruments Incorporated
Product Folder Links: SN65LBC184 SN75LBC184
PACKAGE OPTION ADDENDUM
www.ti.com
13-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN65LBC184D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB184
SN65LBC184DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB184
SN65LBC184DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB184
SN65LBC184DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB184
SN65LBC184P
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
65LBC184
SN75LBC184D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB184
SN75LBC184DG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB184
SN75LBC184DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB184
SN75LBC184DRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB184
SN75LBC184P
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
75LBC184
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
