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SN74AHC1G14
SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
SN74AHC1G14 Single Schmitt-Trigger Inverter Gate
1 Features
3 Description
•
•
•
•
•
The SN74AHC1G14 device is a single inverter gate.
The device performs the Boolean function
Y = A.
1
Operating Range 2 V to 5.5 V
Maximum tpd of 10 ns at 5 V
Low Power Consumption, 10-μA Max ICC
±8-mA Output Drive at 5 V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
The device functions as an independent inverter gate,
but because of the Schmitt action, gates may have
different input threshold levels for positive- (VT+) and
negative-going (VT−) signals.
Device Information
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
Barcode Scanners
Cable Solutions
E-Books
Embedded PCs
Field Transmitter: Temperature or Pressure
Sensors
Fingerprint Biometrics
HVAC: Heating, Ventilating, and Air Conditioning
Network-Attached Storage (NAS)
Sever Motherboard and PSU
Software Defined Radios (SDR)
TV: High Definition (HDTV), LCD, and Digital
Video Communications Systems
Wireless Data Access Cards, Headsets,
Keyboards, Mice, and LAN Cards
ORDER NUMBER
PACKAGE (PIN)
BODY SIZE (NOM)
SN74AHC1G14DBV
SOT-23 (5)
2.90 mm × 1.60 mm
SN74AHC1G14DCK
SC70 (5)
2.00 mm × 1.25 mm
SN74AHC1G14DRL
SOT (5)
1.60 mm × 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Side)
A
2
4
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AHC1G14
SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
4
4
4
5
5
6
6
6
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics, VCC = 3.3 V ± 0.3 V ........
Switching Characteristics, VCC = 5 V ± 0.5 V ...........
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 8
9
Application and Implementation .......................... 9
9.1 Application Information.............................................. 9
9.2 Typical Application ................................................... 9
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 11
12 Device and Documentation Support ................. 12
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
12
12
12
12
12
13 Mechanical, Packaging, and Orderable
Information ........................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision P (August 2013) to Revision Q
•
Added Applications section, Device Information table, Pin Configuration and Functions section, ESD Ratings table,
Thermal Information table, Typical Characteristics section, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
Changes from Revision O (May 2013) to Revision P
•
2
Page
Updated document to new TI data sheet format - no specification changes ........................................................................ 1
Changes from Revision N (June 2005) to Revision O
•
Page
Page
Changed document format from Quicksilver to DocZone. ..................................................................................................... 1
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SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
NC
1
A
DCK Package
5-Pin SC70
Top View
NC
1
A
2
GND
3
VCC
5
5
VCC
4
Y
2
3
GND
Y
4
DRL Package
5-Pin SOT
Top View
NC
1
A
2
GND
3
5
VCC
4
Y
Pin Functions (1)
PIN
NO.
NAME
I/O
DESCRIPTION
1
NC
—
No connect
2
A
I
Data Input
3
GND
—
Ground
4
Y
O
Data Output
5
VCC
—
Power
(1)
NC – No internal connection.
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SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
MIN
MAX
UNIT
Supply voltage
–0.5
7
V
(2)
–0.5
7
V
–0.5
VCC + 0.5
V
VI
Input voltage
VO
Output voltage (2)
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±20
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
±50
mA
150
°C
150
°C
Continuous current through VCC or GND
Tj
Maximum junction temperature
Tstg
Storage temperature
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±1500
Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VCC
Supply voltage
2
5.5
V
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
–50
µA
IOH
High-level output current
VCC = 2 V
IOL
TA
(1)
4
Low-level output current
VCC = 3.3 V ± 0.3 V
–4
VCC = 5 V ± 0.5 V
–8
VCC = 2 V
50
VCC = 3.3 V ± 0.3 V
4
VCC = 5 V ± 0.5 V
8
Operating free-air temperature
–40
125
mA
µA
mA
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.4 Thermal Information
SN74AHC1G14
THERMAL METRIC (1)
DBV (SOT-23)
DCK (SC70)
DRL (SOT)
5 PINS
5 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
225.7
252
271.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
160.3
—
116.6
°C/W
RθJB
Junction-to-board thermal resistance
59.4
—
89.9
°C/W
ψJT
Junction-to-top characterization parameter
41.0
—
17.3
°C/W
ψJB
Junction-to-board characterization parameter
58.7
—
89.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
VCC
TA = 25°C
MIN
TYP
RECOMMENDED
TA = –40°C to 125°C
TA = –40°C to 85°C
MAX
MIN
TYP
MAX
MIN
TYP
VT+
Positive-going
input threshold
voltage
3V
1.2
2.2
1.2
2.2
1.2
2.2
4.5 V
1.75
3.15
1.75
3.15
1.75
3.15
5.5 V
2.15
3.85
2.15
2.85
2.15
3.85
VT–
Negative-going
input threshold
voltage
3V
0.9
1.9
0.9
1.9
0.9
1.9
4.5 V
1.35
2.75
1.35
2.75
1.35
2.75
5.5 V
1.65
3.35
1.65
3.35
1.65
3.35
ΔVT
Hysteresis
(VT+ – VT–)
3V
0.3
1.2
0.3
1.2
0.25
1.2
4.5 V
0.4
1.4
0.4
1.4
0.35
1.4
5.5 V
0.5
1.6
0.5
1.6
0.45
1.6
2V
1.9
2
1.9
1.9
3V
2.9
3
2.9
2.9
4.5 V
4.4
4.5
4.4
4.4
IOH = –4 mA
3V
2.58
2.48
2.4
IOL = –8 mA
4.5 V
3.94
IOH = –50 µA
VOH
IOH = 50 µA
VOL
3.8
UNIT
MAX
V
V
V
V
3.7
2V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
IOH = 4 mA
3V
0.36
0.44
0.55
IOL = 8 mA
4.5 V
0.36
0.44
0.55
II
VI = 5.5 V or
GND
0 V to
5.5 V
±0.1
±1
±1
µA
ICC
VI = VCC or
GND, IO = 0
5.5 V
1
10
10
µA
Ci
VI = VCC or
GND
5V
10
10
10
pF
2
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V
5
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SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
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6.6 Switching Characteristics, VCC = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
(INPUT)
tPLH
A
tPHL
tPLH
OUTPUT
CAPACITANCE
Y
A
tPHL
TO
(OUTPUT)
TA = 25°C
CL = 50 pF
UNIT
TYP
MAX
MIN
MAX
MIN
MAX
8.3
12.8
1
15
1
16
ns
CL = 15 pF
Y
RECOMMENDED
TA = –40°C to
125°C
TA = –40°C to 85°C
8.3
12.8
1
15
1
16
ns
10.8
16.3
1
18.5
1
19.5
ns
10.8
16.3
1
18.5
1
19.5
ns
6.7 Switching Characteristics, VCC = 5 V ± 0.5 V
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2)
FROM
(INPUT)
PARAMETER
tPLH
A or B
tPHL
tPLH
Y
A or B
tPHL
TO
(OUTPUT)
OUTPUT
CAPACITANCE
CL = 15 pF
Y
CL = 50 pF
RECOMMENDED
TA = –40°C to
125°C
TA = –40°C to
85°C
TA = 25°C
UNIT
TYP
MAX
MIN
MAX
MIN
MAX
5.5
8.6
1
10
1
11
ns
5.5
8.6
1
10
1
11
ns
7
10.6
1
12
1
11
ns
7
10.6
1
12
1
11
ns
6.8 Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load,
TYP
f = 1 MHz
9
UNIT
pF
6.9 Typical Characteristics
5
Signal Voltage (V)
4
3
2
1
0
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
C001
TA = 25°C, VA = 5 V
Figure 1. Response Time vs Output Voltage
6
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7 Parameter Measurement Information
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
VCC
Open
S1
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
Open
VCC
GND
VCC
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
VCC
50% VCC
50% VCC
0V
th
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
0V
tPHL
tPLH
In-Phase
Output
50% VCC
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
50% VCC
VOH
50% VCC
VOL
50% VCC
0V
tPLZ
tPZL
≈VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
tPZH
tPLH
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
Output
Control
50% VCC
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output
control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns,
tf ≤ 3 ns.
D.
The outputs are measured one at a time with one input transition per measurement.
E.
All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
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8 Detailed Description
8.1 Overview
The SN74AHC1G14 device is a single inverter gate. The device performs the Boolean function
Y = A.
The device functions as an independent inverter gate, but because of the Schmitt action, gates may have
different input threshold levels for positive- (VT+) and negative-going (VT−) signals.
8.2 Functional Block Diagram
A
2
4
Y
Figure 3. Logic Diagram (Positive Side)
8.3 Feature Description
The SN74AHC1G14 device has a wide operating VCC range of 2 V to 5.5 V, which allows it to be used in a broad
range of systems. The low propagation delay allows fast switching and higher speeds of operation. In addition,
the low-power consumption makes this device a good choice for portable and battery power-sensitive
applications.
8.4 Device Functional Modes
Table 1 lists the functional modes for SN74AHC1G14.
Table 1. Function Table
8
INPUT A
OUTPUT Y
H
L
L
H
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Physically interactive interface elements like push buttons or rotary knobs offer simple and easy ways to interact
with an electronic system. Many of these physical interface elements often have issues with bouncing, or where
the physical conductive contact can connect and disconnect multiple times during a button push or release. This
bouncing can cause one or more faulty transient signals to be passed during this transitional period. These faulty
signals can be observed in many common applications, for example, a television remote with bouncing error can
adjust the TV channel multiple times despite the button being pushed only once. To mitigate these faulty signals,
we can use a Schmitt-trigger, or a device with hysteresis, to remove these faulty signals. Hysteresis allows a
device to remember its history, and in this case, the SN74AHC1G14 uses this memory to debounce the signal of
the physical element, or filter the faulty transient signals and pass only the valid signal each time the element is
used. In this example, we show a push-button signal passed through an SN74AHC1G14 that is debounced and
inverted to the microprocessor for push detection.
9.2 Typical Application
VCC
Physical Push
Button
Microprocessor
SN74AHC1G14
Figure 4. Switch Debouncer
9.2.1 Design Requirements
The SN74AHC1G14 device uses CMOS technology and has balanced output drive. Take care to avoid bus
contention because it can drive currents that would exceed maximum limits. The SN74AHC1G14 allows for
performing logical Boolean functions with hysteresis using digital signals. All input signals must remain as close
as possible to either 0 V or VCC for optimal operation.
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Typical Application (continued)
9.2.2 Detailed Design Procedure
1. Recommended input conditions:
– For rise time and fall time specifications, see Δt/Δv in the Recommended Operating Conditions table.
– For specified high and low levels, see VIH and VIL in the Recommended Operating Conditions table.
– Inputs and outputs are overvoltage tolerant and can therefore go as high as 5.5 V at any valid VCC.
2. Recommended output conditions:
– Load currents must not exceed ±50 mA.
3. Frequency selection criterion:
– The effects of frequency upon the power consumption of the device can be studied in CMOS Power
Consumption and CPD Calculation, SCAA035.
– Added trace resistance and capacitance can reduce maximum frequency capability; follow the layout
practices listed in the Layout Guidelines section.
9.2.3 Application Curves
VCC = 5.5 V
VCC = 5.5 V
Figure 5. AHC Family VOH vs IOH
10
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Figure 6. AHC Family VOL vs IOL
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10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating listed in the
Recommended Operating Conditions table.
Each VCC terminal must have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If multiple pins are labeled VCC, then a 0.01-μF or 0.022-μF
capacitor is recommended for each VCC because the VCC pins are tied together internally. For devices with dualsupply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass capacitor is recommended
for each supply pin. To reject different frequencies of noise, use multiple bypass capacitors in parallel. Capacitors
with values of 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor must be installed as close
as possible to the power terminal for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to the loop antenna theory but are different enough to be discussed
separately from the theory. When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection
occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to
1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed
capacitance and self-inductance of the trace, which results in the reflection. Not all PCB traces can be straight;
therefore some traces must turn corners. Figure 7 shows progressively better techniques of rounding corners.
Only the last example (BEST) maintains constant trace width and minimizes reflections.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 7. Trace Example
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• Implications of Slow or Floating CMOS Inputs, SCBA004
• CMOS Power Consumption and CPD Calculation, SCAA035
• Selecting the Right Texas Instruments Signal Switch, SZZA030
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
12
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PACKAGE OPTION ADDENDUM
www.ti.com
4-Apr-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74AHC1G14DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(A143, A14G, A14J,
A14L, A14S)
SN74AHC1G14DBVRE4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
A14G
SN74AHC1G14DBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
A14G
SN74AHC1G14DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(A143, A14G, A14J,
A14L, A14S)
SN74AHC1G14DCK3
ACTIVE
SC70
DCK
5
3000
Pb-Free
(RoHS)
CU SNBI
Level-1-260C-UNLIM
-40 to 125
AFY
SN74AHC1G14DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(AF3, AFG, AFJ, AF
L, AFS)
SN74AHC1G14DCKRE4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AF3
SN74AHC1G14DCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AF3
SN74AHC1G14DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(AF3, AFG, AFJ, AF
L, AFS)
SN74AHC1G14DCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AF3
SN74AHC1G14DCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AF3
SN74AHC1G14DRLR
ACTIVE
SOT-5X3
DRL
5
4000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
AFS
SN74AHC1G14DRLRG4
ACTIVE
SOT-5X3
DRL
5
4000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
AFS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Apr-2019
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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