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SN54AHCT14, SN74AHCT14
SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
SNx4AHCT14 Hex Schmitt-Trigger Inverters
1 Features
3 Description
•
•
The SNx4AHCT14 devices contain six independent
inverters. These devices perform the Boolean
function Y = A.
1
•
•
Inputs are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
Device Information(1)
PART NUMBER
SNxAHCT14
PACKAGE
BODY SIZE (NOM)
VQFN (14)
3.50 mm × 3.50 mm
TSSOP (14)
5.00 mm × 4.40 mm
SSOP (14)
6.20 mm × 5.30 mm
TVSOP (14)
3.60 mm × 4.40 mm
SOIC (14)
8.65 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
Servers
Network Switches
Telecom Infrastructures
Tests and Measurements
4 Simplified Schematic
A
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54AHCT14, SN74AHCT14
SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Schematic.............................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
4
4
4
5
5
5
6
6
6
Absolute Maximum Ratings ......................................
Handling Ratings.......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Noise Characteristics ................................................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 8
9.1
9.2
9.3
9.4
Overview ...................................................................
Functional Block Diagram .........................................
Feature Description...................................................
Device Functional Modes..........................................
8
8
8
8
10 Application and Implementation.......................... 9
10.1 Application Information............................................ 9
10.2 Typical Application .................................................. 9
11 Power Supply Recommendations ..................... 11
12 Layout................................................................... 11
12.1 Layout Guidelines ................................................. 11
12.2 Layout Example .................................................... 11
13 Device and Documentation Support ................. 12
13.1
13.2
13.3
13.4
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
12
12
12
12
14 Mechanical, Packaging, and Orderable
Information ........................................................... 12
5 Revision History
Changes from Revision P (July 2003) to Revision Q
Page
•
Updated document to new TI data sheet standards. ............................................................................................................. 1
•
Deleted Ordering Information table. ....................................................................................................................................... 1
•
Added Military Disclaimer to Features list. ............................................................................................................................. 1
•
Added Pin Functions table...................................................................................................................................................... 3
•
Added Handling Ratings table. ............................................................................................................................................... 4
•
Changed SN74AHCT14 MAX ambient temperature in Recommended Operating Conditions table. ................................... 4
•
Added Thermal Information table. .......................................................................................................................................... 5
•
Added Typical Characteristics. ............................................................................................................................................... 6
•
Added Detailed Description section........................................................................................................................................ 8
•
Added Application and Implementation section...................................................................................................................... 9
•
Added Power Supply Recommendations section................................................................................................................. 11
•
Added Layout section. .......................................................................................................................................................... 11
2
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Product Folder Links: SN54AHCT14 SN74AHCT14
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SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
6 Pin Configuration and Functions
2
3
13
12
4
11
5
10
6
9
7
8
VCC
6A
6Y
5A
5Y
4A
4Y
1Y
2A
2Y
3A
3Y
VCC
14
1
14
2
13 6A
3
12 6Y
5A
4
11
5
10 5Y
9 4A
6
7
8
4Y
1
GND
1A
1Y
2A
2Y
3A
3Y
GND
1A
SN74AHCT14 . . . RGY PACKAGE
(TOP VIEW)
SN54AHCT14 . . . J OR W PACKAGE
SN74AHCT14 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
1Y
1A
NC
VCC
6A
SN54AHCT14 . . . FK PACKAGE
(TOP VIEW)
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
2A
NC
2Y
NC
3A
NC − No internal connection
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
1A
I
1A1
2
1Y
O
1Y1
3
2A
I
2A1
4
2Y
O
2Y1
5
3A
I
3A1
6
3Y
O
3Y1
7
GND
—
Ground pin
8
4Y
O
4Y1
9
4A
I
4A1
10
5Y
O
5Y1
11
5A
I
5A1
12
6Y
O
6Y1
13
6A
I
6A1
14
VCC
—
Power pin
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
MIN
MAX
Supply voltage range
–0.5
7
UNIT
V
(2)
–0.5
7
V
–0.5
VCC + 0.5
VI
Input voltage range
VO
Output voltage range (2)
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±20
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
±50
mA
Continuous current through VCC or GND
(1)
(2)
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
7.2 Handling Ratings
Tstg
Storage temperature range
V(ESD)
(1)
(2)
Electrostatic discharge
MIN
MAX
UNIT
°C
–65
150
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins (1)
0
2000
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins (2)
0
1000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
SN54AHCT14
SN74AHCT14
UNIT
MIN
MAX
MIN
MAX
4.5
5.5
4.5
5.5
V
V
VCC
Supply voltage
VI
Input voltage
0
5.5
0
5.5
VO
Output voltage
0
VCC
0
VCC
IOH
High-level output current
–8
–8
mA
IOL
Low-level output current
8
8
mA
TA
Operating free-air temperature
125
°C
(1)
4
–55
125
–40
V
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI Application Report,
Implications of Slow or Floating CMOS Inputs, (SCBA004).
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SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
7.4 Thermal Information
SN74AHCT595
THERMAL METRIC (1)
D
DGV
DB
N
NS
PW
RGY
UNIT
14 PINS
RθJA
Junction-to-ambient thermal
resistance
101.2
138.7
113.1
61.1
98.6
129.9
63.7
RθJC(top)
Junction-to-case (top) thermal
resistance
62.3
60.6
65.6
48.0
54.1
58.3
77.6
RθJB
Junction-to-board thermal
resistance
55.5
71.8
60.4
41.0
57.4
71.8
39.7
ψJT
Junction-to-top characterization
parameter
25.5
10.6
25.5
32.4
19.6
10.2
5.7
ψJB
Junction-to-board characterization
parameter
55.2
71.1
59.9
40.9
57.0
71.2
39.9
RθJC(bot)
Junction-to-case (bottom) thermal
resistance
n/a
n/a
n/a
n/a
n/a
n/a
19.9
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, (SPRA953).
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
MIN
TYP
SN54AHCT14
SN74AHCT14
MAX
MIN
MAX
MIN
MAX
VT+
Positive-going
input threshold
voltage
4.5 V
0.9
1.9
0.9
1.9
0.9
1.9
5.5 V
1
2.1
1
2.1
1
2.1
VT–
Negative-going
input threshold
voltage
4.5 V
0.5
1.5
0.5
1.5
0.5
1.5
5.5 V
0.6
1.7
0.6
1.7
0.6
1.7
ΔVT
Hysteresis
( VT+ – VT– )
4.5 V
0.4
1.4
0.4
1.4
0.4
1.4
5.5 V
0.4
1.5
0.4
1.5
0.4
1.5
VOH
VOL
II
(2)
Ci
(1)
(2)
4.5 V
IOH = –8 mA
IOL = 50 µA
4.4
4.5
3.94
4.4
4.4
3.8
3.8
V
V
V
V
0.1
0.1
0.1
0.36
0.44
0.44
0 V to
5.5 V
±0.1
±1 (1)
±1
µA
IO = 0
5.5 V
2
20
20
µA
One input at 3.4 V,
Other inputs at VCC or GND
5.5 V
1.35
1.5
1.5
mA
10
pF
4.5 V
IOL = 8 mA
VI = 5.5 V or GND
ICC
ΔICC
IOH = –50 µA
UNIT
VI = VCC or GND
VI = VCC or GND
5V
2
10
V
On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
7.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
tPLH
tPHL
tPLH
tPHL
(1)
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
Y
CL = 15 pF
A
Y
CL = 50 pF
TA = 25°C
MIN
SN54AHCT14
SN74AHCT14
TYP
MAX
MIN
MAX
MIN
MAX
4 (1)
7 (1)
1 (1)
8 (1)
1
8
(1)
(1)
(1)
(1)
1
8
4
7
1
8
5.5
8
1
9
1
9
5.5
8
1
9
1
9
UNIT
ns
ns
On products compliant to MIL-PRF-38535, this parameter is not production tested.
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7.7 Noise Characteristics
VCC = 5 V, CL = 50 pF, TA = 25°C (1)
SN74AHCT14
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
0.9
V
VOL(V)
Quiet output, minimum dynamic VOL
–0.7
V
VOH(V)
Quiet output, minimum dynamic VOH
4.3
V
VIH(D)
High-level dynamic input voltage
VIL(D)
Low-level dynamic input voltage
(1)
2.1
V
0.5
V
TYP
UNIT
112
pF
Characteristics are for surface-mount packages only.
7.8 Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
No load,
f = 1 MHz
7.9 Typical Characteristics
One common misconception is that the current consumption will be less when switching a slow signal into a Schmitt trigger.
This is partly true because the Schmitt trigger prevents oscillation which can draw a lot of current; however, you will see
higher ICC current due to the amount of time the input is not at the rail. This is Delta ICC. Delta ICC is where the inputs are not
at the rails and upper or lower drive transistors are partially on. Figure 1 shows ICC across the input voltage sweep.
Figure 1. Supply Current vs Input Voltage
6
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SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
8 Parameter Measurement Information
VCC
From Output
Under Test
Test
Point
From Output
Under Test
RL = 1 kΩ
S1
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
1.5 V
0V
tPZL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
3V
Output
Control
VOL + 0.3 V
VOL
tPHZ
Output
Waveform 2
S1 at GND
(see Note B)
50% VCC
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
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9 Detailed Description
9.1 Overview
The SNx4AHCT14 devices contain six independent inverters. These devices perform the Boolean function Y = A.
Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have different
input threshold levels for positive-going (VT+) and for negative-going (VT−) signals.
9.2 Functional Block Diagram
A
Y
9.3 Feature Description
•
•
Inputs are TTL-Voltage compatible
Inputs accept very slow or noisy inputs
9.4 Device Functional Modes
Table 1. Function Table
(Each Inverter)
8
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INPUT
A
OUTPUT
Y
H
L
L
H
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SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
10 Application and Implementation
10.1 Application Information
Schmitt triggers should be used anytime you need to translate a sign wave into a square wave, or used where a
slow or noisy input needs to be sped up or cleaned up as in the switch de-bouncer circuit.
10.2 Typical Application
5V
10 kΩ
1/6 W
SN74AHCT14
10 nf
Circuit Symbol for a
Schmitt Trigger
Figure 3. Switch De-bouncer Using Schmitt Trigger Inverter
10.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. The high drive will also create fast
edges into light loads; therefore, routing and load conditions should be considered to prevent ringing.
10.2.2 Detailed Design Procedure
1. Recommended input conditions
– Rise time and fall time specs: See (Δt/ΔV) in the Recommended Operating Conditions table.
– Specified High and low levels: See (VIH and VIL) in the Recommended Operating Conditions table.
– Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC
2. Recommend output conditions
– Load currents should not exceed 25 mA per output and 50 mA total for the part
– Outputs should not be pulled above VCC
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Typical Application (continued)
10.2.3 Application Curves
Figure 4. Typical Application Curves
10
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SCLS246Q – OCTOBER 1995 – REVISED JULY 2014
11 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions table.
Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, 0.1 μf is recommended. If there are multiple VCC pins, 0.01 μf or 0.022 μf is recommended for each
power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μf and 1
μf are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible
for best results.
12 Layout
12.1 Layout Guidelines
When using multiple bit logic devices inputs should not ever float.
In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two
inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be
left unconnected because the undefined voltages at the outside connections result in undefined operational
states. Specified in Figure 5 are the rules that must be observed under all circumstances. All unused inputs of
digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that
should be applied to any particular unused input depends on the function of the device. Generally they will be
tied to GND or VCC; whichever makes more sense or is more convenient. It is generally acceptable to float
outputs unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the outputs
section of the part when asserted. This will not disable the input section of the IO’s so they cannot float when
disabled.
12.2 Layout Example
Vcc
Input
Unused Input
Output
Unused Input
Output
Input
Figure 5. Layout Diagram
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13 Device and Documentation Support
13.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN54AHCT14
Click here
Click here
Click here
Click here
Click here
SN74AHCT14
Click here
Click here
Click here
Click here
Click here
13.2 Trademarks
13.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
12
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9680101Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629680101Q2A
SNJ54AHCT
14FK
5962-9680101QCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101QC
A
SNJ54AHCT14J
5962-9680101QDA
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101QD
A
SNJ54AHCT14W
5962-9680101VCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101VC
A
SNV54AHCT14J
5962-9680101VDA
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101VD
A
SNV54AHCT14W
SN74AHCT14D
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHCT14
SN74AHCT14DBR
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14DG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHCT14
SN74AHCT14DGVR
ACTIVE
TVSOP
DGV
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14DGVRE4
ACTIVE
TVSOP
DGV
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14DR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHCT14
SN74AHCT14DRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHCT14
SN74AHCT14N
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 85
SN74AHCT14N
SN74AHCT14NSR
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHCT14
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
24-Aug-2018
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74AHCT14PW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14PWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14PWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14PWRE4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
SN74AHCT14RGYR
ACTIVE
VQFN
RGY
14
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
HB14
SNJ54AHCT14FK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629680101Q2A
SNJ54AHCT
14FK
SNJ54AHCT14J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101QC
A
SNJ54AHCT14J
SNJ54AHCT14W
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9680101QD
A
SNJ54AHCT14W
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of