SN54AHCT14, SN74AHCT14
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
SNx4AHCT14 Hex Schmitt-Trigger Inverters
1 Features
3 Description
•
•
The SNx4AHCT14 devices contain six independent
inverters. These devices perform the Boolean function
Y = A.
•
•
Inputs are TTL-voltage compatible
Latch-up performance exceeds 250 mA per JESD
17
ESD protection exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
On products compliant to MIL-PRF-38535,
all parameters are tested unless otherwise noted.
On all other products, production processing does
not necessarily include testing of all parameters.
Package Information
PART NUMBER
SN54AHCT14
2 Applications
•
•
•
•
SN74AHCT14
Servers
Network switches
Telecom infrastructures
Tests and measurements
(1)
PACKAGE(1)
BODY SIZE (NOM)
J (CDIP, 14)
19.56 mm × 6.67 mm
W (CFP, 14)
9.21 mm × 5.97 mm
FK (LCCC, 20)
8.89 mm × 8.89 mm
D (SOIC, 14)
8.65 mm × 3.91 mm
DB (SSOP, 14)
6.20 mm × 5.30 mm
DGV (TVSOP, 14)
3.60 mm × 4.40 mm
N (PDIP, 14)
19.30 mm × 6.35 mm
NS (SOP, 14)
10.30 mm × 5.30 mm
PW (TSSOP, 14)
5.00 mm × 4.40 mm
RGY (VQFN, 14)
3.50 mm × 3.50 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
A
Y
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 Handling Ratings.........................................................4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................5
6.6 Switching Characteristics............................................6
6.7 Noise Characteristics.................................................. 6
6.8 Operating Characteristics........................................... 6
6.9 Typical Characteristics................................................ 7
7 Parameter Measurement Information............................ 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes............................................9
9 Application and Implementation.................................. 10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
10 Power Supply Recommendations..............................11
11 Layout........................................................................... 12
11.1 Layout Guidelines................................................... 12
11.2 Layout Example...................................................... 12
12 Device and Documentation Support..........................13
12.1 Documentation Support.......................................... 13
12.2 Receiving Notification of Documentation Updates..13
12.3 Support Resources................................................. 13
12.4 Trademarks............................................................. 13
12.5 Electrostatic Discharge Caution..............................13
12.6 Glossary..................................................................13
13 Mechanical, Packaging, and Orderable
Information.................................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision Q (June 2014) to Revision R (September 2022)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Changed Cpd specification from 112 pF to 12 pF due to typo............................................................................6
• Updated the Detailed Design Procedure section..............................................................................................10
Changes from Revision P (July 2003) to Revision Q (June 2014)
Page
• Updated document to new TI data sheet standards........................................................................................... 1
• Deleted Ordering Information table.....................................................................................................................1
• Added Military Disclaimer to Features list...........................................................................................................1
• Added Handling Ratings table............................................................................................................................ 4
• Changed SN74AHCT14 MAX ambient temperature in Recommended Operating Conditions table. ................4
• Added Thermal Information table....................................................................................................................... 5
• Added Typical Characteristics............................................................................................................................ 7
• Added Detailed Description section....................................................................................................................9
• Added Application and Implementation section................................................................................................10
• Added Power Supply Recommendations section............................................................................................. 11
2
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
2
13
3
12
4
11
5
10
6
9
7
8
VCC
6A
6Y
5A
5Y
4A
4Y
1Y
2A
2Y
3A
3Y
1
14
2
13 6A
3
12 6Y
5A
4
11
5
10 5Y
9 4A
6
7
8
Figure 5-2. SN74AHCT14 RGY Package, 14-Pin
VQFN (Top View)
1Y
1A
NC
VCC
6A
Figure 5-1. SN54AHCT14 J or W Package,
14-Pin CDIP or CFP
SN74AHCT14 D, DB, DGV, N, NS, or PW Package,
14-Pin SOIC, SSOP, TVSOP, PDIP, SOP, or TSSOP
(Top View)
VCC
14
4Y
1
GND
1A
1Y
2A
2Y
3A
3Y
GND
1A
5 Pin Configuration and Functions
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
2A
NC
2Y
NC
3A
NC − No internal connection
Figure 5-3. SN54AHCT14 FK Package, 20-Pin LCCC (Top View)
Table 5-1. Pin Functions
PIN
NAME
NO.
TYPE(1)
DESCRIPTION
1A
1
I
1A1
1Y
2
O
1Y1
2A
3
I
2A1
2Y
4
O
2Y1
3A
5
I
3A1
3Y
6
O
3Y1
GND
7
—
Ground pin
4Y
8
O
4Y1
4A
9
I
4A1
5Y
10
O
5Y1
5A
11
I
5A1
6Y
12
O
6Y1
6A
13
I
6A1
VCC
14
—
(1)
Power pin
I = input, O = output
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
3
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
VCC
MIN
MAX
Supply voltage range
–0.5
7
UNIT
V
range(2)
–0.5
7
V
–0.5
VCC + 0.5
V
VI
Input voltage
VO
Output voltage range(2)
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±20
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
±50
mA
Continuous current through VCC or GND
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 Handling Ratings
Tstg
Storage temperature range
V(ESD)
(1)
(2)
Electrostatic discharge
MIN
MAX
UNIT
°C
–65
150
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins(1)
0
2000
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins(2)
0
1000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
SN54AHCT14
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
4.5
5.5
V
VI
Input voltage
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
IOH
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
(1)
4
SN74AHCT14
MIN
–8
8
–55
125
–40
V
–8
mA
8
mA
125
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI Application Report,
Implications of Slow or Floating CMOS Inputs, (SCBA004).
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
6.4 Thermal Information
SN74AHCT595
THERMAL METRIC(1)
D
DGV
DB
N
NS
PW
RGY
UNIT
14 PINS
RθJA
Junction-to-ambient thermal
resistance
101.2
138.7
113.1
61.1
98.6
129.9
63.7
RθJC(top)
Junction-to-case (top) thermal
resistance
62.3
60.6
65.6
48.0
54.1
58.3
77.6
RθJB
Junction-to-board thermal
resistance
55.5
71.8
60.4
41.0
57.4
71.8
39.7
ψJT
Junction-to-top characterization
parameter
25.5
10.6
25.5
32.4
19.6
10.2
5.7
ψJB
Junction-to-board characterization
parameter
55.2
71.1
59.9
40.9
57.0
71.2
39.9
RθJC(bot)
Junction-to-case (bottom) thermal
resistance
n/a
n/a
n/a
n/a
n/a
n/a
19.9
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, (SPRA953).
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going
input threshold
voltage
VT–
Negative-going
input threshold
voltage
ΔVT
Hysteresis
( VT+ – VT– )
VOH
VOL
IOL = 50 µA
MIN
TYP
SN54AHCT14
SN74AHCT14
MAX
MIN
MAX
MIN
MAX
0.9
1.9
0.9
1.9
0.9
1.9
5.5 V
1
2.1
1
2.1
1
2.1
4.5 V
0.5
1.5
0.5
1.5
0.5
1.5
5.5 V
0.6
1.7
0.6
1.7
0.6
1.7
4.5 V
0.4
1.4
0.4
1.4
0.4
1.4
5.5 V
0.4
1.5
0.4
1.5
0.4
1.5
4.4
4.5
3.94
4.4
4.4
3.8
3.8
UNIT
V
V
V
V
0.1
0.1
0.1
0.36
0.44
0.44
0 V to
5.5 V
±0.1
±1(1)
±1
µA
IO = 0
5.5 V
2
20
20
µA
One input at 3.4 V,
Other inputs at VCC or GND
5.5 V
1.35
1.5
1.5
mA
10
pF
4.5 V
IOL = 8 mA
VI = 5.5 V or GND
ICC
VI = VCC or GND
Ci
TA = 25°C
4.5 V
4.5 V
IOH = –8 mA
II
ΔICC (2)
(1)
(2)
IOH = –50 µA
VCC
VI = VCC or GND
5V
2
10
V
On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
5
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
Y
CL = 15 pF
A
Y
CL = 50 pF
tPLH
tPHL
tPLH
tPHL
(1)
TA = 25°C
MIN
SN54AHCT14
SN74AHCT14
TYP
MAX
MIN
MAX
MIN
MAX
4(1)
7(1)
1(1)
8(1)
1
8
4(1)
7(1)
1(1)
8(1)
1
8
5.5
8
1
9
1
9
5.5
8
1
9
1
9
UNIT
ns
ns
On products compliant to MIL-PRF-38535, this parameter is not production tested.
6.7 Noise Characteristics
VCC = 5 V, CL = 50 pF, TA = 25°C(1)
SN74AHCT14
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
0.9
V
VOL(V)
Quiet output, minimum dynamic VOL
–0.7
V
VOH(V)
Quiet output, minimum dynamic VOH
4.3
V
VIH(D)
High-level dynamic input voltage
VIL(D)
Low-level dynamic input voltage
(1)
2.1
V
0.5
V
TYP
UNIT
Characteristics are for surface-mount packages only.
6.8 Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
6
Power dissipation capacitance
TEST CONDITIONS
No load,
Submit Document Feedback
f = 1 MHz
12
pF
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
6.9 Typical Characteristics
One common misconception is that the current consumption will be less when switching a slow signal into
a Schmitt trigger. This is partly true because the Schmitt trigger prevents oscillation which can draw a lot of
current; however, you will see higher ICC current due to the amount of time the input is not at the rail. This is
Delta ICC. Delta ICC is where the inputs are not at the rails and upper or lower drive transistors are partially on.
Figure 6-1 shows ICC across the input voltage sweep.
Figure 6-1. Supply Current vs Input Voltage
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
7
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
7 Parameter Measurement Information
VCC
RL = 1 kΩ
From Output
Under Test
Test
Point
From Output
Under Test
S1
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
VOH
In-Phase
Output
50% VCC
tPHL
Out-of-Phase
Output
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
1.5 V
0V
tPZL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
3V
Output
Control
VOL + 0.3 V
VOL
tPHZ
Output
Waveform 2
S1 at GND
(see Note B)
50% VCC
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 7-1. Load Circuit and Voltage Waveforms
8
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
8 Detailed Description
8.1 Overview
The SNx4AHCT14 devices contain six independent inverters. These devices perform the Boolean function Y
= A. Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have
different input threshold levels for positive-going (VT+) and for negative-going (VT−) signals.
8.2 Functional Block Diagram
A
Y
8.3 Feature Description
•
•
Inputs are TTL-Voltage compatible
Inputs accept very slow or noisy inputs
8.4 Device Functional Modes
Table 8-1. Function Table
(Each Inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
9
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
Schmitt triggers should be used anytime you need to translate a sign wave into a square wave, or used where a
slow or noisy input needs to be sped up or cleaned up as in the switch de-bouncer circuit.
9.2 Typical Application
5V
10 kΩ
1/6 W
SN74AHCT14
10 nf
Circuit Symbol for a
Schmitt Trigger
Figure 9-1. Switch De-Bouncer Using Schmitt Trigger Inverter
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. The high drive will also create
fast edges into light loads; therefore, routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended input conditions:
• Specified High and low levels: See (VIH and VIL) in the Recommended Operating Conditions table.
• Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC
2. Recommended output conditions:
• Load currents should not exceed 25 mA per output and 50 mA total for the part
• Outputs should not be pulled above VCC
10
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
9.2.3 Application Curves
Figure 9-2. Typical Application Curves
10 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions table.
Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, 0.1 μf is recommended. If there are multiple VCC pins, 0.01 μf or 0.022 μf is recommended for each
power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μf and 1
μf are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible
for best results.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
11
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs should not ever float.
In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two
inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not
be left unconnected because the undefined voltages at the outside connections result in undefined operational
states. Figure 11-1 shows the rules that must be observed under all circumstances. All unused inputs of digital
logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should
be applied to any particular unused input depends on the function of the device. Generally they will be tied to
GND or VCC; whichever makes more sense or is more convenient. It is generally acceptable to float outputs
unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the outputs section of
the part when asserted. This will not disable the input section of the IO’s so they cannot float when disabled.
11.2 Layout Example
Vcc
Unused Input
Input
Output
Unused Input
Output
Input
Figure 11-1. Layout Diagram
12
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
SN54AHCT14, SN74AHCT14
www.ti.com
SCLS246R – OCTOBER 1995 – REVISED SEPTEMBER 2022
12 Device and Documentation Support
12.1 Documentation Support
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54AHCT14 SN74AHCT14
13
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-9680101Q2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629680101Q2A
SNJ54AHCT
14FK
5962-9680101QCA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101QC
A
SNJ54AHCT14J
5962-9680101QDA
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101QD
A
SNJ54AHCT14W
5962-9680101VCA
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101VC
A
SNV54AHCT14J
5962-9680101VDA
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101VD
A
SNV54AHCT14W
SN74AHCT14D
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AHCT14
Samples
SN74AHCT14DBR
ACTIVE
SSOP
DB
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HB14
Samples
SN74AHCT14DG4
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AHCT14
Samples
SN74AHCT14DGVR
ACTIVE
TVSOP
DGV
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HB14
Samples
SN74AHCT14DGVRE4
ACTIVE
TVSOP
DGV
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HB14
Samples
SN74AHCT14DR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AHCT14
Samples
SN74AHCT14DRG4
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AHCT14
Samples
SN74AHCT14N
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 125
SN74AHCT14N
Samples
SN74AHCT14NSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AHCT14
Samples
SN74AHCT14PW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HB14
Samples
SN74AHCT14PWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HB14
Samples
Addendum-Page 1
Samples
Samples
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
14-Oct-2022
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74AHCT14PWRE4
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HB14
Samples
SN74AHCT14RGYR
ACTIVE
VQFN
RGY
14
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
HB14
Samples
SNJ54AHCT14FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629680101Q2A
SNJ54AHCT
14FK
SNJ54AHCT14J
ACTIVE
CDIP
J
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101QC
A
SNJ54AHCT14J
SNJ54AHCT14W
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9680101QD
A
SNJ54AHCT14W
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
