SN74HC273DWRE4

SN54HC273, SN74HC273 SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 SNx4HC273 Octal D-Type Flip-Flops With Clear 1 Features 3 Description • • • • • • • • • • The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input. Wide operating voltage range of 2 V to 6 V Outputs can drive up to 10 LSTTL loads Low power consumption, 80-µA maximum ICC Typical tpd = 12 ns ±4-mA output drive at 5 V Low input current of 1-µA maximum Contain eight flip-flops with single-rail outputs Direct clear input Individual data input to each flip-flop On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. 2 Applications • • • Buffer or storage registers Shift registers Pattern generators Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. Device Information(1) PART NUMBER BODY SIZE (NOM) CDIP (20) 24.20 mm × 6.92 mm SN54HC273W CFP (20) 13.09 mm × 6.92 mm SN54HC273FK LCCC (20) 8.89 mm × 8.89 mm SN74HC273D SOIC (20) 12.80 mm × 7.50 mm SN74HC273DB SSOP (20) 7.20 mm × 5.30 mm SN74HC273NS SO (20) 12.60 mm × 5.30 mm SN74HC273N PDIP (20) 24.33 mm × 6.35 mm SN74HC273PW TSSOP (20) 6.50 mm × 4.40 mm (1) D PACKAGE (PINS) SN54HC273J For all available packages, see the orderable addendum at the end of the data sheet. C C TG TG Q C C C C TG CLK(I) TG C C C C R Copyright © 2016, Texas Instruments Incorporated Functional Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings – SN74HC273....................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics.............................................5 6.6 Electrical Characteristics – SN54HC273.................... 5 6.7 Electrical Characteristics – SN74HC273.................... 6 6.8 Timing Requirements.................................................. 6 6.9 Timing Requirements – SN54HC273..........................7 6.10 Timing Requirements – SN74HC273........................7 6.11 Switching Characteristics.......................................... 8 6.12 Switching Characteristics – SN54HC273..................8 6.13 Switching Characteristics – SN74HC273..................8 6.14 Operating Characteristics......................................... 9 6.15 Typical Characteristics.............................................. 9 7 Parameter Measurement Information.......................... 10 8 Detailed Description...................................................... 11 8.1 Overview................................................................... 11 8.2 Functional Block Diagram......................................... 11 8.3 Feature Description...................................................11 8.4 Device Functional Modes..........................................11 9 Application and Implementation.................................. 12 9.1 Application Information............................................. 12 9.2 Typical Application.................................................... 12 10 Power Supply Recommendations..............................14 11 Layout........................................................................... 14 11.1 Layout Guidelines................................................... 14 11.2 Layout Example...................................................... 14 12 Device and Documentation Support..........................15 12.1 Documentation Support.......................................... 15 12.2 Related Links.......................................................... 15 12.3 Receiving Notification of Documentation Updates..15 12.4 Support Resources................................................. 15 12.5 Trademarks............................................................. 15 12.6 Electrostatic Discharge Caution..............................15 12.7 Glossary..................................................................15 13 Mechanical, Packaging, and Orderable Information.................................................................... 15 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (August 2003) to Revision F (April 2022) Page • Updated the ESD ratings table to fit modern standards..................................................................................... 4 • Changed package thermal impedance, RθJA, values from: 90.3 to: 122.7 (DB), from: 77.4 to: 109.1 (DW), from: 45.1 to: 84.6 (N), from: 72.6 to: 113.4 (NS), and from: 98.3 to: 131.8 (PW).............................................. 5 • Updated Power Supply Recommendations and Layout Guidelines sections to include current TI terminology... 14 Changes from Revision D (December 1982) to Revision E (July 2016) Page • Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section............ 1 • Removed Ordering Information table, see POA at the end of the data sheet.................................................... 1 • Added Military Disclaimer to Features ............................................................................................................... 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 5 Pin Configuration and Functions J, W, DB, DW N, NS, or PW Package, 20-Pin CDIP, CFP, SSOP, SOIC, SO, PDIP, or TSSOP (Top View) FK Package, 20-Pin LCCC (Top View) Table 5-1. Pin Functions PIN NO. NAME TYPE(1) DESCRIPTION 1 CLR I Active low clear input 2 1Q O Output 1 3 1D I Input 1 4 2D I Input 2 5 2Q O Output 2 6 3Q O Output 3 7 3D I Input 3 8 4D I Input 4 9 4Q O Output 4 10 GND — Ground 11 CLK I Clock input 12 5Q O Output 5 13 5D I Input 5 14 6D I Input 6 15 6Q O Output 6 16 7Q O Output 7 17 7D I Input 7 18 8D I Input 8 19 8Q O Output 8 20 VCC — Power (1) Signal Types: I = Input, O = Output, I/O = Input or Output. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 3 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage current(2) MIN MAX UNIT –0.5 7 V IIK Input clamp VI < 0 or VI > VCC ±20 mA IOK Output clamp current(2) VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA ±50 mA 150 °C 150 °C Continuous current through VCC or GND TJ Junction temperature Tstg Storage temperature (1) (2) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings – SN74HC273 VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage VCC = 2 V VIH High-level input voltage VCC = 4.5 V VCC = 6 V MIN NOM MAX 2 5 6 Low-level input voltage 3.15 V 4.2 0.5 VCC = 4.5 V 1.35 VCC = 6 V V 1.8 VI Input voltage 0 VCC V VO Output voltage 0 VCC V ∆t/∆v Input transition rise and fall time VCC = 2 V 1000 VCC = 4.5 V 500 VCC = 6 V TA (1) 4 V 1.5 VCC = 2 V VIL UNIT Operating free-air temperature ns 400 SN54HC273 –55 125 SN74HC273 –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6.4 Thermal Information SN74HC273 THERMAL METRIC DW (SOIC) DB (SSOP) N (PDIP) NS (SO) PW (TSSOP) 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS UNIT 109.1 122.7 84.6 113.4 131.8 °C/W 76 81.6 72.5 78.6 72.2 °C/W RθJA Junction-to-ambient thermal (1) resistance RθJC (top) Junction-to-case (top) thermal resistance RθJB Junction-to-board thermal resistance 77.6 77.5 65.3 78.4 82.8 °C/W ΨJT Junction-to-top characterization parameter 51.5 46.1 55.3 47.1 21.5 °C/W ΨJB Junction-to-board characterization parameter 77.1 77.1 65.2 78.1 82.4 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics. 6.5 Electrical Characteristics TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL MIN TYP VCC = 2 V 1.9 1.998 VCC = 4.5 V 4.4 4.499 VCC = 6 V 5.9 5.999 3.98 4.3 IOH = –4 mA, VCC = 4.5 V IOH = –5.2 mA, VCC = 6 V UNIT V 5.8 VCC = 2 V 0.002 0.1 VCC = 4.5 V 0.001 0.1 VCC = 6 V 0.001 0.1 IOL = 4 mA, VCC = 4.5 V 0.17 0.26 IOL = 5.2 mA, VCC = 6 V 0.15 0.26 ±0.1 ±100 nA 8 µA 3 10 pF TYP MAX IOL = 20 µA VOL 5.48 MAX VI = VIH or VIL II VI = VCC or 0, VCC = 6 V ICC VI = VCC or 0, IO = 0, VCC = 6 V Ci VCC = 2 V to 6 V V 6.6 Electrical Characteristics – SN54HC273 over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL MIN VCC = 2 V 1.9 VCC = 4.5 V 4.4 VCC = 6 V 5.9 IOH = –4 mA, VCC = 4.5 V VOL VI = VIH or VIL 5.2 VCC = 2 V 0.1 VCC = 4.5 V 0.1 VCC = 6 V 0.1 IOL = 4 mA, VCC = 4.5 V IOL = 5.2 mA, VCC = V II VI = VCC or 0, VCC = 6 V ICC VI = VCC or 0, IO = 0, VCC = 6 V V 3.7 IOH = –5.2 mA, VCC = 6 V IOL = 20 µA UNIT V 0.4 0.4 ±1000 nA 160 µA Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 5 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6.6 Electrical Characteristics – SN54HC273 (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Ci TEST CONDITIONS MIN TYP VCC = 2 V to 6 V MAX UNIT 10 pF MAX UNIT 6.7 Electrical Characteristics – SN74HC273 over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN IOH = –20 µA VOH VI = VIH or VIL 1.9 VCC = 4.5 V 4.4 VCC = 6 V 3.84 IOH = –5.2 mA, VCC = 6 V 5.34 VI = VIH or VIL TYP 5.9 IOH = –4 mA, VCC = 4.5 V IOL = 20 µA VOL VCC = 2 V V VCC = 2 V 0.1 VCC = 4.5 V 0.1 VCC = 6 V 0.1 IOL = 4 mA, VCC = 4.5 V 0.33 IOL = 5.2 mA, VCC = 6 V 0.33 V II VI = VCC or 0, VCC = 6 V ±1000 nA ICC VI = VCC or 0, IO = 0, VCC = 6 V 80 µA Ci VCC = 2 V to 6 V 10 pF 6.8 Timing Requirements TA = 25°C (unless otherwise noted) MIN VCC = 2 V fclock Clock frequency CLR low tw Pulse duration CLK high or low Data tsu Setup time before CLK↑ CLR inactive th 6 Hold time, data after CLK↑ MAX VCC = 4.5 V 27 VCC = 6 V 32 VCC = 2 V 80 VCC = 4.5 V 16 VCC = 6 V 14 VCC = 2 V 80 VCC = 4.5 V 16 VCC = 6 V 14 VCC = 2 V 100 VCC = 4.5 V MHz ns 20 VCC = 6 V 17 VCC = 2 V 100 VCC = 4.5 V 20 VCC = 6 V 17 VCC = 2 V 0 VCC = 4.5 V 0 VCC = 6 V 0 Submit Document Feedback UNIT 5 ns ns Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6.9 Timing Requirements – SN54HC273 over recommended operating free-air temperature range (unless otherwise noted) MIN VCC = 2 V fclock Clock frequency 18 VCC = 6 V CLR low tw Pulse duration CLK high or low Data tsu Setup time before CLK↑ CLR inactive th Hold time, data after CLK↑ 21 24 VCC = 6 V 20 VCC = 2 V 120 ns 24 VCC = 6 V 20 VCC = 2 V 150 VCC = 4.5 V MHz 120 VCC = 4.5 V VCC = 4.5 V UNIT 4 VCC = 4.5 V VCC = 2 V MAX 30 VCC = 6 V 25 VCC = 2 V 150 VCC = 4.5 V 30 VCC = 6 V 25 VCC = 2 V 0 VCC = 4.5 V 0 VCC = 6 V 0 ns ns 6.10 Timing Requirements – SN74HC273 over recommended operating free-air temperature range (unless otherwise noted) MIN VCC = 2 V fclock Clock frequency 21 VCC = 6 V 25 tw Pulse duration CLK high or low Data tsu Setup time before CLK↑ CLR inactive th Hold time, data after CLK↑ VCC = 4.5 V MHz 100 20 VCC = 6 V 17 VCC = 2 V 100 VCC = 4.5 V 20 VCC = 6 V 17 VCC = 2 V 125 VCC = 4.5 V UNIT 4 VCC = 4.5 V VCC = 2 V CLR low MAX ns 25 VCC = 6 V 21 VCC = 2 V 125 VCC = 4.5 V 25 VCC = 6 V 21 VCC = 2 V 0 VCC = 4.5 V 0 VCC = 6 V 0 ns ns Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 7 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6.11 Switching Characteristics TA = 25°C and CL = 50 pF (unless otherwise noted; see Figure 7-1) PARAMETER TEST CONDITIONS MIN VCC = 2 V fmax tPHL From CLR (input) to any (output) tpd From CLK (input) to any (output) tt To any (output) TYP 5 11 VCC = 4.5 V 27 50 VCC = 6 V 32 60 MAX UNIT MHz VCC = 2 V 55 160 VCC = 4.5 V 15 32 VCC = 6 V 12 27 VCC = 2 V 56 160 VCC = 4.5 V 15 32 VCC = 6 V 13 27 VCC = 2 V 38 75 VCC = 4.5 V 8 15 VCC = 6 V 6 13 ns ns ns 6.12 Switching Characteristics – SN54HC273 over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted; see Figure 7-1) PARAMETER TEST CONDITIONS MIN VCC = 2 V fmax MAX VCC = 4.5 V 18 VCC = 6 V 21 MHz VCC = 2 V tPHL From CLR (input) to any (output) tpd From CLK (input) to any (output) tt To any (output) UNIT 4 240 VCC = 4.5 V 48 VCC = 6 V 41 VCC = 2 V 240 VCC = 4.5 V 48 VCC = 6 V 41 VCC = 2 V 110 VCC = 4.5 V 22 VCC = 6 V 19 ns ns ns 6.13 Switching Characteristics – SN74HC273 over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted; see Figure 7-1) PARAMETER TEST CONDITIONS MIN VCC = 2 V fmax VCC = 4.5 V 21 VCC = 6 V 25 VCC = 2 V tPHL tpd 8 From CLR (input) to any (output) From CLK (input) to any (output) VCC = 4.5 V MAX MHz 200 40 VCC = 6 V 34 VCC = 2 V 200 VCC = 4.5 V 40 VCC = 6 V 34 Submit Document Feedback UNIT 4 ns ns Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 6.13 Switching Characteristics – SN74HC273 (continued) over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted; see Figure 7-1) PARAMETER tt TEST CONDITIONS To any (output) MIN MAX VCC = 2 V 95 VCC = 4.5 V 19 VCC = 6 V 16 UNIT ns 6.14 Operating Characteristics TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per flip-flop TYP No load 35 UNIT pF 6.15 Typical Characteristics 200 160 120 tpd(max)(ns) Ta =25o C CL = 50pF CLK to Q/Q 80 30 20 0 2 4 5 6 Vcc Figure 6-1. Max tpd vs VCC Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 9 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 7 Parameter Measurement Information From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 50% 10% Out-of-Phase Output 90% VOH 50% 10% VOL tf tPLH 50% 10% tf tf VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES 90% tr th 90% tPHL 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. Figure 7-1. Load Circuit and Voltage Waveforms 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 8 Detailed Description 8.1 Overview The SNx4HC273 contains eight flip-flops with single-rail outputs with individual data input to each flip-flop. The outputs can drive up to 10 LSTTL loads. The device has direct active low clear input. 8.2 Functional Block Diagram 2D 1D 3 3D 4 4D 7 5D 8 6D 13 7D 14 8D 17 18 11 CLK 1D 1D C1 R CLR 1D C1 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1D C1 R C1 R R 1 2 1Q 5 6 2Q 9 3Q 12 4Q 15 5Q 6Q 16 7Q 19 8Q Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description The SNx4HC273 has low power consumption with a maximumCC of 80 µA. The typical tpd for the SNx4HC273 is 12 ns and the output drive is ±4 mA at 5 V. The SNx4HC273 also has very low input current, with the maximum set at 1 µA. 8.4 Device Functional Modes Table 8-1 lists the functional modes of the SNx4HC273. Table 8-1. Function Table (Each Flip-Flop) INPUTS CLR CLK D OUTPUT Q L X X L H ↑ H H H ↑ L L H L X Q0 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 11 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information The SNx4HC273 is octal D Flip flop with active low clear input. It has low input current and low power consumption. The D flip-flop can be used as a Toggle flip flop using an XOR gate at the input. The output toggles from the previous state whenever the T input is high. 9.2 Typical Application T Q D CLR CLK Copyright © 2016, Texas Instruments Incorporated 9.2.1 Design Requirements This SNx4Hc273 device uses CMOS technology and has balanced output drive. 9.2.2 Detailed Design Procedure 1. Recommended input conditions: • Rise time and fall time specifications: see (Δt/ΔV) in Recommended Operating Conditions. • Specified high and low levels: see (VIH and VIL) in Recommended Operating Conditions. • Inputs are not overvoltage tolerant and must not be above any valid VCC as per Recommended Operating Conditions. 2. Absolute maximum output conditions: • Continuos output currents must not exceed (IO max) per output and must not exceed total current (continuous current through VCC or GND) for the part. These limits are located in the Absolute Maximum Ratings. • Outputs must not be pulled above VCC. 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 9.2.3 Application Curve 80 70 60 tt(max)(ns) Ta =25o C CL = 50pF Q/Q 50 20 10 0 2 4 5 6 Vcc Figure 9-1. Maximum Transition Time vs VCC Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 13 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. 11 Layout 11.1 Layout Guidelines When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic function or is more convenient. 11.2 Layout Example VCC Unused Input Input Output Unused Input Output Input Figure 11-1. SNx4HC273 Layout 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 SN54HC273, SN74HC273 www.ti.com SCLS136F – DECEMBER 1982 – REVISED APRIL 2022 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation, see the following: • Texas Instruments, Implications of Slow or Floating CMOS Inputs application report 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 12-1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54HC273 Click here Click here Click here Click here Click here SN74HC273 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.5 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC273 SN74HC273 15 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-8409901VRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8409901VR A SNV54HC273J 5962-8409901VSA ACTIVE CFP W 20 25 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8409901VS A SNV54HC273W 84099012A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 84099012A SNJ54HC 273FK 8409901RA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8409901RA SNJ54HC273J Samples 8409901SA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8409901SA SNJ54HC273W Samples JM38510/65601BRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65601BRA Samples JM38510/65601BSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65601BSA Samples M38510/65601BRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65601BRA Samples M38510/65601BSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65601BSA Samples SN54HC273J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54HC273J Samples SN74HC273DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273DWRE4 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273DWRG4 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC273N Samples Addendum-Page 1 Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 10-Jun-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74HC273NE4 ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC273N Samples SN74HC273NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273PWRG4 ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SN74HC273PWT ACTIVE TSSOP PW 20 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC273 Samples SNJ54HC273FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 84099012A SNJ54HC 273FK SNJ54HC273J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8409901RA SNJ54HC273J Samples SNJ54HC273W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8409901SA SNJ54HC273W Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of