SN74LVC1G29DCUR

SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 SN74LVC1G29 2-of-3 Decoder/Demultiplexer Check for Samples: SN74LVC1G29 FEATURES DESCRIPTION • This decoder is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Supports Down Translation to VCC Max tpd of 5.1 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Drive Protection Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) The SN74LVC1G29 device is a 2-of-3 decoder/demultiplexer. When the enable (G) input signal is low, only one of the outputs is in the low state, depending on the input levels of A0 and A1. When G is high, Y0, Y1, and Y2 are high, regardless of the input states. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disable the outputs, preventing damaging current backflow through the device when it is powered down. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. YZP PACKAGE (BOTTOM VIEW) GND A0 Y1 G 4 5 3 6 2 7 1 8 DCU PACKAGE (TOP VIEW) Y2 A1 Y0 VCC G Y1 A0 GND DCT PACKAGE (TOP VIEW) G 1 8 VCC Y1 2 7 Y0 A0 3 6 A1 GND 4 5 Y2 1 8 VCC 2 7 3 6 4 5 Y0 A1 Y2 See mechanical drawings for dimensions. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2014, Texas Instruments Incorporated SN74LVC1G29 SCES569C – JUNE 2004 – REVISED JANUARY 2014 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Function Table INPUTS OUTPUTS G A1 A0 Y0 Y1 Y2 L L X L H H L H L H L H L H H H H L H X X H H H Logic Diagram (Positive Logic) G 1 7 Y0 A1 6 2 Y1 A0 3 5 Y2 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V (2) VI Input voltage range –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Tstg (1) (2) (3) (4) 2 Package thermal impedance (4) DCT package 220 DCU package 227 YZP package 102 Storage temperature range –65 150 °C/W °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the Recommended Operating Conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage MIN MAX 1.65 5.5 Low-level input voltage V 1.5 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 VCC = 3.0 V to 3.6 V 2 VCC = 4.5 V to 5.5 V 0.7 × VCC VCC = 1.65 V to 1.95 V VIL UNIT V 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 3.0 V to 3.6 V 0.8 VCC = 4.5 V to 5.5 V 0.3 × VCC V VI Input voltage 0 5.5 V VO Output voltage 0 VCC V IOH High-level output current VCC = 1.65 V –4 VCC = 2.3 V –8 –16 VCC = 3 V VCC = 4.5 V –32 VCC = 1.65 V 4 VCC = 2.3 V IOL Low-level output current Δt/Δv Input transition rise or fall rate 8 16 VCC = 3 V 32 VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 (1) Operating free-air temperature mA 24 VCC = 4.5 V VCC = 5 V ± 0.5 V TA mA –24 ns/V 5 –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 3 SN74LVC1G29 SCES569C – JUNE 2004 – REVISED JANUARY 2014 www.ti.com Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = –100 µA VOH 1.65 V to 5.5 V 1.65 V 1.2 IOH = –8 mA 2.3 V 1.9 VOL 4.5 V IOL = 100 µA 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL= 32 mA Ioff VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 One input at VCC – 0.6 V, Other inputs at VCC or GND CI (1) 0.4 V 0.55 4.5 V VI = 5.5 V or GND ΔICC 3.8 3V IOL= 24 mA II 2.3 IOH = –32 mA IOL = 16 mA UNIT V 2.4 3V IOH = –24 mA MAX VCC – 0.1 IOH = –4 mA IOH = –16 mA TYP (1) MIN 0.55 0 to 5.5 V ±1 µA 0 ±10 µA 1.65 V to 5.5 V 10 µA 3 V to 5.5 V 500 µA VI = VCC or GND 3.3 V 3.5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Switching Characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A or G Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V MIN MAX MIN 2.5 15.4 MAX 1.5 7.1 VCC = 3.3 V ± 0.3 V MIN MAX 1 5.1 VCC = 5 V ± 0.5 V MIN MAX 0.5 4.2 UNIT ns Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A or G Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V MIN MAX 2.5 15.8 MIN MAX 1.5 7.5 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX 1 6.1 0.5 5.1 UNIT ns Operating Characteristics TA = 25°C TEST CONDITIONS PARAMETER Cpd 4 Power dissipation capacitance G to Y1 A1 to Yn f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 17 17 18 19 33 33 33 35 Submit Documentation Feedback UNIT pF Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 Parameter Measurement Information VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MW 1 MW 1 MW 1 MW 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + VD VOL tPHZ VM VOH – VD VOH »0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 5 SN74LVC1G29 SCES569C – JUNE 2004 – REVISED JANUARY 2014 www.ti.com Parameter Measurement Information (continued) VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kW 500 W 500 W 500 W 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL tPLZ VLOAD/2 VM tPZH VM VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH VOH Output VM tPZL tPHL VM VI Output Control VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + VD VOL tPHZ VM VOH – VD VOH »0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 6 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 REVISION HISTORY Changes from Revision B (January 2007) to Revision C Page • Updated document to new TI data sheet format. ................................................................................................................. 1 • Deleted Ordering Information table. ...................................................................................................................................... 1 • Updated Features. ................................................................................................................................................................ 1 • Added ESD warning. ............................................................................................................................................................ 2 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links :SN74LVC1G29 7 PACKAGE OPTION ADDENDUM www.ti.com 29-Jan-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LVC1G29DCTR ACTIVE SM8 DCT 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 C29 (R, Z) SN74LVC1G29DCUR ACTIVE VSSOP DCU 8 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (C29J, C29Q, C29R) SN74LVC1G29DCUT ACTIVE VSSOP DCU 8 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (C29J, C29Q, C29R) SN74LVC1G29YZPR ACTIVE DSBGA YZP 8 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 D9N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of