SCBS149D − JULY 1994 − REVISED MARCH 2004
D Members of the Texas Instruments
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SN54LVT16646 . . . WD PACKAGE
SN74LVT16646 . . . DGG OR DL PACKAGE
(TOP VIEW)
Widebus Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC )
Support Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
VCC.
3. The package thermal impedance is calculated in accordance with JESD 51−7.
recommended operating conditions (see Note 4)
SN54LVT16646
SN74LVT16646
MIN
MAX
MIN
MAX
2.7
3.6
2.7
3.6
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
5.5
5.5
V
IOH
IOL
High-level output current
−24
−32
mA
Low-level output current
48
64
mA
∆t /∆v
Input transition rise or fall rate
10
10
ns / V
High-level input voltage
2
2
0.8
Outputs enabled
V
V
0.8
V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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5
SCBS149D − JULY 1994 − REVISED MARCH 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54LVT16646
TYP†
MAX
TEST CONDITIONS
VCC = 2.7 V,
VCC = MIN to MAX‡,
II = −18 mA
IOH = −100 µA
VCC = 2.7 V,
IOH = − 8 mA
IOH = − 24 mA
VCC = 3 V
VCC = 2.7 V
VOL
VCC = 3 V
VCC = 3.6 V,
VCC = 0 or MAX‡,
II
MIN
−1.2
VCC −0.2
2.4
2
0.2
0.2
IOL = 24 mA
IOL = 16 mA
0.5
0.5
0.4
0.4
IOL = 32 mA
IOL = 48 mA
0.5
0.5
IOL = 64 mA
VI = VCC or GND
VI = 5.5 V
VI = 5.5 V
V
0.55
0.55
Control inputs
A or B ports§
Ioff
VCC = 0,
II(hold)
VCC = 3 V
IOZH
IOZL
VCC = 3.6 V,
VCC = 3.6 V,
VI or VO = 0 to 4.5 V
VI = 0.8 V
A or B ports
VI = 2 V
VO = 3 V
±1
±1
10
10
20
20
5
5
−10
75
75
−75
−75
Outputs high
Outputs low
Outputs disabled
∆ICC¶
VCC = 3 V to 3.6 V,
One input at VCC − 0.6 V,
Other inputs at VCC or GND
Ci
VI = 3 V or 0
VO = 3 V or 0
3.5
µA
−10
± 100
VO = 0.5 V
IO = 0,
V
V
IOH = − 32 mA
IOL = 100 µA
VI = VCC
VI = 0
VCC = 3.6 V,
VI = VCC or GND
−1.2
UNIT
VCC −0.2
2.4
2
VCC = 3.6 V
ICC
SN74LVT16646
TYP†
MAX
MIN
µA
A
µA
1
1
µA
−1
−1
µA
0.12
0.12
5
5
0.12
0.12
0.2
0.2
mA
mA
3.5
pF
Cio
12
12
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§ Unused pins at VCC or GND
¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
pF
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SCBS149D − JULY 1994 − REVISED MARCH 2004
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 2)
SN54LVT16646
VCC = 3.3 V
± 0.3 V
MIN
fclock
tw
Clock frequency
MAX
SN74LVT16646
VCC = 2.7 V
MIN
MAX
150
Pulse duration, CLK high or low
tsu
Setup time,
A or B before CLKAB↑ or CLKBA↑
th
Hold time,
A or B after CLKAB↑ or CLKBA↑
VCC = 3.3 V
± 0.3 V
MIN
150
MAX
VCC = 2.7 V
MIN
150
MAX
150
3.3
3.3
3.3
3.3
Data high
1.3
1.4
1.3
1.4
Data low
2.4
3
2.4
3
Data high
0.5
0
0.5
0
Data low
0.6
0.5
0.5
0.5
UNIT
MHz
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 2)
SN54LVT16646
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
± 0.3 V
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
MAX
SN74LVT16646
VCC = 2.7 V
MIN
MAX
150
CLKBA or
CLKAB
A or B
A or B
B or A
SBA or SAB‡
A or B
OE
A or B
OE
A or B
DIR
A or B
VCC = 3.3 V
± 0.3 V
MIN TYP†
MAX
VCC = 2.7 V
MIN
UNIT
MAX
150
MHz
1.8
6
6.9
1.8
3.8
5.7
6.7
2.1
5.9
6.6
2.1
3.9
5.7
6.5
1.3
4.9
5.6
1.3
3
4.7
5.4
1
4.8
5.8
1
3.1
4.7
5.6
1.4
6.4
7.4
1.4
4
6.2
7.2
1.4
6.4
7.4
1.4
4.3
6.2
7.2
1
5.7
7.4
1
3
5.4
6.4
1
6.5
7.5
1
3.1
5.6
6.5
2.3
6.7
7.1
2.3
4.6
6.5
6.9
2.2
6
6.5
2.2
4.5
5.8
5.9
1
5.9
7.7
1
3.3
5.7
6.7
1.2
5.9
7.3
1.2
3.5
5.8
6.7
1.7
7.3
8.5
1.7
4.7
7.2
DIR
A or B
tPLZ
1.5
7.8
7.4
1.5
4.9
6.6
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
8.3
7.2
ns
ns
ns
ns
ns
ns
ns
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SCBS149D − JULY 1994 − REVISED MARCH 2004
PARAMETER MEASUREMENT INFORMATION
6V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
500 Ω
2.7 V
LOAD CIRCUIT FOR OUTPUTS
1.5 V
Timing Input
0V
tw
tsu
2.7 V
Input
1.5 V
1.5 V
th
2.7 V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
Input
1.5 V
1.5 V
0V
VOH
1.5 V
Output
1.5 V
VOL
tPLH
tPHL
VOH
Output
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
1.5 V
0V
tPZL
tPHL
tPLH
2.7 V
Output
Control
tPLZ
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
1.5 V
tPZH
3V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
90 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
8
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74LVT16646DL
ACTIVE
SSOP
DL
56
20
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVT16646
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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