SNJ54AC374J

SN54AC374, SN74AC374 SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 SNx4AC374 Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 1 Features 2 Description • • • • • These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. Operation of 2-V to 6-V VCC Inputs accept voltages to 6 V Max tpd of 9.5 ns at 5 V 3-state noninverting outputs drive bus lines directly Full parallel access for loading Device Information PART NUMBER SNx4AC374 PACKAGE1 BODY SIZE2 DB (SSOP, 20) 7.20 mm × 5.30 mm DW (SOIC, 20) 12.80 mm × 7.50 mm N (PDIP, 20) 24.33 mm × 6.35 mm NS (SO, 20) 12.60 mm × 5.30 mm PW (TSSOP, 20) 6.50 mm × 4.40 mm 1. For all available packages, see the orderable addendum at the end of the data sheet. 2. The package size (length × width) is a nominal value and includes pins, where applicable. Logic Diagram (Positive Logic) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 Table of Contents 1 Features............................................................................1 2 Description.......................................................................1 3 Revision History.............................................................. 2 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4 5.1 Absolute Maximum Ratings........................................ 4 5.2 Recommended Operating Conditions.........................4 5.3 Thermal Information....................................................5 5.4 Electrical Characteristics.............................................5 5.5 Timing Requirements, VCC = 3.3 V ± 0.3 V ................5 5.6 Timing Requirements, VCC = 5 V ± 0.5 V....................6 5.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V...........6 5.8 Switching Characteristics, VCC = 5 V ± 0.5 V..............6 5.9 Operating Characteristics........................................... 6 6 Parameter Measurement Information............................ 7 7 Detailed Description........................................................8 7.1 Overview..................................................................... 8 7.2 Functional Block Diagram........................................... 8 7.3 Device Functional Modes............................................8 8 Device and Documentation Support..............................9 8.1 Documentation Support (Analog)................................9 8.2 Receiving Notification of Documentation Updates......9 8.3 Support Resources..................................................... 9 8.4 Trademarks................................................................. 9 8.5 Glossary......................................................................9 8.6 Electrostatic Discharge Caution..................................9 9 Mechanical, Packaging, and Orderable Information.. 10 3 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (October 2003) to Revision F (August 2023) Page • Added Device Information table, Pin Functions table, Thermal Information table, Device Functional Modes, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................................................................................................................................................... 1 2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 4 Pin Configuration and Functions Figure 4-1. SN54AC374 J or W Package; SN74AC374 DB, DW, N, NS, or PW Package (Top View) Figure 4-2. SN54AC374 FK Package (Top View) Table 4-1. Pin Functions PIN NAME TYPE NO. DESCRIPTION OE 1 I Enable pin 1Q 2 O Output 1 1D 3 I Input 1 2D 4 I Input 2 2Q 5 O Output 2 3Q 6 O Output 3 3D 7 I Input 3 4D 8 I Input 4 4Q 9 O Output 4 GND 10 – Ground pin CLK 11 I Clock pin 5Q 12 O Output 5 5D 13 I Input 5 6D 14 I Input 6 6Q 15 O Output 6 7Q 16 O Output 7 7D 17 I Input 7 8D 18 I Input 8 8Q 19 O Output 8 VCC 20 – Power pin Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 3 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)1 VCC VI 2 MIN MAX Supply voltage range −0.5 7 UNIT V Input voltage range −0.5 VCC + 0.5 V VO 2 Output voltage range −0.5 VCC + 0.5 V IIK Input clamp current (VI < 0 or VI > VCC) ±20 mA IOK Output clamp current (VO < 0 or VO > VCC) ±20 mA IO Continuous output current (VO = 0 to VCC) Continuous current through VCC or GND Tstg (1) (2) Storage temperature range −65 ±50 mA ±200 mA 150 °C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 5.2 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)1 SN54AC374 VCC Supply voltage VCC = 3 V VIH High-level input voltage VIL Low-level input voltage VI Input voltage VO Output voltage MAX 2 6 IOL Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (1) 4 High-level output current MIN MAX 2 6 2.1 2.1 VCC = 4.5 V 3.15 3.15 VCC = 5.5 V 3.85 3.85 0.9 0.9 VCC = 4.5V 1.35 1.35 1.65 UNIT V V VCC = 3 V VCC = 5.5 V IOH SN74AC374 MIN V 1.65 0 VCC 0 VCC V 0 VCC 0 VCC V VCC = 3 V −12 −12 VCC = 4.5 V −24 −24 VCC = 5.5 V −24 −24 VCC = 3 V 12 12 VCC = 4.5 V 24 24 VCC = 5.5 V 24 24 8 8 ns/V 85 °C −55 125 −40 mA mA All unused inputs of the device must be held at VCC or GND for proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 5.3 Thermal Information SN74AC374 THERMAL METRIC(1) RθJA (1) DB (SSOP) DW (SOIC) N (PDIP) NS (SO) PW (TSSOP) 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS 70 58 Junction-to-ambient thermal resistance 69 60 UNIT 83 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 5.4 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50μA VOH IOL = 50μA VOL TYP SN54AC374 MAX MIN SN74AC374 MAX MIN 3V 2.9 2.9 2.9 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 3V 2.56 2.4 2.46 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 MAX UNIT V 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 IOL = 12 mA IOL = 24 mA MIN 4.5 V IOH = −12 mA IOH = −24 mA TA = 25°C VCC V II VI = VCC or GND 5.5 V ±0.1 ±1 ±1 μA IOZ VO = VCC or GND 5.5 V ±0.25 ±5 ±2.5 μA ICC VI = VCC or GND, IO = 0 5.5 V 4 80 40 μA Ci VI = VCC or GND 5V 4.5 pF 5.5 Timing Requirements, VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Load Circuit and Voltage Waveforms) TA = 25°C SN54AC374 SN74AC374 MIN MIN MIN MAX 60 MAX 60 MAX 60 UNIT fclock Clock frequency tw Pulse duration, CLK high or low 5.5 6.5 6 MHz ns tsu Setup time, data before CLK↑ 5.5 6.5 6 ns th Hold time, data after CLK↑ 1 1 1 ns Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 5 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 5.6 Timing Requirements, VCC = 5 V ± 0.5 V over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Load Circuit and Voltage Waveforms) fclock Clock frequency tw Pulse duration, CLK high or low tsu Setup time, data before CLK↑ th Hold time, data after CLK↑ TA = 25°C SN54AC374 SN74AC374 MIN MIN MIN MAX MAX 100 MAX 95 4 100 UNIT MHz 5 4.5 ns 4 5 4.5 ns 1.5 1.5 1.5 ns 5.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Load Circuit and Voltage Waveforms) PARAMETER TO (INPUT) TO (OUTPUT) TA = 25°C SN54AC374 MIN TYP fmax 60 110 tPLH 3 11 13.5 2.5 10 3 tPHL tPZH tPZL tPHZ tPLZ CLK Q OE Q OE Q MAX MIN SN74AC374 MAX MIN 3 16.5 1.5 15.5 12.5 3 15 2 14 9.5 11.5 1 14 1.5 13 3.5 9 11.5 1 14 1.5 13 3 10.5 12.5 1 16 2 14.5 2 8 11.5 1 13 1 12.5 60 MAX 60 UNIT MHz ns ns ns 5.8 Switching Characteristics, VCC = 5 V ± 0.5 V over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Load Circuit and Voltage Waveforms) PARAMETER TO (INPUT) TO (OUTPUT) TA = 25°C SN54AC374 TYP fmax 100 155 tPLH 2.5 8 9.5 3 12 1.5 10.5 2 7 9 3 11 1.5 10 2 7 8.5 1.5 10 1 9.5 2 6.5 8.5 1.5 10.5 1 9.5 2 8 11 1.5 12.5 2 12.5 1.5 6.5 10.5 1 10 tPHL tPZH tPZL tPHZ tPLZ CLK Q OE Q OE Q MAX MIN MAX SN74AC374 MIN 95 8.5 1.5 MIN MAX 100 UNIT MHz ns ns ns 5.9 Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS CL = 50 pF, f = 1 MHz Submit Document Feedback TYP 40 UNIT pF Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 6 Parameter Measurement Information A. B. C. D. CL includes probe and jig capacitance. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. The outputs are measured one at a time with one input transition per measurement. Figure 6-1. Load Circuit and Voltage Waveforms TEST S1 tPLH/tPHL Open tPLZ/tPZL 2 × VCC tPHZ/tPZH Open Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 7 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 7 Detailed Description 7.1 Overview The eight flip-flops of the ’AC374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. For specified high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 7.2 Functional Block Diagram Figure 7-1. Logic Diagram (Positive Logic) 7.3 Device Functional Modes Table 7-1. Function Table (Each Flip-flop) INPUTS 8 OUTPUT Q OE CLK D L ↑ H H L ↑ L L L H or L X Q0 H X X Z Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 SN54AC374, SN74AC374 www.ti.com SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 8 Device and Documentation Support 8.1 Documentation Support (Analog) 8.1.1 Related Documentation The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 8-1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54AC374 Click here Click here Click here Click here Click here SN74AC374 Click here Click here Click here Click here Click here 8.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 8.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 8.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 8.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 8.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 9 SN54AC374, SN74AC374 SCAS543F – OCTOBER 1995 – REVISED AUGUST 2023 www.ti.com 9 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: SN54AC374 SN74AC374 PACKAGE OPTION ADDENDUM www.ti.com 2-Dec-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-87694012A ACTIVE LCCC FK 20 55 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596287694012A SNJ54AC 374FK 5962-8769401RA ACTIVE CDIP J 20 20 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401RA SNJ54AC374J Samples 5962-8769401SA ACTIVE CFP W 20 25 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401SA SNJ54AC374W Samples SN74AC374DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AC374N Samples SN74AC374NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples Samples SN74AC374PW LIFEBUY TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 SN74AC374PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 SNJ54AC374FK ACTIVE LCCC FK 20 55 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596287694012A SNJ54AC 374FK SNJ54AC374J ACTIVE CDIP J 20 20 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401RA SNJ54AC374J Samples SNJ54AC374W ACTIVE CFP W 20 25 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401SA SNJ54AC374W Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 2-Dec-2023 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of