THS7530QPWPRQ1

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents THS7530-Q1 SLOS932 – DECEMBER 2015 THS7530-Q1 High-Speed, Fully Differential, Continuously Variable Gain Amplifier 1 Features • • • 3 Description 1 • • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device HBM Classification Level 2 – Device CDM Classification Level C6 Low Noise: Vn = 1.1 nV/√Hz, Noise Figure = 9 dB Low Distortion: – HD2 = –65 dBc, HD3 = –61 dBc at 32 MHz – IMD3 = –62 dBc, OIP3 = 21 dBm at 70 MHz 300-MHz Bandwidth Continuously Variable Gain Range: 11.6 dB to 46.5 dB Gain Slope: 38.8 dB/V Fully Differential Input and Output Output Common-Mode Voltage Control Output Voltage Limiting Variable Gain in Instrumentation The THS7530-Q1 device is fabricated using Texas Instruments' state-of-the-art BiCom III SiGe complementary bipolar process. The THS7530-Q1 device is a DC-coupled, wide bandwidth amplifier with voltage-controlled gain. The amplifier has highimpedance differential inputs and low-impedance differential outputs with high-bandwidth gain control, output common-mode control, and output voltage clamping. Signal-channel performance is exceptional with 300-MHz bandwidth, and third harmonic distortion of –61 dBc at 32 MHz with 1-VPP output into 400 Ω. Gain control is linear in dB with 0 V to 0.9 V varying the gain from 11.6 dB to 46.5 dB with 38.8-dB/V gain slope. Output voltage limiting is provided to limit the output voltage swing and to prevent saturating following stages. The device is characterized for operation over the automotive temperature range, –40°C to +125°C. 2 Applications • • • Device Information(1) Time Gain Amplifiers in Ultra Sound, Sonar, and Radar Automatic Gain Control in Communication and Video System Gain Calibration in Communications PART NUMBER THS7530-Q1 PACKAGE HTSSOP (14) BODY SIZE (NOM) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Circuit VS+ = 5 V 1 kW 1 kW 0.1 mF 0.1 mF 24.9 W 6.8 mF 33 pF 24.9 W VCL+ VCL- 0.1 mF 24.9 W 0.1 mF VIN+ VOUT0.1 mF VOCM PD THS7530 0.1 mF VOUT+ VIN24.9 W VG- 0.1 mF 33 pF VS- VG+ AGC Detect VREF 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. THS7530-Q1 SLOS932 – DECEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics: Main Amplifier.................. Package Thermal Data ............................................. Typical Characteristics .............................................. 7 Parameter Measurement Information ................ 10 8 Detailed Description ............................................ 11 8.3 Feature Description................................................. 11 8.4 Device Functional Modes........................................ 12 9 Application and Implementation ........................ 13 9.1 Application Information............................................ 13 9.2 Typical Application .................................................. 15 10 Power Supply Recommendations ..................... 17 11 Layout................................................................... 18 11.1 Layout Guidelines ................................................. 18 11.2 Layout Examples................................................... 20 12 Device and Documentation Support ................. 22 12.1 12.2 12.3 12.4 12.5 12.6 7.1 Test Circuits ............................................................ 10 Device Support .................................................... Documentation Support ........................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 22 22 22 22 22 22 13 Mechanical, Packaging, and Orderable Information ........................................................... 22 8.1 Overview ................................................................. 11 8.2 Functional Block Diagram ....................................... 11 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 2 DATE REVISION NOTES December 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: THS7530-Q1 THS7530-Q1 www.ti.com SLOS932 – DECEMBER 2015 5 Pin Configuration and Functions PWP Package 14-Pin HTSSOP With PowerPAD™ Top View VCL+ NC 1 14 NC 2 13 VCL- VIN+ 3 12 VIN- 4 11 VOUT- VG+ 5 10 VOUT+ VG- 6 9 VS+ PD 7 8 VS- VOCM Pin Functions PIN NAME NC NO. 1 2 I/O DESCRIPTION — No internal connection Power down, PD = logic low puts the device into low power mode; PD = logic high or open for normal operation PD 7 — VCL– 13 I Output negative clamp voltage input VCL+ 14 I Output positive clamp voltage input VG- 6 I Gain setting negative input VG+ 5 I Gain setting positive input VIN– 4 I Inverting amplifier input VIN+ 3 I Noninverting amplifier input VOCM 12 I Output common-mode voltage input VOUT– 11 O Inverted amplifier output VOUT+ 10 O Noninverted amplifier output VS– 8 I Negative amplifier power-supply input VS+ 9 I Positive amplifier power-supply input Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: THS7530-Q1 3 THS7530-Q1 SLOS932 – DECEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range, unless otherwise noted. (1) MAX UNIT VS+ – VS– Supply voltage MIN 5.5 V VI Input voltage ±VS V IO Output current 65 mA VID Differential input voltage ±4 V Continuous power dissipation TJ Tstg (1) (2) See Thermal Information Maximum junction temperature 150 °C Maximum junction temperature for long term stability (2) 125 °C 150 °C Storage temperature –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. 6.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) ±2000 Charged-device model (CDM), per AEC Q100-011 ±1000 UNIT V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions [VS– to VS+] TA Supply voltage MIN NOM MAX 4.5 5 5.5 UNIT V Input common mode voltage [VS– to VS+] = 5 V 2.5 V Output common mode voltage [VS– to VS+] = 5 V 2.5 V Operating free-air temperature –40 125 °C 6.4 Thermal Information THS7530 THERMAL METRIC (1) PWP (HTSSOP) UNIT 14 PINS RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance 75.3 °C/W 35 RθJB °C/W Junction-to-board thermal resistance 28.9 °C/W ψJT Junction-to-top characterization parameter 1.6 °C/W ψJB Junction-to-board characterization parameter 28.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 3.2 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: THS7530-Q1 THS7530-Q1 www.ti.com SLOS932 – DECEMBER 2015 6.5 Electrical Characteristics: Main Amplifier VS+ = 5 V, VS– = 0 V, VOCM = 2.5 V, VICM = 2.5 V, VG- = 0 V, VG+ = 1 V (maximum gain), TA = 25°C, AC performance measured using the AC test circuit shown in Figure 16 (unless otherwise noted). DC performance is measured using the DC test circuit shown in Figure 17 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AC PERFORMANCE Small-signal bandwidth All gains, PIN = –45 dBm Slew rate (1) 1-VPP Step, 25% to 75%, minimum gain Settling time to 1% (1) 1-VPP Step, minimum gain Harmonic distortion, 2nd harmonic 300 MHz 1250 V/µs 11 ns f = 32 MHz, VO(PP) = 1 V, RL(diff)= 400 Ω –65 dBc Harmonic distortion, 3rd harmonic f = 32 MHz, VO(PP) = 1 V, RL(diff)= 400 Ω –61 dBc Third-order intermodulation distortion PO = –10 dBm each tone, fC= 70 MHz, 200-kHz tone spacing –62 dBc Third-order output intercept point fC= 70 MHz, 200-kHz tone spacing 21 dBm Noise figure (with input termination) Source impedance: 50 Ω Total input voltage noise f > 100 kHz 1.1 TA = 25°C 20 9 dB nV/√Hz DC PERFORMANCE—INPUTS Input bias current TA = –40°C to +125°C Maximum input voltage Common-mode rejection ratio µA 40 Input bias current offset Minimum input voltage 39