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THVD1428
SLLSFG3 – MAY 2020
THVD1428 3.3-V to 5-V RS-485 Transceiver with 3-kV Surge Protection
1 Features
3 Description
•
THVD1428 is a half-duplex RS-485 transceiver with
integrated surge protection. Surge protection is
achieved by integrating transient voltage suppressor
(TVS) diodes in the standard 8-pin SOIC (D)
package. This feature provides a substantial increase
in reliability for better immunity to noise transients
coupled to the data cable, eliminating the need for
external protection components.
1
•
•
•
•
•
•
•
•
•
•
•
Meets or exceeds the requirements of the
TIA/EIA-485A standard
3-V to 5.5-V Supply voltage
Bus I/O protection
– ± 16 kV HBM ESD
– ± 4 kV IEC 61000-4-2 Contact discharge
– ± 8 kV IEC 61000-4-2 Air-gap discharge
– ± 4 kV IEC 61000-4-4 Electrical fast transient
– ± 3 kV IEC 61000-4-5 1.2/50-μs Surge
Supports 20 Mbps
Extended ambient
temperature range: -40°C to 125°C
Extended operational
common-mode range: ± 12 V
Receiver hysteresis for noise rejection: 30 mV
Low power consumption
– Standby supply current: < 2 µA
– Current during operation: < 3 mA
Glitch-free power-up/down for hot plug-in
capability
Open, short, and idle bus fail-safe
1/8 Unit load (Up to 256 bus nodes)
Industry standard 8-Pin SOIC
for drop-in compatibility
This device operates from a single 3.3-V or 5-V
supply and features a wide common-mode voltage
range which makes it suitable for multi-point
applications over long cable runs.
The device is available in the industry standard SOIC
package for easy drop-in without any PCB changes.
The device is characterized over ambient free-air
temperatures from –40°C to 125°C.
Device Information(1)
PART NUMBER
THVD1428
PACKAGE
SOIC (8)
BODY SIZE (NOM)
4.90 mm × 3.91 mm
(1) For all available devices, see the orderable addendum at the
end of the data sheet.
Block Diagram
VCC
R
A
2 Applications
RE
B
•
•
•
•
•
•
•
•
DE
Wireless infrastructure
Building automation
HVAC systems
Factory automation & control
Grid infrastructure
Smart meters
Process analytics
Video surveillance
D
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
THVD1428
SLLSFG3 – MAY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
4
4
4
5
5
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
ESD Ratings - IEC Specifications .............................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Power Dissipation .....................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
8.2 Functional Block Diagrams ..................................... 11
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 14
9
Application and Implementation ........................ 15
9.1 Application Information........................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 Device and Documentation Support ................. 20
12.1
12.2
12.3
12.4
12.5
12.6
Parameter Measurement Information .................. 9
Detailed Description ............................................ 11
Device Support......................................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
20
13 Mechanical, Packaging, and Orderable
Information ........................................................... 20
8.1 Overview ................................................................. 11
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
2
DATE
REVISION
NOTES
May 2020
*
Initial release.
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5 Pin Configuration and Functions
THVD1428 Devices
8-Pin D Package (SOIC)
Top View
R
1
8
VCC
RE
2
7
B
DE
3
6
A
D
4
5
GND
Not to scale
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
A
6
Bus input/output
Bus I/O port, A (complementary to B)
B
7
Bus input/output
Bus I/O port, B (complementary to A)
D
4
Digital input
Driver data input (2-MΩ internal pull-up)
DE
3
Digital input
Driver enable, active high (2-MΩ internal pull-down)
GND
5
Ground
R
1
Digital output
Receive data output
VCC
8
Power
3.3-V to 5-V supply
RE
2
Digital input
Device ground
Receiver enable, active low (2-MΩ internal pull-up)
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Supply voltage
VCC
-0.5
7
V
Bus voltage
Range at any bus pin (A or B) as differential or
common-mode with respect to GND
-15
15
V
Input voltage
Range at any logic pin (D, DE, or /RE)
-0.3
5.7
V
Receiver output
current
IO
-24
24
mA
-65
150
℃
Storage temperature range
(1)
UNIT
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V(ESD)
Electrostatic discharge
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001, 2010
Charged device model (CDM), per
JEDEC JESD22-C101E
VALUE
UNIT
Bus terminals
and GND
±16
kV
All other pins
±8
kV
±1.5
kV
All pins
6.3 ESD Ratings - IEC Specifications
V(ESD)
Electrostatic discharge
VALUE
UNIT
Contact Discharge, per IEC 610004-2
Bus pins and
GND
±4
kV
Air-Gap Discharge, per IEC 610004-2
Bus pins and
GND
±8
kV
V(EFT)
Electrical fast transient
Per IEC 61000-4-4
Bus pins and
GND
±4
kV
V(surge)
Surge
Per IEC 61000-4-5, 1.2/50 μs
Bus pins and
GND
±3
kV
4
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6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VCC
Supply voltage
VI
Input voltage at any bus terminal
(separately or common mode) (1)
VIH
NOM
MAX
UNIT
3
5.5
V
-12
12
V
High-level input voltage (driver, driver
enable, and receiver enable inputs)
2
VCC
V
VIL
Low-level input voltage (driver, driver
enable, and receiver enable inputs)
0
0.8
V
VID
Differential input voltage
-12
12
V
IO
Output current, driver
-60
60
mA
IOR
Output current, receiver
-8
8
mA
RL
Differential load resistance
54
1/tUI
Signaling rate: THVD1428
20
Mbps
TA
Operating ambient temperature
-40
125
℃
TJ
Junction temperature
-40
150
℃
(1)
Ω
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
6.5 Thermal Information
THVD1428
THERMAL METRIC
(1)
D (SOIC)
UNIT
8-PINS
RθJA
Junction-to-ambient thermal resistance
120.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
50.3
°C/W
RθJB
Junction-to-board thermal resistance
62.8
°C/W
ΨJT
Junction-to-top characterization parameter
7.5
°C/W
ΨJB
Junction-to-board characterization parameter
62.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.6 Power Dissipation
PARAMETER
PD
Description
TEST CONDITIONS
Unterminated: RL = 300 Ω, CL = 50 pF
Driver and receiver enabled, VCC = 5.5 V, TA
= 125 0C, 50% duty cycle square wave at
RS-422 load: RL = 100 Ω, CL = 50 pF
maximum signaling rate, THVD1428
RS-485 load: RL = 54 Ω, CL = 50 pF
VALUE
UNIT
350
mW
290
mW
300
mW
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6.7 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
3.5
MAX
UNIT
Driver
|VOD|
Driver differential output voltage
magnitude
RL = 60 Ω, -12 V ≤ Vtest ≤ 12 V, see Figure 7
1.5
|VOD|
Driver differential output voltage
magnitude
RL = 60 Ω, -12 V ≤ Vtest ≤ 12 V, 4.5 V ≤
VCC ≤ 5.5 V, see Figure 7
2.1
|VOD|
Driver differential output voltage
magnitude
RL = 100 Ω, see Figure 8
|VOD|
Driver differential output voltage
magnitude
RL = 54 Ω, see Figure 8
Δ|VOD|
Change in differential output
voltage
VOC
Common-mode output voltage
ΔVOC(SS)
Change in steady-state
common-mode output voltage
IOS
Short-circuit output current
DE = VCC, -7 V ≤ VO ≤ 12 V
II
Bus input current
DE = 0 V, VCC = 0 V or 5.5 V
VTH+
Positive-going input threshold
voltage
VTH-
Negative-going input threshold
voltage
VHYS
Input hysteresis
CA,B
Input differential capacitance
Measured between A and B, f = 1 MHz
VOH
Output high voltage
IOH = -8 mA
VOL
Output low voltage
IOL = 8 mA
IOZR
Output high-impedance current
VO = 0 V or VCC, RE = VCC
Input current (D, DE, RE)
4.5 V ≤ VCC ≤ 5.5 V
V
V
2
4
V
1.5
3.5
V
-200
RL = 54 Ω, see Figure 8
1
200
VCC / 2
3
mV
V
-200
200
mV
-250
250
mA
125
µA
Receiver
VI = 12 V
50
VI = -7 V
-100
-65
µA
VI = -12 V
-150
-100
µA
(1)
-100
-20
mV
-200
-130
See (1)
mV
See
Over common-mode range of ±12 V
30
mV
220
pF
VCC – 0.4 VCC – 0.3
0.2
V
0.4
V
-1
1
µA
-6.2
6.2
µA
Logic
IIN
Device
ICC
TSD
(1)
6
Supply current (quiescent)
Driver and receiver enabled
RE = 0 V,
DE = VCC,
No load
2.4
3
mA
Driver enabled, receiver
disabled
RE = VCC,
DE = VCC,
No load
2
2.6
mA
Driver disabled, receiver
enabled
RE = 0 V,
DE = 0V,
No load
700
960
µA
Driver and receiver disabled
RE = VCC,
DE = 0 V,
D = open,
No load
0.1
2
µA
Thermal shutdown temperature
170
℃
Under any specific conditions, VTH+ is assured to be at least VHYS higher than VTH–.
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6.8 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
9
16
ns
12
25
ns
6
ns
Driver: THVD1428
tr, tf
Differential output rise / fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH, tPZL
Enable time
RL = 54 Ω, CL = 50 pF, see Figure 9
18
40
ns
RE = 0 V, see Figure 10
and Figure 11
16
40
ns
RE = VCC, see Figure 10
and Figure 11
2.8
11
µs
2
6
ns
12
45
ns
6
ns
14
28
ns
DE = VCC, see Figure 13
75
110
ns
DE = 0 V, see Figure 14
4.8
14
µs
Receiver: THVD1428
tr, tf
Output rise / fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH(1), tPZL(1),
tPZH(2),
Enable time
tPZL(2),
CL = 15 pF, see Figure 12
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6.9 Typical Characteristics
5
VO Driver Output Voltage (V)
VO Driver Differential Output Voltage (V)
5
VOH VCC = 5 V
VOL VCC = 5 V
VOH VCC = 3.3 V
VOL VCC = 3.3 V
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
4
3.5
3
2.5
2
1.5
1
0.5
0
0
10
20
30
40
50
60
70
IO Driver Output Current (mA)
DE = VCC
80
90
0
D=0V
1
1.5
2
2.5
3
3.5
4
VCC Supply Voltage (V)
DE = VCC
30
40
50
60
70
IO Driver Output Current (mA)
4.5
5
90
D102
D=0V
5.5
16
15.5
15
14.5
14
13.5
13
12.5
12
11.5
11
10.5
10
9.5
9
8.5
8
-40
VCC = 5 V
VCC = 3.3 V
-20
0
20
D103
TA = 25°C
80
Figure 2. Driver Differential Output voltage vs Driver Output
Current
VO Driver Rise and Fall Time (ns)
0.5
20
DE = VCC
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
0
10
D101
Figure 1. Driver Output Voltage vs Driver Output Current
IO Driver Output Current (mA)
VCC = 5 V
VCC = 3.3 V
4.5
RL = 54 Ω
40
60
80
Temperature (0C)
100
120
140
D104
Figure 4. Driver Rise or Fall Time vs Temperature
Figure 3. Driver Output Current vs Supply Voltage
90
VCC = 5 V
VCC = 3.3 V
18
17
16
15
14
13
12
80
75
70
65
60
55
50
11
45
10
-40
40
-20
0
20
40
60
80
Temperature (0C)
100
120
VCC = 5 V
VCC = 3.3 V
85
ICC Supply Current (mA)
VO Driver Propagation Delay (ns)
19
140
0
D105
Figure 5. Driver Propagation Delay vs Temperature
8
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2
4
6
8
10
12
14
Signaling Rate (Mbps)
16
18
20
D106
Figure 6. Supply Current vs Signal Rate
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7 Parameter Measurement Information
375 Ÿ
Vcc
DE
A
D
VOD
0V or Vcc
Vtest
RL
B
375 Ÿ
Figure 7. Measurement of Driver Differential Output Voltage With Common-Mode Load
A
0V or Vcc
A
D
RL/2
VA
B
VB
VOD
RL/2
B
CL
VOC(PP)
VOC
ûVOC(SS)
VOC
Figure 8. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
Vcc
Vcc
DE
A
D
Input
Generator
VI
50%
VI
VOD
50 Ÿ
0V
tPHL
tPLH
RL=
54 Ÿ
CL= 50 pF
90%
50%
10%
B
VOD
tr
tf
~2 V
~ ±2V
Figure 9. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
A
D
S1
Vcc
VO
50%
VI
B
DE
Input
Generator
VI
RL =
110 Ÿ
CL =
50 pF
50 Ÿ
0V
tPZH
90%
VO
VOH
50%
~
~ 0V
tPHZ
Figure 10. Measurement of Driver Enable and Disable Times With Active High Output and Pull-Down
Load
Vcc
Vcc
A
S1
B
D
DE
Input
Generator
RL= 110 Ÿ
CL=
50 pF
VO
50%
VI
0V
tPZL
tPLZ
§ Vcc
VO
50 %
VI
10%
VOL
50 Ÿ
Figure 11. Measurement of Driver Enable and Disable Times With Active Low Output and Pull-up Load
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Parameter Measurement Information (continued)
3V
A
Input
Generator
R VO
VI
50 Ÿ
1.5V
0V
50 %
VI
B
0V
tPLH
tPHL
VOH
90%
CL=15 pF
50%
RE
VOD
10 %
tr
VOL
tf
Figure 12. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
Vcc
Vcc
Vcc
VI
50 %
DE
0V or Vcc
0V
A
D
R
B
1 kŸ
VO
tPZH(1)
tPHZ
S1
VO
CL=15 pF
90 %
50 %
tPZL(1)
VI
D at Vcc
S1 to GND
§ 0V
RE
Input
Generator
VOH
50 Ÿ
tPLZ
VO
50 %
VCC D at 0V
S1 to Vcc
10 %
VOL
Figure 13. Measurement of Receiver Enable/Disable Times With Driver Enabled
Vcc
Vcc
VI
50%
0V
A
V or 1.5V
R
1.5 V or 0V
B
VO
RE
1 NŸ
tPZH(2)
S1
CL=15 pF
VOH
50%
VO
§ 0V
A at 1.5 V
B at 0 V
S1 to GND
tPZL(2)
Input
Generator
VI
50 Ÿ
VCC
VO
50%
VOL
A at 0V
B at 1.5V
S1 to VCC
Figure 14. Measurement of Receiver Enable Times With Driver Disabled
10
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8 Detailed Description
8.1 Overview
THVD1428 is surge-protected, half duplex RS-485 transceiver suitable for data transmission up to 20 Mbps.
Surge protection is achieved by integrating transient voltage suppresser (TVS) diodes in the standard 8-pin SOIC
(D) package.
The device has active-high driver enable and active-low receiver enable. A standby current of less than 2 µA can
be achieved by disabling both driver and receiver.
8.2 Functional Block Diagrams
VCC
R
A
RE
B
DE
D
GND
Figure 15. THVD1428 Block Diagram
8.3 Feature Description
8.3.1 Electrostatic Discharge (ESD) Protection
The bus pins of the THVD1428 transceiver includes on-chip ESD protection against ±16-kV HBM and ±4-kV IEC
61000-4-2 contact discharge. The International Electrotechnical Commission (IEC) ESD test is far more severe
than the HBM ESD test. The 50% higher charge capacitance, C(S), and 78% lower discharge resistance, R(D), of
the IEC model produce significantly higher discharge currents than the HBM model. As stated in the IEC 610004-2 standard, contact discharge is the preferred transient protection test method.
R(D)
50 M
(1 M)
High-Voltage
Pulse
Generator
330 Ω
(1.5 kΩ)
C(S)
150 pF
(100 pF)
Device
Under
Test
Current (A)
R(C)
40
35
30 10-kV IEC
25
20
15
10
5
0
0
50
100
10-kV HBM
150
200
250
300
Time (ns)
Figure 16. HBM and IEC ESD Models and Currents in Comparison (HBM Values in Parenthesis)
The on-chip implementation of IEC ESD protection significantly increases the robustness of equipment. Common
discharge events occur because of human contact with connectors and cables.
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Feature Description (continued)
8.3.2 Electrical Fast Transient (EFT) Protection
Normalized Voltage
Inductive loads such as relays, switch contactors, or heavy-duty motors can create high-frequency bursts during
transition. The IEC 61000-4-4 test is intended to simulate the transients created by such switching of inductive
loads on AC power lines. Figure 17 shows the voltage waveforms in to 50-Ω termination as defined by the IEC
standard.
1
Time
Normalized Voltage
300 ms
15 ms at 5 kHz
0.75 ms at 100 kHz
1
Time
Normalized Voltage
200 µs at 5 kHz
10 µs at 100 kHz
1
0.5
Time
5 ns
50ns
Figure 17. EFT Voltage Waveforms
Internal ESD protection circuits of the THVD1428 protect the transceiver against EFT ±4 kV.
8.3.3 Surge Protection
Surge transients often result from lightning strikes (direct strike or an indirect strike which induce voltages and
currents), or the switching of power systems, including load changes and short circuit switching. These transients
are often encountered in industrial environments, such as factory automation and power-grid systems.
Figure 18 compares the pulse-power of the EFT and surge transients with the power caused by an IEC ESD
transient. The left hand diagram shows the relative pulse-power for a 0.5-kV surge transient and 4-kV EFT
transient, both of which dwarf the 10-kV ESD transient visible in the lower-left corner. 500-V surge transients are
representative of events that may occur in factory environments in industrial and process automation.
The right hand diagram shows the pulse-power of a 6-kV surge transient, relative to the same 0.5-kV surge
transient. 6-kV surge transients are most likely to occur in power generation and power-grid systems.
12
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22
20
18
16
14
12
10
8
6
4
2
0
Pulse Power (MW)
Pulse Power (kW)
Feature Description (continued)
0.5-kV Surge
4-kV EFT
10-kV ESD
0
5
10
15
20
25
30
35
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
6-kV Surge
0.5-kV Surge
0
40
5
10
15
20
25
30
35
40
Time (µs)
Time (µs)
Figure 18. Power Comparison of ESD, EFT, and Surge Transients
Figure 19 shows the test setup used to validate THVD1428 surge performance according to the IEC 61000-4-5
1.2/50-μs surge pulse.
80
A
Surge Generator
2 Source Impedance
80
B
RS-485
Transceiver
Coupling Network
GND
Figure 19. THVD1428 Surge Test Setup
THVD1428 is robust to ±3-kV surge transients without the need for any external components.
8.3.4 Failsafe Receiver
The differential receiver of THVD1428 is failsafe to invalid bus states caused by the following:
• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver outputs a failsafe logic high state so that the output of the receiver
is not indeterminate.
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8.4 Device Functional Modes
When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input
D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as
VOD = VA – VB is positive. When D is low, the output states reverse: B turns high, A becomes low, and VOD is
negative.
When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin
has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by
default. The D pin has an internal pull-up resistor of 2-MΩ to VCC, thus, when left open while the driver is
enabled, output A turns high and B turns low.
Table 1. Driver Function Table
INPUT
ENABLE
D
DE
A
OUTPUTS
H
H
H
L
Actively drive bus high
L
H
L
H
Actively drive bus low
X
L
Z
Z
Driver disabled
X
OPEN
Z
Z
Driver disabled by default
OPEN
H
H
L
Actively drive bus high by default
FUNCTION
B
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage
defined as VID = VA – VB is higher than the positive input threshold, VTH+, the receiver output, R, turns high.
When VID is lower than the negative input threshold, VTH-, the receiver output, R, turns low. If VID is between VTH+
and VTH- the output is indeterminate.
When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID
are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is
disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not
actively driven (idle bus).
Table 2. Receiver Function Table
14
DIFFERENTIAL INPUT
ENABLE
OUTPUT
VID = VA – VB
RE
R
VTH+ < VID
L
H
Receive valid bus high
VTH- < VID < VTH+
L
?
Indeterminate bus state
VID < VTH-
L
L
Receive valid bus low
X
H
Z
Receiver disabled
X
OPEN
Z
Receiver disabled by default
Open-circuit bus
L
H
Fail-safe high output
Short-circuit bus
L
H
Fail-safe high output
Idle (terminated) bus
L
H
Fail-safe high output
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
THVD1428 is a half-duplex RS-485 transceiver with integrated system-level surge protection. Standard 8-pin
SOIC (D) package allows drop-in replacement into existing systems and eliminate system-level protection
components.
9.2 Typical Application
An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic
impedance, Z0, of the cable. This method, known as parallel termination, allows for higher data rates over longer
cable length.
R
R
RE
B
DE
D
R
A
R
A
RT
RT
D
A
R
B
A
D
R RE DE D
R
RE
B
DE
D
B
D
D
R RE DE D
Figure 20. Typical RS-485 Network With Half-Duplex Transceivers
9.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of
applications with varying requirements, such as distance, data rate, and number of nodes.
9.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and cable length, which means the higher the data rate, the
short the cable length; and conversely, the lower the data rate, the longer the cable length. While most RS-485
systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 250 kbps at
distances of 4000 feet and longer. Longer distances are possible by allowing for small signal jitter of up to 5 or
10%.
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Typical Application (continued)
10000
Cable Length (ft)
5%, 10%, and 20% Jitter
1000
Conservative
Characteristics
100
10
100
1k
10 k
100 k
1M
10 M
100 M
Data Rate (bps)
Figure 21. Cable Length vs Data Rate Characteristic
Even higher data rates are achievable (that is, 20 Mbps for the THVD1428) in cases where the interconnect is
short enough (or has suitably low attenuation at signal frequencies) to not degrade the data.
9.2.1.2 Stub Length
When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a non-terminated piece of bus line which can introduce
reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of
a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as
shown in Equation 1.
L(STUB) ≤ 0.1 × tr × v × c
where
•
•
•
tr is the 10/90 rise time of the driver
c is the speed of light (3 × 108 m/s)
v is the signal velocity of the cable or trace as a factor of c
(1)
9.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit
load represents a load impedance of approximately 12 kΩ. Because the THVD1428 device consists of 1/8 UL
transceiver, connecting up to 256 receivers to the bus is possible.
16
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Typical Application (continued)
9.2.2 Detailed Design Procedure
RS-485 transceivers operate in noisy industrial environments typically require surge protection at the bus pins.
Figure 22 compares 1-kV surge protection implementation with a regular RS-485 transceiver (such as
THVD14x0) against with the THVD1428. The internal TVS protection of the THVD1428 achieves ±3 kV IEC
61000-4-5 surge protection without any additional external components, reducing system level bill of materials.
System level surge protection implementation
using a typical RS-485 transceiver
3.3V ± 5 V
100nF
VCC
10k
10k
MOV
R
RxD
TBU
/RE
A
DE
B
DIR
MCU/
UART DIR
TVS
TBU
D
TxD
RS-485 transceiver
10k
MOV
GND
System level surge protection implementation using
transceiver with integrated surge protection
3.3V ± 5 V
100nF
VCC
10k
10k
R
RxD
/RE
A
DE
B
DIR
MCU/
UART DIR
D
TxD
10k
RS-485 with surge
protection integrated
GND
Figure 22. Implementation of System-Level Surge Protection Using THVD1428
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Typical Application (continued)
9.2.3 Application Curves
VCC = 5 V
54-Ω Termination
TA = 25°C
Figure 23. THVD1428 Waveforms at 20 Mbps
10 Power Supply Recommendations
To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple
present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and
inductance of the PCB power planes.
18
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11 Layout
11.1 Layout Guidelines
Additional external protection components generally are not needed when using THVD1428 transceivers.
1. Use VCC and ground planes to provide low-inductance. Note that high-frequency currents tend to follow the
path of least impedance and not the path of least resistance. Apply 100-nF to 220-nF decoupling capacitors
as close as possible to the VCC pins of transceiver, UART and/or controller ICs on the board.
2. Use at least two vias for VCC and ground connections of decoupling capacitors to minimize effective viainductance.
3. Use 1-kΩ to 10-kΩ pull-up and pull-down resistors for enable lines to limit noise currents in theses lines
during transient events.
11.2 Layout Example
2
Via to GND
C
R
Via to VCC
R
JMP
3
1
R
MCU
3
R
THVD1428
2
Figure 24. Half-Duplex Layout Example
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12 Device and Documentation Support
12.1 Device Support
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
THVD1428DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1428
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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