TIBPAL16R6-7CN

OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 • Functionally Equivalent, but Faster than, Existing 20-Pin PLDs • Preload Capability on Output Registers Simplifies Testing • Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) • Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs • • TIBPAL16L8’ C SUFFIX . . . J OR N PACKAGE M SUFFIX . . . J PACKAGE (TOP VIEW) I I I I I I I I I GND 3-STATE O OUTPUTS REGISTERED Q OUTPUTS I/O PORT S PAL16L8 10 2 0 6 PAL16R4 8 0 4 (3-state buffers) 4 PAL16R6 8 0 6 (3-state buffers) 2 PAL16R8 8 0 8 (3-state buffers) 0 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC O I/O I/O I/O I/O I/O I/O O I (TOP VIEW) I I I I I Dependable Texas Instruments Quality and Reliability I INPUTS 20 2 TIBPAL16L8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE Security Fuse Prevents Duplication DEVICE 1 I I I VCC O High-Performance Operation: fmax (no feedback) TIBPAL16R’-7C Series . . . 100 MHz Min TIBPAL16R’-10M Series . . . 62.5 MHz Min fmax (internal feedback) TIBPAL16R’-7C Series . . . 100 MHz Min TIBPAL16R’-10M Series . . . 62.5 MHz Min fmax (external feedback) TIBPAL16R’-7C Series . . . 74 MHz Min TIBPAL16R’-10M Series . . . 52.5 MHz Min Propagation Delay TIBPAL16L’-7C Series . . . 7 ns Max TIBPAL16L’-10M Series . . . 10 ns Max 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 I/O I/O I/O I/O I/O I GND I O I/O • Pin assignments in operating mode description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT-X™ circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board space. All of the register outputs are set to a low level during power-up. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL16’ C series is characterized from 0°C to 75°C. The TIBPAL16’ M series is characterized for operation over the full military temperature range of −55°C to 125°C. IMPACT-X is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. Copyright © 2010, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 OBSOLETE - No Longer Available TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 TIBPAL16R4’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE TIBPAL16R4’ C SUFFIX . . . J OR N PACKAGE M SUFFIX . . . J PACKAGE (TOP VIEW) 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC I/O I/O Q Q Q Q I/O I/O OE I I I I I 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 TIBPAL16R6’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE TIBPAL16R6’ C SUFFIX . . . J OR N PACKAGE M SUFFIX . . . J PACKAGE (TOP VIEW) 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC I/O Q Q Q Q Q Q I/O OE I I I I I 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 I GND 1 I I CLK VCC I/O (TOP VIEW) CLK I I I I I I I I GND TIBPAL16R8’ C SUFFIX . . . J OR N PACKAGE M SUFFIX . . . J PACKAGE (TOP VIEW) 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 I I CLK VCC Q 20 2 VCC Q Q Q Q Q Q Q Q OE I I I I I Pin assignments in operating mode 2 POST OFFICE BOX 655303 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 I GND 1 Q Q Q Q Q TIBPAL16R8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE (TOP VIEW) CLK I I I I I I I I GND I/O Q Q Q Q OE I/O I/O 19 OE I/O Q 20 2 • DALLAS, TEXAS 75265 OE Q Q 1 I GND CLK I I I I I I I I GND I I CLK VCC I/O (TOP VIEW) Q Q Q Q Q OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C TIBPAL16L8-10M, TIBPAL16R4-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 functional block diagrams (positive logic) TIBPAL16L8’ & 32 X 64 I 16 x 10 6 16 16 EN ≥ 1 7 O 7 O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 6 TIBPAL16R4’ OE CLK EN 2 C1 & 32 X 64 I 16 x 8 I=0 2 ≥1 8 Q 1D 8 Q 8 Q 8 Q 16 4 4 16 EN ≥ 1 7 I/O 7 I/O 7 I/O 7 I/O 4 4 denotes fused inputs POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 OBSOLETE - No Longer Available TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 functional block diagrams (positive logic) TIBPAL16R6’ OE CLK EN 2 C1 & 32 X 64 I 16 x 8 ≥1 8 I=0 2 Q 1D 8 Q 8 Q 8 Q 8 Q 8 Q 16 6 2 16 EN ≥ 1 7 I/O I/O 7 2 6 TIBPAL16R8’ OE CLK EN 2 C1 & 32 X 64 I 16 x 8 8 8 ≥1 I=0 2 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 16 16 8 denotes fused inputs 4 Q 1D POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OBSOLETE - No Longer Available TIBPAL16L8-7C TIBPAL16L8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 logic diagram (positive logic) I 1 First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 Increment 0 4 8 12 16 20 24 28 0 32 64 96 128 160 192 224 31 19 256 288 320 352 384 416 448 480 18 512 544 576 608 640 672 704 736 17 768 800 832 864 896 928 960 992 16 1024 1056 1088 1120 1152 1184 1216 1248 15 1280 1312 1344 1376 1408 1440 1472 1504 14 1536 1568 1600 1632 1664 1696 1728 1760 13 1792 1824 1856 1888 1920 1952 1984 2016 12 11 O I/O I/O I/O I/O I/O I/O O I Fuse number = First fuse number + Increment POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 OBSOLETE - No Longer Available TIBPAL16R4-7C TIBPAL16R4-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 logic diagram (positive logic) CLK 1 First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 Increment 0 4 8 12 16 20 24 31 19 256 288 320 352 384 416 448 480 18 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 17 I/O I/O Q C1 16 Q C1 15 Q C1 14 Q C1 1536 1568 1600 1632 1664 1696 1728 1760 13 1792 1824 1856 1888 1920 1952 1984 2016 12 11 Fuse number = First fuse number + Increment 6 28 0 32 64 96 128 160 192 224 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I/O I/O OE OBSOLETE - No Longer Available TIBPAL16R6-7C TIBPAL16R6-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 logic diagram (positive logic) CLK 1 First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 Increment 0 4 8 12 16 20 24 28 31 0 32 64 96 128 160 192 224 19 256 288 320 352 384 416 448 480 I=0 1D 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 1536 1568 1600 1632 1664 1696 1728 1760 I=0 1D 18 I/O Q C1 17 Q C1 16 Q C1 15 Q C1 14 Q C1 13 Q C1 1792 1824 1856 1888 1920 1952 1984 2016 12 11 Fuse number = First fuse number + Increment POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I/O OE 7 OBSOLETE - No Longer Available TIBPAL16R8-7C TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 logic diagram (positive logic) CLK 1 First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 Increment 0 4 8 12 16 20 24 31 I=0 1D 256 288 320 352 384 416 448 480 I=0 1D 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 1536 1568 1600 1632 1664 1696 1728 1760 I=0 1D 1792 1824 1856 1888 1920 1952 1984 2016 I=0 1D 19 Q C1 18 Q C1 17 Q C1 16 Q C1 15 Q C1 14 Q C1 13 Q C1 12 Q C1 11 Fuse number = First fuse number + Increment 8 28 0 32 64 96 128 160 192 224 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OE OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Voltage applied to disabled output (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions VCC Supply voltage VIH High-level input voltage (see Note 2) VIL Low-level input voltage (see Note 2) IOH MIN NOM MAX UNIT 4.75 5 5.25 V 5.5 V 2 0.8 V High-level output current −3.2 mA IOL Low-level output current 24 mA fclock Clock frequency 100 MHz 0 High 5 Low 5 tw Pulse duration, clock (see Note 2) tsu Setup time, input or feedback before clock↑ 7 th Hold time, input or feedback after clock↑ 0 TA Operating free-air temperature 0 ns ns ns 25 75 °C NOTE 2: These are absolute voltage levels with respect to the ground pin of the device and include all overshoots due to system and/or tester noise. Testing these parameters should not be attempted without suitable equipment. electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT −0.8 −1.5 V VIK VCC = 4.75 V, II = − 18 mA VOH VCC = 4.75 V, IOH = − 3.2 mA VOL VCC = 4.75 V, IOL = 24 mA 0.5 V IOZH‡ VCC = 5.25 V, VO = 2.7 V 100 μA IOZL‡ VCC = 5.25 V, VO = 0.4 V −100 μA II VCC = 5.25 V, VI = 5.5 V 100 μA IIH‡ VCC = 5.25 V, VI = 2.7 V 25 μA ‡ VCC = 5.25 V, VI = 0.4 V IOS§ VCC = 5.25 V, VO = 0.5 V ICC VCC = 5.25 V, VI = 0, Ci f = 1 MHz, VI = 2 V 5 pF Co f = 1 MHz, VO = 2 V 6 pF Cclk f = 1 MHz, VCLK = 2 V 6 pF IIL 2.4 3.2 0.3 −30 Outputs open V −80 −250 μA −70 −130 mA 160 180 mA † All typical values are at VCC = 5 V, TA = 25°C. I/O leakage is the worst case of IOZL and IIL or IOZH and IIH respectively. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. V is set at 0.5 V to O avoid test problems caused by test equipment ground degradation. ‡ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER FROM (INPUT) fmax‡ TO (OUTPUT) MIN without feedback 100 with internal feedback (counter configuration) 100 with external feedback 74 O, I/O 1 or 2 outputs switching TYP† MAX UNIT MHz 3 5.5 7 R1 = 200 Ω, 3 6 7.5 Q R2 = 390 Ω, 2 4 6.5 ns Feedback input See Figure 6 3 ns 4 7.5 ns 4 7.5 ns O, I/O 6 9 ns O, I/O 6 9 ns tpd I, I/O tpd CLK↑ tpd§ CLK↑ ten OE↓ Q tdis OE↑ Q ten I, I/O tdis I, I/O tsk(o)¶ TEST CONDITION 8 outputs switching Skew between registered outputs 0.5 † ns ns All typical values are at VCC = 5 V, TA = 25°C. See section for fmax specifications. § This parameter applies to TIBPAL16R4’ and TIBPAL16R6’ only (see Figure 4 for illustration) and is calculated from the measured f max with internal feedback in the counter configuration. ¶ This parameter is the measurement of the difference between the fastest and slowest t (CLK-to-Q) observed when multiple registered outputs pd are switching in the same direction. ‡ 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OBSOLETE - No Longer Available TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Voltage applied to disabled output (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions MIN NOM MAX 4.5 5 5.5 UNIT V 5.5 V VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current −2 mA Low-level output current 12 mA 62.5 MHz IOL fclock † 2 Clock frequency 0 tw Pulse duration, clock (see Note 2) tsu† Setup time, input or feedback before clock↑ th † High 8 Low 8 10 Hold time, input or feedback after clock↑ TA ns ns 0 Operating free-air temperature −55 ns 25 125 °C NOTE 2: These are absolute voltage levels with respect to the ground pin of the device and include all overshoots due to system and/or tester noise. Testing these parameters should not be attempted without suitable equipment. electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS VIK VCC = 4.5 V, II = − 18 mA VOH VCC = 4.5 V, IOH = − 2 mA VOL VCC = 4.5 V, IOL = 12 mA IOZH‡ VCC = 5.5 V, IOZL‡ 0, Q outputs I/O ports II I/O ports MIN 2.4 TYP† MAX UNIT −0.8 −1.5 V 3.2 0.3 V 0.5 V VO = 2.7 V 100 μA VCC = 5.5 V, VO = 0.4 V −0.25 mA VCC = 5.5 V, VI = 5.5 V 1 mA −0.1 100 VCC = 5.5 V, VI = 2.7 V IIL‡ VCC = 5.5 V, VI = 0.4 V IOS§ VCC = 5.5 V, VO = 0.5 V ICC VCC = 5.5 V, VI = GND, Ci f = 1 MHz, VI = 2 V 5 pF Co f = 1 MHz, VO = 2 V 6 pF Cclk/oe f = 1 MHz, VCLK/OE = 2 V 6 pF IIH All others −30 Outputs open 25 μA −0.08 −0.25 mA −70 −130 mA 140 200 mA † All typical values are at VCC = 5 V, TA = 25°C. I/O leakage is the worst case of IOZL and IIL or IOZH and IIH respectively. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. V is set at 0.5 V to O avoid test problems caused by test equipment ground degradation. ‡ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 OBSOLETE - No Longer Available TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER fmax‡ FROM (INPUT) TO (OUTPUT) TEST CONDITION MIN without feedback 62.5 with internal feedback (counter configuration) 62.5 with external feedback TYP† MAX UNIT MHz 52.5 tpd I, I/O O, I/O R1 = 390 Ω, 2 6 10 ns tpd CLK↑ Q R2 = 750 Ω, 1 4 9 ns tpd§ CLK↑ Feedback input See Figure 6 5 ns ten OE↓ Q 1 4 10 ns tdis OE↑ Q 1 4 10 ns ten I, I/O O, I/O 2 6 12 ns tdis I, I/O O, I/O 1 6 10 ns † All typical values are at VCC = 5 V, TA = 25°C. ‡ See section for f max specifications. fmax with external feedback is not production tested but is calculated from the equation found in the fmax section. § This parameter applies to TIBPAL16R4’ and TIBPAL16R6’ only (see Figure 4 for illustration) and is calculated from the measured f max with internal feedback in the counter configuration. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 programming information Texas Instruments programmable logic devices can be programmed using widely available software and inexpensive device programmers. Complete programming specifications, algorithms, and the latest information on hardware, software, and firmware are available upon request. Information on programmers capable of programming Texas Instruments programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI distributor, or by calling Texas Instruments at (214) 997-5666. preload procedure for registered outputs (see Figure 1 and Note 3) The output registers can be preloaded to any desired state during device testing. This permits any state to be tested without having to step through the entire state-machine sequence. Each register is preloaded individually by following the steps given below. Step 1. Step 2. Step 3. Step 4. With VCC at 5 volts and Pin 1 at VIL, raise Pin 11 to VIHH. Apply either VIL or VIH to the output corresponding to the register to be preloaded. Pulse Pin 1, clocking in preload data. Remove output voltage, then lower Pin 11 to VIL. Preload can be verified by observing the voltage level at the output pin. VIHH Pin 11 td tsu tw VIL td VIH Pin 1 VIL VIH Registered I/O Input VOH Output VIL VOL Figure 1. Preload Waveforms NOTE 3: td = tsu = th = 100 ns to 1000 ns VIHH = 10.25 V to 10.75 v POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 power-up reset (see Figure 2) Following power up, all registers are reset to zero. This feature provides extra flexibility to the system designer and is especially valuable in simplifying state-machine initialization. To ensure a valid power-up reset, it is important that the rise of VCC be monotonic. Following power-up reset, a low-to-high clock transition must not occur until all applicable input and feedback setup times are met. VCC 5V 4V tpd† (600 ns TYP, 1000 ns MAX) VOH Active Low Registered Output 1.5 V VOL tsu‡ CLK 1.5 V 1.5 V tw † ‡ This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data. This is the setup time for input or feedback. Figure 2. Power-Up Reset Waveforms 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VIH VIL OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 fmax SPECIFICATIONS fmax without feedback, see Figure 3 In this mode, data is presented at the input to the flip-flop and clocked through to the Q output with no feedback. Under this condition, the clock period is limited by the sum of the data setup time and the data hold time (tsu + th). However, the minimum fmax is determined by the minimum clock period (tw high + tw low). 1 1 Thus, f max without feedback + or (t . (t whigh ) t wlow) su ) t h) CLK LOGIC ARRAY C1 1D tsu + th or tw high + tw low Figure 3. fmax Without Feedback fmax with internal feedback, see Figure 4 This configuration is most popular in counters and on-chip state-machine designs. The flip-flop inputs are defined by the device inputs and flip-flop outputs. Under this condition, the period is limited by the internal delay from the flip-flop outputs through the internal feedback and logic array to the inputs of the next flip-flop. 1 . Thus, f max with internal feedback + (t su ) t pd CLK * to * FB) Where tpd CLK-to-FB is the deduced value of the delay from CLK to the input of the logic array. CLK LOGIC ARRAY C1 1D tsu tpd CLK - to - FB Figure 4. fmax With Internal Feedback POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 fmax SPECIFICATIONS fmax with external feedback, see Figure 5 This configuration is a typical state-machine design with feedback signals sent off-chip. This external feedback could go back to the device inputs or to a second device in a multi-chip state machine. The slowest path defining the period is the sum of the clock-to-output time and the input setup time for the external signals (tsu + tpd CLK-to-Q). 1 Thus, f max with external feedback + (t ) t CLK * to * Q) . su pd CLK LOGIC ARRAY NEXT DEVICE C1 1D tsu tpd CLK - to - Q tsu Figure 5. fmax With External Feedback 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 PARAMETER MEASUREMENT INFORMATION 5V S1 R1 From Output Under Test Test Point CL (see Note A) R2 LOAD CIRCUIT FOR 3-STATE OUTPUTS Timing Input 1.5 V 1.5 V (0.3 V) [0] Data Input (3.5 V) [3 V] 1.5 V 1.5 V (0.3 V) [0] (3.5 V) [3 V] VOH 1.5 V VOL tpd tpd 1.5 V VOH 1.5 V VOL (3.5 V) [3 V] 1.5 V Waveform 1 S1 Closed (see Note B) 1.5 V (0.3 V) [0] ten tpd 1.5 V 1.5 V (0.3 V) [0] Output Control (low-level enabling) (0.3 V) [0] In-Phase Output 1.5 V VOLTAGE WAVEFORMS PULSE DURATIONS 1.5 V tpd (0.3 V) [0] (3.5 V) [3 V] Low-Level Pulse 1.5 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Input 1.5 V tw th tsu Out-of-Phase Output (see Note D) (3.5 V) [3 V] High-Level Pulse (3.5 V) [3 V] tdis 1.5 V tdis ten Waveform 2 S1 Open (see Note B) ≈ 3.3 V VOL +0.5 V VOL VOH 1.5 V VOH −0.5 V ≈0V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses have the following characteristics: For C suffix, use the voltage levels indicated in parentheses ( ), PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%; For M suffix, use the voltage levels indicated in brackets [ ], PRR ≤ 10 MHz, tr and tf ≤ 2 ns, duty cycle = 50% D. When measuring propagation delay times of 3-state outputs, switch S1 is closed. E. Equivalent loads may be used for testing. Figure 6. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs FREE - AIR TEMPERATURE PROPAGATION DELAY TIME vs SUPPLY VOLTAGE 8 220 7 Propagation Delay Time − ns I CC − Supply Current − mA 200 180 160 140 120 100 −75 6 tPHL (I, I/O to O, I/O) 5 tPLH (I, I/O to O, I/O) 4 tPHL (CLK to Q) 3 tPLH (CLK to Q) TA = 25 ° C CL = 50 pF R1 = 200 Ω R2 = 390 Ω 1 Output Switching 2 1 −50 −25 0 25 50 75 100 TA − Free - Air Temperature − ° C 0 4.5 125 4.75 5 5.25 VCC − Supply Voltage − V Figure 7 Figure 8 PROPAGATION DELAY TIME vs FREE - AIR TEMPERATURE PROPAGATION DELAY TIME vs LOAD CAPACITANCE 8 16 6 tPLH (I, I/O to O, I/O) 5 4 tPHL (CLK to Q) 3 2 1 0 −75 tPLH (CLK to Q) VCC = 5 V CL = 50 pF R1 = 200 Ω R2 = 390 Ω 1 Output Switching −50 VCC = 5 V TA = 25 ° C R1 = 200 Ω R2 = 390 Ω 1 Output Switching 14 tPHL (I, I/O to O, I/O) Propagation Delay Time − ns Propagation Delay Time − ns 7 12 10 8 tPLH (CLK to Q) tPHL (CLK to Q) 6 tPHL (I, I/O to O, I/O) 4 tPLH (I, I/O to O, I/O) 2 −25 0 25 50 75 100 TA − Free - Air Temperature − ° C 125 0 0 Figure 9 18 5.5 100 200 300 400 500 CL − Load Capacitance − pF Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 600 OBSOLETE - No Longer Available TIBPAL16L8-7C, TIBPAL16R4-7C, TIBPAL16R6-7C, TIBPAL16R8-7C TIBPAL16L8-10M, TIBPAL16R4-10M, TIBPAL16R6-10M, TIBPAL16R8-10M HIGH-PERFORMANCE IMPACT-X™ PAL® CIRCUITS SRPS006E − D3115, MAY 1988 − REVISED DECEMBER 2010 TYPICAL CHARACTERISTICS POWER DISSIPATION vs FREQUENCY 8 - BIT COUNTER MODE PROPAGATION DELAY TIME† vs NUMBER OF OUTPUTS SWITCHING − Skew Between Outputs Switching − ns 1000 900 TA = 0 ° C TA = 25 ° C 800 TA = 80 ° C 700 t skew P − Power Dissipation − mW D VCC = 5 V 600 1 4 10 40 0.8 VCC = 5 V TA = 25 ° C R1 = 200 Ω R2 = 390 Ω CL = 50 pF 8-Bit Counter 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 100 2 3 F − Frequency − MHz 4 5 6 7 Number of Outputs Switching Figure 11 8 Figure 12 PROPAGATION DELAY TIME vs NUMBER OF OUTPUTS SWITCHING 8 7 Propagation Delay Time − ns tPHL (I, I/O to O, I/O) 6 tPLH (I, I/O to O, I/O) 5 tPHL (CLK to Q) 4 3 tPLH (CLK to Q) 2 VCC = 5 V TA = 25 ° C CL = 50 pF R1 = 200 Ω R2 = 390 Ω 1 0 0 1 2 3 4 5 6 Number of Outputs Switching 7 8 Figure 13 †Outputs switching in the same direction (tPLH compared to tPLH/tPHL to tPHL) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 OBSOLETE - No Longer Available TI Authorized TI North American Sales North American Offices Distributors ALABAMA: Huntsville: (205) 837-7530 ARIZONA: Phoenix: (602) 995-1007 CALIFORNIA: Irvine: (714) 660-1200 San Diego: (619) 278-9600 Santa Clara: (408) 980-9000 Woodland Hills: (818) 704-8100 COLORADO: Aurora: (303) 368-8000 CONNECTICUT: Wallingford: (203) 269-0074 FLORIDA: Altamonte Springs: (407) 260-2116 Fort Lauderdale: (305) 973-8502 Tampa: (813) 885-7588 GEORGIA: Norcross: (404) 662-7967 ILLINOIS: Arlington Heights: (708) 640-3000 INDIANA: Carmel: (317) 573-6400 Fort Wayne: (219) 489-4697 KANSAS: Overland Park: (913) 451-4511 MARYLAND: Columbia: (410) 964-2003 MASSACHUSETTS: Waltham: (617) 895-9100 MICHIGAN: Farmington Hills: (313) 553-1581 MINNESOTA: Eden Prairie: (612) 828-9300 MISSOURI: St. Louis: (314) 821-8400 NEW JERSEY: Iselin: (908) 750-1050 NEW MEXICO: Albuquerque: (505) 345-2555 NEW YORK: East Syracuse: (315) 463-9291 Fishkill: (914) 897-2900 Melville: (516) 454-6600 Pittsford: (716) 385-6770 NORTH CAROLINA: Charlotte: (704) 527-0930 Raleigh: (919) 876-2725 OHIO: Beachwood: (216) 765-7258 Beavercreek: (513) 427-6200 OREGON: Beaverton: (503) 643-6758 PENNSYLVANIA: Blue Bell: (215) 825-9500 PUERTO RICO: Hato Rey: (809) 753-8700 TEXAS: Austin: (512) 250-6769 Dallas: (214) 917-1264 Houston: (713) 778-6592 Midland: (915) 561-7137 UTAH: Salt Lake CIty: (801) 466-8972 WISCONSIN: Waukesha: (414) 798-1001 CANADA: Nepean: (613) 726-1970 Richmond Hill: (416) 884-9181 St. Laurent: (514) 335-8392 TI Regional Technology Centers CALIFORNIA: Irvine: (714) 660-8140 Santa Clara: (408) 748-2222 GEORGIA: Norcross: (404) 662-7945 ILLINOIS: Arlington Heights: (708) 640-2909 INDIANA: Indianapolis: (317) 573-6400 MASSACHUSETTS: Waltham: (617) 895-9196 MEXICO: Mexico City: 491-70834 MINNESOTA: Minneapolis: (612) 828-9300 TEXAS: Dallas: (214) 917-3881 CANADA: Nepean: (613) 726-1970 Alliance Electronics, Inc. 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MASSACHUSETTS: Anthem (508) 657-5170; Arrow/Schweber (508) 658-0900; Hall-Mark (508) 667-0902; Marshall (508) 658-0810; Wyle (617) 272-7300; Zeus (617) 246-8200. MICHIGAN: Detroit: Arrow/Schweber (313) 462-2290; Hall-Mark (313) 416-5800; Marshall (313) 525-5850; Newark (313) 967-0600. MINNESOTA: Anthem (612) 944-5454; Arrow/Schweber (612) 941-5280; Hall-Mark (612) 881-2600; Marshall (612) 559-2211. MISSOURI: Arrow/Schweber (314) 567-6888; Hall-Mark (314) 291-5350; Marshall (314) 291-4650. NEW JERSEY: Anthem (201) 227-7960; Arrow/Schweber (201) 227-7880, (609) 596-8000; Hall-Mark (201) 515-3000, (609) 235-1900; Marshall (201) 882-0320, (609) 234-9100. NEW MEXICO: Alliance (505) 292-3360. NEW YORK: Long Island: Anthem (516) 864-6600; Arrow/Schweber (516) 231-1000; Hall-Mark (516) 737-0600; Marshall (516) 273-2424; Zeus (914) 937-7400. Rochester: Arrow/Schweber (716) 427-0300; Hall-Mark (716) 425-3300; Marshall (716) 235-7620. Syracuse: Marshall (607) 785-2345. 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TEXAS: Austin: Arrow/Schweber (512) 835-4180; Hall-Mark (512) 258-8848; Marshall (512) 837-1991; Wyle (512) 345-8853; Dallas: Anthem (214) 238-7100; Arrow/Schweber (214) 380-6464; Hall-Mark (214) 553-4300; Marshall (214) 233-5200; Wyle (214) 235-9953; Zeus (214) 783-7010; Houston: Arrow/Schweber (713) 530-4700; Hall-Mark (713) 781-6100; Marshall (713) 467-1666; Wyle (713) 879-9953. UTAH: Anthem (801) 973-8555; Arrow/Schweber (801) 973-6913; Marshall (801) 973-2288; Wyle (801) 974-9953. WASHINGTON: Almac/Arrow (206) 643-9992, Anthem (206) 483-1700; Marshall (206) 486-5747; Wyle (206) 881-1150. WISCONSIN: Arrow/Schweber (414) 792-0150; Hall-Mark (414) 797-7844; Marshall (414) 797-8400. CANADA: Calgary: Future (403) 235-5325; Edmonton: Future (403) 438-2858; Montreal: Arrow/Schweber (514) 421-7411; Future (514) 694-7710; Marshall (514) 694-8142 Ottawa: Arrow/Schweber (613) 226-6903; Future (613) 820-8313. Quebec: Future (418) 897-6666. Toronto: Arrow/Schweber (416) 670-7769; Future (416) 612-9200; Marshall (416) 458-8046. Vancouver: Arrow/Schweber (604) 421-2333; Future (604) 294-1166. TI Die Processors Chip Supply Elmo Semiconductor Minco Technology Labs (407) 298-7100 (818) 768-7400 (512) 834-2022 Customer Response Center TOLL FREE: OUTSIDE USA: (800) 336-5236 (214) 995-6611 (8:00 a.m. − 5:00 p.m. CST) D0892 ©1992 Texas Instruments Incorporated Printed in U.S.A. SRPS006D PACKAGE OPTION ADDENDUM www.ti.com 5-May-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-85155172A OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 5962-8515517RA OBSOLETE CDIP J 20 TBD Call TI Call TI -55 to 125 5962-8515517SA OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 5962-85155182A NRND LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596285155182A TIBPAL16 R8-10MFKB 5962-8515518RA NRND CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8515518RA TIBPAL16R8-10M JB 5962-8515518SA NRND CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8515518SA TIBPAL16R8-10M WB 5962-85155192A OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 5962-8515519RA OBSOLETE CDIP J 20 TBD Call TI Call TI -55 to 125 5962-8515519SA OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 5962-85155202A OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 5962-8515520RA OBSOLETE CDIP J 20 TBD Call TI Call TI -55 to 125 5962-8515520SA OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 TIBPAL16L8-10MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 596285155172A TIBPAL16 L8-10MFKB TIBPAL16L8-10MJB OBSOLETE CDIP J 20 TBD A42 N / A for Pkg Type -55 to 125 5962-8515517RA TIBPAL16L8-10M JB TIBPAL16L8-10MWB OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 5962-8515517SA TIBPAL16L8-10M WB TIBPAL16L8-7CFN ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-245C-168 HR 0 to 75 16L8-7 TIBPAL16L8-7CN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 75 TIBPAL16L8-7CN TIBPAL16R4-10MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 5-May-2015 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TIBPAL16R4-10MJB OBSOLETE CDIP J 20 TBD Call TI Call TI -55 to 125 TIBPAL16R4-10MWB OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 TIBPAL16R4-7CFN OBSOLETE PLCC FN 20 TBD Call TI Call TI 0 to 75 TIBPAL16R4-7CN OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 75 TIBPAL16R6-10MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 596285155192A TIBPAL16 R6-10MFKB TIBPAL16R6-10MJB OBSOLETE CDIP J 20 TBD Call TI Call TI -55 to 125 5962-8515519RA TIBPAL16R6-10M JB TIBPAL16R6-10MWB OBSOLETE CFP W 20 TBD Call TI Call TI -55 to 125 5962-8515519SA TIBPAL16R6-10M WB TIBPAL16R6-7CFN OBSOLETE PLCC FN 20 TBD Call TI Call TI 0 to 75 16R6-7 TIBPAL16R6-7CN OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 75 TIBPAL16R6-7CN TIBPAL16R8-10MFKB NRND LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596285155182A TIBPAL16 R8-10MFKB TIBPAL16R8-10MJB NRND CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8515518RA TIBPAL16R8-10M JB TIBPAL16R8-10MWB NRND CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8515518SA TIBPAL16R8-10M WB TIBPAL16R8-7CFN OBSOLETE PLCC FN 20 TBD Call TI Call TI 0 to 75 TIBPAL16R8-7CN OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 75 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-May-2015 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 MECHANICAL DATA MPLC004A – OCTOBER 1994 FN (S-PQCC-J**) PLASTIC J-LEADED CHIP CARRIER 20 PIN SHOWN Seating Plane 0.004 (0,10) 0.180 (4,57) MAX 0.120 (3,05) 0.090 (2,29) D D1 0.020 (0,51) MIN 3 1 19 0.032 (0,81) 0.026 (0,66) 4 E 18 D2 / E2 E1 D2 / E2 8 14 0.021 (0,53) 0.013 (0,33) 0.007 (0,18) M 0.050 (1,27) 9 13 0.008 (0,20) NOM D/E D2 / E2 D1 / E1 NO. OF PINS ** MIN MAX MIN MAX MIN MAX 20 0.385 (9,78) 0.395 (10,03) 0.350 (8,89) 0.356 (9,04) 0.141 (3,58) 0.169 (4,29) 28 0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58) 0.191 (4,85) 0.219 (5,56) 44 0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66) 0.291 (7,39) 0.319 (8,10) 52 0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20) 0.341 (8,66) 0.369 (9,37) 68 0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91) 84 1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45) 4040005 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. 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