TLE2426MDREP

  

    
     SGLS345 − JUNE 2006 D Controlled Baseline D D D D D D D D D Excellent Output Regulation − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† One-Half VI Virtual Ground for Analog Systems Micropower Operation . . . 170 µA Typ, VI = 5 V Wide VI Range . . . 4 V to 40 V High Output-Current Capability − Source . . . 20 mA Typ − Sink . . . 20 mA Typ D D − −102 µV Typ at IO = 0 mA to −10 mA − 49 µV Typ at IO = 0 mA to 10 mA Low-Impedance Output . . . 0.0075 Ω Typ Noise Reduction Pin † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. D PACKAGE (TOP VIEW) OUT COMMON IN NC − description/ordering information 1 8 2 7 3 6 4 5 NOISE REDUCTION NC NC NC NC − No internal connection In signal-conditioning applications utilizing a single power source, a reference voltage equal to one-half the supply voltage is required for termination of all analog signal grounds. TI presents a precision virtual ground whose output voltage is always equal to one-half the input voltage—the TLE2426 rail splitter. 10 VI VI VO V V + I O 2 8 Voltage − V The unique combination of a high-performance, micropower operational amplifier and a precisiontrimmed divider on a single silicon chip results in a precise VO/VI ratio of 0.5 while sinking and sourcing current. The TLE2426 provides a lowimpedance output with 20 mA of sink and source capability, while drawing less than 280 µA of supply current over the full input range of 4 V to 40 V. A designer need not pay the price in terms of board space for a conventional signal ground consisting of resistors, capacitors, operational amplifiers, and voltage references. For increased performance, the 8-pin package provides a noise-reduction pin. With the addition of an external capacitor (CNR), peak-to-peak noise is reduced, while line ripple rejection is improved. INPUT/OUTPUT TRANSFER CHARACTERISTICS 6 VO 4 2 0 0 0.25 0.5 0.75 1 t − Time − s Initial output tolerance for a single 5-V or 12-V system is better than 1% over the full 40-V input range. Ripple rejection exceeds 12 bits of accuracy. Whether the application is for a data-acquisition front end, analog signal termination, or simply a precision voltage reference, the TLE2426 eliminates a major source of system error. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2006 Texas Instruments Incorporated  
 
  !   "#$ %!& %   "! "! '! ! 
!( ! %% )*& % "!+ %!  !!$* $%! !+  $$ "!!& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 
  

    
     SGLS345 − JUNE 2006 ORDERING INFORMATION PACKAGE† TA ORDERABLE PART NUMBER TOP-SIDE MARKING −55°C to 125°C SOIC (D) Tape and reel TLE2426MDREP 2426EP † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Continuous input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V Continuous filter trap voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA Duration of short-circuit current at (or below) 25°C (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Operating junction temperature, TJ (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Lead temperature 1,6 mm (1/16 in) from case for 10 s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 2. Long-term high-temperature storage and/or usage at the absolute maximum ratings may result in a reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging. DISSIPATION RATING TABLE PACKAGE TA ≤ 25 25°C C POWER RATING D 1102 mV DERATING FACTOR ABOVE TA = 25°C 10.3 mW/°C TA = 70 70°C C POWER RATING TA = 85 85°C C POWER RATING TA = 125 125°C C POWER RATING 638.5 mW 484 mW 72.1 mW recommended operating conditions Input voltage, VI Operating free-air temperature, TA 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN MAX 4 40 UNIT V −55 125 °C 
  

    
     SGLS345 − JUNE 2006 electrical characteristics at specified free-air temperature, VI = 5 V, IO = 0 (unless otherwise noted) PARAMETER Output voltage TEST CONDITIONS VI = 4 V VI = 5 V 25°C 25 C VI = 40 V VI = 5 V Full range Temperature coefficient of output voltage VI = 5 V Supply current No load TA† VI = 4 to 40 V Output voltage regulation (sinking current)‡ IO = 0 to − 10 mA TYP MAX 1.98 2 2.02 2.48 2.5 2.52 19.8 20 20.2 2.465 25 25°C 170 IO = 0 to 8 mA IO = 0 to 20 mA 350 400 −0.102 ± 0.7 25°C −0.121 ± 1.4 25°C 0.049 ± 0.5 0.175 ± 1.4 22.5 ± 10 ± 10 Full range Output impedance‡ 25°C 7.5 Noise-reduction impedance 25°C 110 Short-circuit current Output noise voltage, rms Sinking current, VO = 5 V VO to 0.1%, IO = ± 10 mA Output voltage current step response VO to 0.01%, IO = ± 10 mA Step response VI = 0 to 5 V, VO to 0.1% VI = 0 to 5 V, VO to 0.01% µA mV mV mΩ kΩ 26 25°C Sourcing current, VO = 0 f = 10 Hz to 10 kHz 300 25°C 25°C V ppm/°C Full range Full range IO = 0 to − 20 mA IO = 0 to 10 mA UNIT 2.535 Full range 25°C Output voltage regulation (sourcing current)‡ MIN CNR = 0 CNR = 1 µF CL = 0 CL = 100 pF CL = 0 CL = 100 pF CL = 100 pF −47 120 25°C 30 mA µV V 290 25°C 275 400 25°C 25°C µss 390 20 120 µs † Full range is −55°C to 125°C. ‡ The listed values are not production tested. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 
  

    
     SGLS345 − JUNE 2006 electrical characteristics at specified free-air temperature, VI = 12 V, IO = 0 (unless otherwise noted) PARAMETER Output voltage TEST CONDITIONS VI = 4 V VI = 12 V 25°C 25 C VI = 40 V VI = 12 V Full range Temperature coefficient of output voltage VI = 12 V Supply current TA† No load VI = 4 to 40 V IO = 0 to − 10 mA Output voltage regulation (sinking current)‡ IO = 0 to 8 mA IO = 0 to 20 mA TYP MAX 1.98 2 2.02 5.95 6 6.05 19.8 20 20.2 5.925 35 25°C 195 350 400 −1.48 ±10 −3.9 ±10 25°C 2.27 ±10 ±10 4.3 ±10 22.5 Output impedance‡ 25°C 7.5 Noise-reduction impedance 25°C 110 Short-circuit current Output noise voltage, rms CNR = 1 µF Output voltage current step response VO to 0.01%, IO = ± 10 mA Step response 25°C CNR = 0 VO to 0.1%, IO = ± 10 mA VI = 0 to 12 V, VO to 0.1% VI = 0 to 12 V, VO to 0.01% CL = 0 CL = 100 pF CL = 0 CL = 100 pF CL = 100 pF † Full range is −55°C to 125°C. ‡ The listed values are not production tested. 4 POST OFFICE BOX 655303 mV mV mΩ kΩ 31 Sourcing current, VO = 0 f = 10 Hz to 10 kHz µA ±10 25°C Full range Sinking current, VO = 12 V ppm/°C 25°C 25°C V 300 Full range Full range IO = 0 to − 20 mA IO = 0 to 10 mA UNIT 6.075 Full range 25°C Output voltage regulation (sourcing current)‡ MIN • DALLAS, TEXAS 75265 −70 120 25°C 30 mA µV V 290 25°C 275 400 25°C 25°C µss 390 12 120 µs 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Output voltage Distribution Output voltage change vs Free-air temperature 3 Output voltage error vs Input voltage 4 vs Input voltage 5 Input bias current 1, 2 vs Free-air temperature 6 Output voltage regulation vs Output current 7 Output impedance vs Frequency 8 Short-circuit output current vs Input voltage 9, 10 vs Free-air temperature 11, 12 Ripple rejection vs Frequency 13 Spectral noise voltage density vs Frequency 14 Output voltage response to output current step vs Time 15 Output voltage power-up response vs Time 16 Output current vs Load capacitance 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS† DISTRIBUTION OF OUTPUT VOLTAGE DISTRIBUTION OF OUTPUT VOLTAGE 3 Percentage of Units − % Percentage of Units − % 2.5 40 98 Units Tested From 2 Wafer Lots VI = 5 V TA = 25°C 2 1.5 1 98 Units Tested From 2 Wafer Lots VI = 12 V TA = 25°C 30 20 10 0.5 0 2.48 0 2.49 2.5 2.51 VO − Output Voltage − V 2.52 6.05 6.075 6.025 VO − Output Voltage − V 6 Figure 1 Figure 2 OUTPUT VOLTAGE ERROR vs INPUT VOLTAGE OUTPUT VOLTAGE CHANGE vs FREE-AIR TEMPERATURE 4 150 IO = 0 TA = 25°C IO = 0 3 75 Output Voltage Error − % VO − Output Voltage Change − mV ∆V O VI = 40 V VI = 12 V 0 VI = 4 V, 5 V Error Equals VO / VI Deviation From 50% 2 1 −75 0 −150 −75 −1 −50 −25 0 25 50 75 100 125 0 4 TA − Free-Air Temperature − °C 8 12 16 20 24 28 32 VI − Input Voltage − V Figure 3 Figure 4 † Data at high and low temperatures are applicable within the rated operating free-air temperature ranges of the various devices. 6 6.1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 36 40 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS† INPUT BIAS CURRENT vs INPUT VOLTAGE INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 300 300 IO = 0 VI = 40 V 250 TA = 25°C IIB I IB − Input Bias Current − µ A IIB I IB − Input Bias Current − µ A 250 200 TA = − 55°C 150 TA = 125°C 100 VI = 12 V 200 VI = 5 V 150 VI = 4 V 100 50 50 IO = 0 0 0 0 5 10 15 20 25 30 35 40 −75 −50 VI − Input Voltage − V OUTPUT VOLTAGE REGULATION vs OUTPUT CURRENT OUTPUT IMPEDANCE vs FREQUENCY 200 VI = 5 V or 12 V IO = 0 TA = 25°C VI = 5 V TA = 25°C 10 z o − Output Impedance − Ω Output Voltage Regulation − µV 100 100 50 0 125 Figure 6 Figure 5 150 75 100 0 25 50 −20 TA − Free-Air Temperature − °C TYP −50 −100 1 0.1 0.01 −150 −200 −20 0.001 0 10 −10 IO − Output Current − mA 20 10 100 1k 10 k 100 k 1M f − Frequency − Hz Figure 7 Figure 8 † Data at high and low temperatures are applicable within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS† SHORT-CIRCUIT OUTPUT CURRENT vs INPUT VOLTAGE SHORT-CIRCUIT OUTPUT CURRENT vs INPUT VOLTAGE 40 VO = GND (Output Sourcing) IOS I OS − Short-Circuit Output Current − mA IOS I OS − Short-Circuit Output Current − mA 0 −20 −40 TA = − 55°C −60 TA = 125°C TA = 25°C TA = 25°C TA = − 55°C 30 TA = 125°C 20 10 VO = VI (Output Sinking) 0 −80 0 5 10 15 20 25 30 35 0 40 5 Figure 9 25 30 40 VI = 40 V VO = GND (Output Sourcing) VI = 4 V −20 −30 VI = 5 V −40 −50 VI = 12 V −60 −70 VI = 40 V −50 −25 0 25 50 75 100 125 VI = 12 V 30 VI = 5 V VI = 4 V 20 10 VO = VI (Output Sinking) 0 −75 −50 TA − Free-Air Temperature − °C −25 0 25 50 75 TA − Free-Air Temperature − °C Figure 12 Figure 11 † Data at high and low temperatures are applicable within the rated operating free-air temperature ranges of the various devices. 8 35 40 IOS I OS − Short-Circuit Output Current − mA IOS I OS − Short-Circuit Output Current − mA 20 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE 0 −80 −75 15 Figure 10 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE −10 10 VI − Input Voltage − V VI − Input Voltage − V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 100 125 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS RIPPLE REJECTION vs FREQUENCY SPECTRAL NOISE VOLTAGE DENSITY vs FREQUENCY 400 VI = 5 V or 12 V ∆VI(PP) = 1 V IO = 0 TA = 25°C 90 Ripple Rejection − dB 80 Vn − Spectral Noise Voltage Density − nV/ Hz 100 CNR = 1 µF 70 60 50 40 30 20 CNR = 0 10 VI = 5 V or 12 V TA = 25°C 300 200 100 CNR = 0 CNR = 1 µF 0 0 10 100 1k 10 k 100 k 10 1 1M 100 1k f − Frequency − Hz f − Frequency − Hz Figure 13 Figure 14 OUTPUT VOLTAGE RESPONSE TO OUTPUT CURRENT STEP 10 k OUTPUT VOLTAGE POWER-UP RESPONSE 3 1.5 V 0.1% 3 0.1% VI = 5 V CL = 100 pF TA = 25°C Output Voltage Response 2 1 0.01% 0 0.01% −1 −2 10 mA −3 IO Step 0.01% 2.5 VV) O − Output Voltage − V 4 ∆V VO O − Change In Output Voltage − mV 100 k 0.1% 2 1.5 IO = 0 CL = 100 pF TA = 25°C 1 0.5 0 5 Input Voltage Step −4 −10 mA −1.5 V 0 1000 2000 3000 0 0 4000 Time − µs 50 100 150 200 Time − µs Figure 16 Figure 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 
  

    
     SGLS345 − JUNE 2006 TYPICAL CHARACTERISTICS STABILITY RANGE OUTPUT CURRENT vs LOAD CAPACITANCE 20 15 VI = 5 V TA = 25°C Unstable I O − Output Current − mA 10 5 0 Stable −5 −10 −15 −20 10 −6 10 −5 10 −4 10 −3 10 −2 10 −1 10 0 CL− Load Capacitance − mF Figure 17 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 1 10 2 
  

    
     SGLS345 − JUNE 2006 MACROMODEL INFORMATION * * * * TLE2426 OPERATIONAL AMPLIFIER “MACROMODEL” SUBCIRCUIT CREATED USING PARTS RELEASE 4.03 0N 08/21/90 AT 13:51 REV (N/A) SUPPLY VOLTAGE: 5 V CONNECTIONS: FILTER | INPUT * | | COMMON * | | | OUTPUT * | | | | .SUBCKT TLE2426 1 3 4 5 C1 C2 C3 CPSR DCM + DCM − DC DE DLP DLN DP ECMR EGND EPSR ENSE FB GA GCM GPSR GRC1 GRC2 GRE1 GRE2 HLIM HCMR IRP IEE IIO I1 Q1 Q2 R2 RCM REE RN1 RN2 RO1 RO2 VCM + VCM − VB VC VE VLIM VLP VLN VPSR RFB RIN1 RIN2 .MODEL DX .MODEL QX .ENDS 11 12 21.66E−12 6 7 30.00E−12 87 0 10.64E−9 85 86 15.9E−9 81 82 DX 83 81 DX 5 53 DX 54 5 DX 90 91 DX 92 90 DX 4 3 DX 84 99 (2,99) 1 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 85 0 POLY(1) (3,4) −16.22E − 6 3.24E − 6 89 2 POLY(1) (88,0) 120E − 6 1 7 99 POLY(6) VB VC VE VLP VLN VPSR 0 74.8E6 − 10E6 10E6 6 0 11 12 320.4E − 6 0 6 10 99 1.013E − 9 85 86 (85,86) 100E − 6 4 11 (4,11) 3.204E − 4 4 12 (4,12) 3.204E − 4 13 10 (13,10) 1.038E − 3 14 10 (14,10) 1.038E − 3 90 0 VLIM 1K 80 1 POLY(2) VCM+ VCM − 0 1E2 1E2 3 4 146E − 6 3 10 DC 24.05E − 6 2 0 .2E − 9 88 0 1E − 21 11 89 13 QX 12 80 14 QX 6 9 100.0E3 84 81 1K 10 99 8.316E6 87 0 2.55E8 87 88 11.67E3 8 5 63 7 99 62 82 99 1.0 83 99 − 2.3 9 0 DC 0 3 53 DC 1.400 54 4 DC 1.400 7 8 DC 0 91 0 DC 30 0 92 DC 30 0 86 DC 0 5 2 1K 3 1 220K 1 4 220K D(IS=800.OE−18) PNP(IS=800.OE− 18 BF=480) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10E6 − 10E6 74E6 11 PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device TLE2426MDREP Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLE2426MDREP SOIC D 8 2500 350.0 350.0 43.0 Pack Materials-Page 2 PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated