TMUX1219DCKR

Order Now Product Folder Technical Documents Support & Community Tools & Software TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 TMUX1219 5-V Bidirectional, 2:1 General Purpose Switch 1 Features 3 Description • • • • • • • • • • • The TMUX1219 is a general purpose complementary metal-oxide semiconductor (CMOS) single-pole double-throw (SPDT) switch. The TMUX1219 switches between two source inputs based on the state of the SEL pin. Wide operating supply of 1.08 V to 5.5 V allows for use in a broad array of applications from personal electronics to building automation. The device supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from GND to VDD. A low supply current of 4 nA enables use in portable applications. 1 Rail to rail operation Bidirectional signal path 1.8 V Logic compatible Fail-safe logic Low on-resistance: 3 Ω Wide supply range: 1.08 V to 5.5 V -40°C to +125°C Operating temperature Low supply current: 4 nA Transition time: 14 ns Break-before-make switching ESD protection HBM: 2000 V All logic inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. 2 Applications • • • • • • • • • • • • Analog and Digital Switching I2C and SPI bus Multiplexing Remote Radio Units Barcode scanner Motor drives Building automation Analog input module Power delivery Video surveillance Electronic point of sale Appliances Consumer audio Device Information(1) PART NUMBER TMUX1219 Unity Gain R SPACER SPACER SPACER Block Diagram TMUX1219 Output S1 S1 D S2 TLV900 1 1.8 V SEL TMUX121 9 2.90 mm x 1.60 mm SPACER SPACER R S2 SOT-23 (6) SPACER D Inve rting BODY SIZE (NOM) 2.00 mm × 1.25 mm (1) For all available packages, see the package option addendum at the end of the data sheet. Application Example Input PACKAGE SC70 (6) SEL 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 7 1 1 1 2 3 4 Absolute Maximum Ratings ...................................... 4 ESD Ratings.............................................................. 4 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 4 Electrical Characteristics (VDD = 5 V ±10 %) ............ 5 Electrical Characteristics (VDD = 3.3 V ±10 %) ......... 7 Electrical Characteristics (VDD = 1.8 V ±10 %) ......... 9 Electrical Characteristics (VDD = 1.2 V ±10 %) ....... 11 Typical Characteristics ............................................ 13 Parameter Measurement Information ................ 14 7.1 7.2 7.3 7.4 7.5 7.6 7.7 On-Resistance ........................................................ Off-Leakage Current ............................................... On-Leakage Current ............................................... Transition Time ....................................................... Break-Before-Make ................................................. Charge Injection ...................................................... Off Isolation ............................................................. 14 14 15 15 16 16 17 7.8 Crosstalk ................................................................. 17 7.9 Bandwidth ............................................................... 18 8 Detailed Description ............................................ 19 8.1 8.2 8.3 8.4 9 Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ Truth Tables ............................................................ 19 19 19 19 Application and Implementation ........................ 20 9.1 Application Information............................................ 20 9.2 Typical Application ................................................. 20 10 Power Supply Recommendations ..................... 22 11 Layout................................................................... 23 11.1 Layout Guidelines ................................................. 23 11.2 Layout Example .................................................... 23 12 Device and Documentation Support ................. 24 12.1 12.2 12.3 12.4 12.5 12.6 Documentation Support ........................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 24 24 24 24 24 24 13 Mechanical, Packaging, and Orderable Information ........................................................... 24 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (May 2019) to Revision A Page • Changed the DBV package status From: Product Preview To Production Data ................................................................... 1 • Added Thermal information for DBV package........................................................................................................................ 4 2 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 5 Pin Configuration and Functions DCK Package 6-Pin SC70 Top View DBV Package 6-Pin SOT-23 Top View SEL 1 6 S2 VDD 2 5 D GND 3 4 S1 SEL 1 6 S2 VDD 2 5 D GND 3 4 S1 Not to scale Not to scale Pin Functions PIN NAME NO. TYPE (1) DESCRIPTION SEL 1 I Select pin: controls state of the switch according to Table 1. (Logic Low = S1 to D, Logic High = S2 to D) VDD 2 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. GND 3 P Ground (0 V) reference S1 4 I/O Source pin 1. Can be an input or output. D 5 I/O Drain pin. Can be an input or output. S2 6 I/O Source pin 2. Can be an input or output. (1) I = input, O = output, I/O = input and output, P = power Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 3 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted) (1) (2). MIN MAX VDD Supply voltage –0.5 6 VSEL Logic control input pin voltage (SEL) –0.5 6 V ISEL Logic control input pin current (SEL) –30 30 mA VS or VD Source or drain voltage (Sx, D) –0.5 VDD+0.5 IS or ID (CONT) Source or drain continuous current (Sx, D) –30 30 mA Tstg Storage temperature –65 150 °C TJ Junction temperature 150 °C (1) (2) UNIT V V Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. 6.2 ESD Ratings VALUE Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins V(ESD) (1) (2) Electrostatic discharge (1) UNIT ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101 or ANSI/ESDA/JEDEC JS-002, all pins (2) V ±750 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted). MIN VDD Supply voltage VS or VD VSEL TA Ambient temperature NOM MAX UNIT 1.08 5.5 V Signal path input/output voltage (source or drain pin) (Sx, D) 0 VDD V Logic control input pin voltage (SEL) 0 5.5 V –40 125 °C 6.4 Thermal Information TMUX1219 THERMAL METRIC (1) DCK (SC70) DBV (SOT-23) 6 PINS 6 PINS UNIT RθJA Junction-to-ambient thermal resistance 243.1 212.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 206.0 156.7 °C/W RθJB Junction-to-board thermal resistance 128.3 96.5 °C/W ΨJT Junction-to-top characterization parameter 107.8 80.7 °C/W ΨJB Junction-to-board characterization parameter 128.0 96.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 6.5 Electrical Characteristics (VDD = 5 V ±10 %) At TA = 25°C, VDD = 5 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(ON) IS(ON) Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C VDD = 5 V Switch On VD = VS = 4.5 V / 1.5 V Refer to On-Leakage Current 25°C 3 Ω –40°C to +85°C 5 Ω –40°C to +125°C 6 Ω 0.15 –40°C to +85°C –40°C to +125°C Ω 0.4 Ω 1 Ω 1.5 Ω –40°C to +85°C 2 Ω –40°C to +125°C 3 Ω ±5 nA –40°C to +85°C –25 25 nA –40°C to +125°C –40 40 nA ±15 nA –40°C to +85°C –50 50 nA –40°C to +125°C –80 80 nA LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.49 5.5 V VIL Input logic low –40°C to +125°C 0 0.87 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 1.5 µA When VS is 4.5 V, VD is 1.5 V or when VS is 1.5 V, VD is 4.5 V. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 5 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com Electrical Characteristics (VDD = 5 V ±10 %) (continued) At TA = 25°C, VDD = 5 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Switching time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 12 –40°C to +85°C –40°C to +125°C 8 ns 18 ns 19 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –10 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF 6 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 6.6 Electrical Characteristics (VDD = 3.3 V ±10 %) At TA = 25°C, VDD = 3.3 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(ON) IS(ON) Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C VDD = 3.3 V Switch On VD = VS = 3 V / 1 V Refer to On-Leakage Current 25°C 5 Ω –40°C to +85°C 10 Ω –40°C to +125°C 12 Ω 0.15 Ω –40°C to +85°C 1 Ω –40°C to +125°C 1 Ω 3.5 Ω –40°C to +85°C 4 Ω –40°C to +125°C 5 Ω ±5 nA –40°C to +85°C –25 25 nA –40°C to +125°C –40 40 nA ±15 nA –40°C to +85°C –50 50 nA –40°C to +125°C –80 80 nA LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.35 5.5 V VIL Input logic low –40°C to +125°C 0 0.8 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current -40°C to 125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 0.8 µA When VS is 3 V, VD is 1 V or when VS is 1 V, VD is 3 V. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 7 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com Electrical Characteristics (VDD = 3.3 V ±10 %) (continued) At TA = 25°C, VDD = 3.3 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Switching time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 14 –40°C to +85°C –40°C to +125°C 9 ns 20 ns 21 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –6 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF 8 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %) At TA = 25°C, VDD = 1.8 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON IS(OFF) ID(ON) IS(ON) On-resistance matching between channels Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current 25°C VDD = 1.98 V Switch On VD = VS = 1.62 V / 1 V Refer to On-Leakage Current 25°C 40 Ω –40°C to +85°C 80 Ω –40°C to +125°C 80 Ω 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω ±5 nA –40°C to +85°C –25 25 nA –40°C to +125°C –40 40 nA ±15 nA –40°C to +85°C –50 50 nA –40°C to +125°C –80 80 nA LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.07 5.5 V VIL Input logic low –40°C to +125°C 0 0.68 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.001 µA 0.6 µA When VS is 1.62 V, VD is 1 V or when VS is 1 V, VD is 1.62 V. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 9 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com Electrical Characteristics (VDD = 1.8 V ±10 %) (continued) At TA = 25°C, VDD = 1.8 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 28 –40°C to +85°C –40°C to +125°C 16 ns 44 ns 44 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –3 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF 10 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %) At TA = 25°C, VDD = 1.2 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON IS(OFF) ID(ON) IS(ON) On-resistance matching between channels Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current 25°C VDD = 1.32 V Switch On VD = VS = 1 V / 0.8 V Refer to On-Leakage Current 25°C 70 Ω –40°C to +85°C 105 Ω –40°C to +125°C 105 Ω 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω ±5 nA –40°C to +85°C –25 25 nA –40°C to +125°C –40 40 nA ±15 nA –40°C to +85°C –50 50 nA –40°C to +125°C –80 80 nA LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 0.96 5.5 V VIL Input logic low –40°C to +125°C 0 0.36 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 0.5 µA When VS is 1 V, VD is 0.8 V or when VS is 0.8 V, VD is 1 V. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 11 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com Electrical Characteristics (VDD = 1.2 V ±10 %) (continued) At TA = 25°C, VDD = 1.2 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 55 –40°C to +85°C –40°C to +125°C 28 ns 190 ns 190 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –2 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF 12 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 6.9 Typical Characteristics at TA = 25°C, VDD = 5 V (unless otherwise noted) 80 10 VDD = 1.08V 8 On Resistance (:) On Resistance (:) 60 40 VDD = 1.62 V TA = 125qC TA = 85qC 6 4 20 2 VDD = 3 V VDD = 4.5 V TA = -40qC 0 0 0.5 1 1.5 2 2.5 3 3.5 Source or Drain Voltage (V) 4 4.5 5 0 0.5 1 1.5 2 Source or Drain Voltage (V) D001 TA = 25°C Figure 1. On-Resistance vs Source or Drain Voltage 3 D002 Figure 2. On-Resistance vs Source or Drain Voltage 30 25 400 20 300 Time (ns) Supply Current (PA) 2.5 VDD = 3 V 500 200 VDD = 3.3 V Rising 15 Falling 10 VDD = 5 V 100 5 0 0 0.5 1 1.5 2 2.5 3 3.5 Logic Voltage (V) 4 4.5 0 0.5 5 1.5 D003 TA = 25°C 2.5 3.5 VDD - Supply Voltage (V) 4.5 5.5 D004 TA = 25°C Figure 3. Supply Current vs Logic Voltage Figure 4. Ttransition vs Supply Voltage 0 0 -10 -1 -20 -2 -30 Gain (dB) Magnitude (dB) TA = 25qC 0 -40 -50 -60 -3 -4 -5 -6 -70 -7 -80 -90 100k -8 1M 10M Frequency (Hz) 1M 100M D005 TA = 25°C 10M Frequency (Hz) 100M D006 TA = 25°C Figure 5. Crosstalk and Off-Isolation vs Frequency Figure 6. Frequency Response Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 13 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 7 Parameter Measurement Information 7.1 On-Resistance The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (D) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance. The measurement setup used to measure RON is shown in Figure 7. Voltage (V) and current (ISD) are measured using this setup, and RON is computed with RON = V / ISD: V ISD Sx D VS Figure 7. On-Resistance Measurement Setup 7.2 Off-Leakage Current Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is off. This current is denoted by the symbol IS(OFF). The setup used to measure off-leakage current is shown in Figure 8. VDD VDD Is (OFF) A S1 D S2 VS VD GND Figure 8. Off-Leakage Measurement Setup 14 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 7.3 On-Leakage Current Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch is on. This current is denoted by the symbol IS(ON). Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is on. This current is denoted by the symbol ID(ON). Either the source pin or drain pin is left floating during the measurement. Figure 9 shows the circuit used for measuring the on-leakage current, denoted by IS(ON) or ID(ON). VDD VDD VDD VDD IS (ON) ID (ON) S1 N.C. S1 A D D A S2 N.C. S2 Vs VS VS VD GND GND Figure 9. On-Leakage Measurement Setup 7.4 Transition Time Transition time is defined as the time taken by the output of the device to rise or fall 10% after the logic control signal has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 10 shows the setup used to measure transition time, denoted by the symbol tTRANSITION. VDD 0.1…F VDD VDD Log ic Control (VSEL) tf < 5ns tr < 5ns VIH VIL VS 0V S1 D OUTPUT S2 RL CL tTRAN SITION tTRAN SITION SEL 90% OUTPUT VSEL 10% GND 0V Figure 10. Transition-Time Measurement Setup Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 15 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 7.5 Break-Before-Make Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is switching. The output first breaks from the on-state switch before making the connection with the next on-state switch. The time delay between the break and the make is known as break-before-make delay. Figure 11 shows the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM). VDD 0.1…F VDD VDD Logic Control (VSEL) tr < 5ns tf < 5ns S1 VS D OUTPUT S2 0V RL CL 90% Output tBBM 1 SEL tBBM 2 0V VSEL tOPEN (BBM) = min ( tBBM 1, tBBM 2) GND Figure 11. Break-Before-Make Delay Measurement Setup 7.6 Charge Injection The TMUX1219 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QC. Figure 12 shows the setup used to measure charge injection from Drain (D) to Source (Sx). VSS VDD 0.1…F 0.1…F VSS VDD VDD S2 VSEL VD N.C. D S1 OUTPUT VOUT 0V CL Output VOUT VS QC = CL × SEL VOUT VSEL GND Figure 12. Charge-Injection Measurement Setup 16 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 7.7 Off Isolation Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to the source pin (Sx) of an off-channel. Figure 13 shows the setup used to measure, and the equation used to calculate off isolation. 0.1µF NETWORK VDD ANALYZER VS 50Q S VSIG D VOUT RL 50Q SX GND RL 50Q Figure 13. Off Isolation Measurement Setup Off Isolation §V · 20 ˜ Log ¨ OUT ¸ © VS ¹ (1) 7.8 Crosstalk Crosstalk is defined as the ratio of the signal at the drain pin (D) of a different channel, when a signal is applied at the source pin (Sx) of an on-channel. Figure 14 shows the setup used to measure, and the equation used to calculate crosstalk. 0.1µF NETWORK VDD ANALYZER S1 VOUT RL D 50Q VS RL S2 50Q 50Q VSIG GND Figure 14. Crosstalk Measurement Setup Channel-to-Channel Crosstalk §V · 20 ˜ Log ¨ OUT ¸ © VS ¹ (2) Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 17 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 7.9 Bandwidth Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the device. Figure 15 shows the setup used to measure bandwidth. 0.1µF NETWORK VDD VS ANALYZER 50Q S VSIG D VOUT RL SX 50Q GND RL 50Q Figure 15. Bandwidth Measurement Setup 18 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 8 Detailed Description 8.1 Functional Block Diagram The TMUX1219 is an 2:1 (SPDT), 1-channel switch where the input is controlled with a single select (SEL) control pin. TMUX1219 S1 D S2 SEL Figure 16. TMUX1219 Functional Block Diagram 8.2 Feature Description 8.2.1 Bidirectional Operation The TMUX1219 conducts equally well from source (Sx) to drain (D) or from drain (D) to source (Sx). The device has very similar characteristics in both directions and supports both analog and digital signals. 8.2.2 Rail to Rail Operation The valid signal path input/output voltage for TMUX1219 ranges from GND to VDD. 8.2.3 1.8 V Logic Compatible Inputs The TMUX1219 has 1.8-V logic compatible control for the logic control input (SEL). The logic input threshold scales with supply but still provides 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level inputs allow the TMUX1219 to interface with processors that have lower logic I/O rails and eliminates the need for an external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations refer to Simplifying Design with 1.8 V logic Muxes and Switches 8.2.4 Fail-Safe Logic The TMUX1219 supports Fail-Safe Logic on the control input pin (SEL) allowing for operation up to 5.5 V, regardless of the state of the supply pin. This feature allows voltages on the control pin to be applied before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic feature allows the select pin of the TMUX1219 to be ramped to 5.5 V while VDD = 0 V. Additionally, the feature enables operation of the TMUX1219 with VDD = 1.2 V while allowing the select pin to interface with a logic level of another device up to 5.5 V. 8.3 Device Functional Modes The select (SEL) pin of the TMUX1219 controls which source channel is connected to the drain of the device. When a signal path is not selected, that source pin is in high impedance mode (HI-Z). The control pin can be as high as 5.5 V. 8.4 Truth Tables Table 1. TMUX1219 Truth Table CONTROL LOGIC (SEL) Selected Source (Sx) Connected To Drain (D) Pin 0 S1 1 S2 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 19 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TMUX12xx family offers good system performance across a wide operating supply (1.08V to 5.5V). These devices include 1.8V logic compatible control input pins that enable operation in systems with 1.8V I/O rails. Additionally, the control input pin supports Fail-Safe Logic which allows for operation up to 5.5V, regardless of the state of the supply pin. This protection stops the logic pins from back-powering the supply rail. These features of the TMUX12xx, a family of general purpose multiplexers and switches, reduce system complexity, board size, and overall system cost. 9.2 Typical Application 9.2.1 Switchable Operational Amplifier Gain Setting One example application of the TMUX1219 is to change an Op Amp from unity gain setting to an inverting amplifier configuration. Utilizing a switch allows a system to have a configurable gain and allows the same architecture to be utilized across the board for various inputs to the system. Figure 17 shows the TMUX1219 configured for gain setting application. Input R Unity Gain S1 Inve rting S2 R Output D TLV900 1 1.8 V SEL TMUX121 9 Figure 17. Switchable Op Amp Gain Setting 9.2.1.1 Design Requirements This design example uses the parameters listed in Table 2. Table 2. Design Parameters 20 PARAMETERS VALUES Input Signal 0 V to 2.75 V Mux Supply (VDD) 2.75 V Op Amp Supply (V+/ V-) ±2.75 V Mux I/O signal range 0 V to VDD (Rail to Rail) Control logic thresholds 1.8 V compatible (up to 5.5V) Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 9.2.1.2 Detailed Design Procedure The application shown in Figure 17 demonstrates how to use a single control input and toggle between gain settings of -1 and +1. If switching between inverting and unity gain is not required, the TMUX1219 can be utilized in the feedback path to select different feedback resistors and provide scalable gain settings for configurable signal conditioning. The TMUX1219 can be operated without any external components except for the supply decoupling capacitors. The select pin is recommended to have a weak pull-down or pull-up resistor to ensure the input is in a known state. All inputs to the switch must fall within the recommend operating conditions of the TMUX1219 including signal range and continuous current. For this design with a supply of 2.75 V the signal range can be 0 V to 2.75 V and the max continuous current can be 30 mA. 9.2.1.3 Application Curve 80 VDD = 1.08V On Resistance (:) 60 40 VDD = 1.62 V 20 VDD = 3 V VDD = 4.5 V 0 0 0.5 1 1.5 2 2.5 3 3.5 Source or Drain Voltage (V) 4 4.5 5 D001 TA = 25°C Figure 18. On-Resistance vs Source or Drain Voltage 9.2.2 Input Control for Power Amplifier Another application of the TMUX1219 is for input control of a power amplifier. Utilizing a switch allows a system to control when the DAC is connected to the power amplifier, and can stop biasing the power amplifier by switching the gate to GND. Figure 19 shows the TMUX1219 configured for control of the power amplifier. RF Input RF Output 5V TMUX1219 0V DAC 1.8 V SEL Figure 19. Input Control of Power Amplifier Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 21 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 9.2.2.1 Design Requirements This design example uses the parameters listed in Table 2. Table 3. Design Parameters PARAMETERS VALUES Supply (VDD) 5V Mux I/O signal range 0 V to VDD (Rail to Rail) Control logic thresholds 1.8 V compatible (up to 5.5V) 9.2.2.2 Detailed Design Procedure The application shown in Figure 19 demonstrates how to toggle between the DAC output and GND for control of a power amplifier using a single control input. The DAC output is utilized to bias the gate of the power amplifier and can be disconnected from the circuit using the select pin of the switch. The TMUX1219 can support 1.8-V logic signals on the control input, allowing the device to interface with low logic controls of an FPGA or MCU. The TMUX1219 can be operated without any external components except for the supply decoupling capacitors. The select pin is recommended to have a weak pull-down or pull-up resistor to ensure the input is in a known state. All inputs to the switch must fall within the recommend operating conditions of the TMUX1219 including signal range and continuous current. For this design with a supply of 5 V the signal range can be 0 V to 5 V and the max continuous current can be 30 mA. 9.2.2.3 Application Curve A key parameter for this application is the transition time of the device. Faster transition time allows the system to toggle between input sources at a faster rate and allows the output to settle to the final value. The TMUX1219 has a transition time that varies with supply voltage and is shown in Figure 20 30 25 Time (ns) 20 Rising 15 Falling 10 5 0 0.5 1.5 2.5 3.5 VDD - Supply Voltage (V) 4.5 5.5 D004 TA = 25°C Figure 20. Ttransition vs Supply Voltage 10 Power Supply Recommendations The TMUX1219 operates across a wide supply range of 1.08 V to 5.5 V. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Power-supply bypassing improves noise margin and prevents switching noise propagation from the VDD supply to other components. Good power-supply decoupling is important to achieve optimum performance. For improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD to ground. Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall inductance and is beneficial for connections to ground planes. 22 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 TMUX1219 www.ti.com SCDS409A – MAY 2019 – REVISED JUNE 2020 11 Layout 11.1 Layout Guidelines 11.1.1 Layout Information When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners. Figure 21 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections. BETTER BEST 2W WORST 1W min. W Figure 21. Trace Example Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, throughhole pins are not recommended at high frequencies. Figure 22 illustrates an example of a PCB layout with the TMUX1219. Some key considerations are: • • • • Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD supply. Keep the input lines as short as possible. Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup. Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary. 11.2 Layout Example Via to GND plane TMUX1219 Wide (low inductance) trace for power C Figure 22. TMUX1219 Layout Example Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 23 TMUX1219 SCDS409A – MAY 2019 – REVISED JUNE 2020 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation Texas Instruments, Improve Stability Issues with Low CON Multiplexers. Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches. Texas Instruments, Eliminate Power Sequencing with Powered-off Protection Signal Switches. Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers. 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Community Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.4 Trademarks E2E is a trademark of Texas Instruments. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 24 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TMUX1219 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TMUX1219DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 26IT TMUX1219DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1F5 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of