TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
150-mW STEREO AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
DESCRIPTION
150-mW Stereo Output
Wide Range of Supply Voltages
– Fully Specified for 3.3-V and 5-V Operation
– Operational From 2.5 V to 5.5 V
Thermal and Short-Circuit Protection
Surface-Mount Packaging
– PowerPAD™ MSOP
– SOIC
Standard Operational Amplifier Pinout
D OR DGN PACKAGE
(TOP VIEW)
VO1
IN1–
IN1+
GND
1
8
2
7
3
6
4
5
VDD
VO2
IN2–
IN2+
The TPA112 is a stereo audio power amplifier packaged in an 8-pin PowerPAD™ MSOP package
capable of delivering 150 mW of continuous RMS
power per channel into 8-Ω loads. Amplifier gain is
externally configured by means of two resistors per
input channel and does not require external compensation for settings of 1 to 10.
THD+N when driving an 8-Ω load from 5 V is 0.1% at
1 kHz, and less than 2% across the audio band of 20
Hz to 20 kHz. For 32-Ω loads, the THD+N is reduced
to less than 0.06% at 1 kHz, and is less than 1%
across the audio band of 20 Hz to 20 kHz. For 10-kΩ
loads, the THD+N performance is 0.01% at 1 kHz,
and less than 0.02% across the audio band of 20 Hz
to 20 kHz.
FUNCTIONAL BLOCK DIAGRAM
RF
CI
RI
LIN−
CI
VDD
8
VO1
1
Short-Circuit
Protection
RI
LIN+
2
IN1−
3
IN1+
VDD
CC
RO
RC
RF
To Headphone
Jack
(See TPA152)
VDD/2
CI
RIN−
CI
RI
RF
6
IN2−
5
IN2+
VO2
RO
RI
RIN+
CC
7
Over-Temperature
Protection
RC
4
RF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2004, Texas Instruments Incorporated
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICES
(1)
MSOP
SYMBOLIZATION
TA
SMALL OUTLINE (1)
(D)
MSOP (1)
(DGN)
–40°C to 85°C
TPA112D
TPA112DGN
TI AAD
The D and DGN packages are available in left-ended tape and reel only (e.g., TPA112DR,
TPA112DGNR).
Terminal Functions
TERMINAL
NAME
I/O
NO.
DESCRIPTION
GND
4
I
GND is the ground connection.
IN1-
2
I
IN1- is the inverting input for channel 1.
IN1+
3
I
IN1+ is the noninverting input for channel 1.
IN2-
6
I
IN2- is the inverting input for channel 2.
IN2+
5
I
IN2+ is the noninverting input for channel 2.
VDD
8
I
VDD is the supply voltage terminal.
VO1
1
O
VO1 is the audio output for channel 1.
VO2
7
O
VO2 is the audio output for channel 2.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
UNIT
VDD
Supply voltage
VI
Differential input voltage
6V
II
Input current
±2.5 µA
IO
Output current
±250 mA
–0.3 V to VDD + 0.3 V
Continuous total power dissipation
Internally llimited
TJ
Operating junction temperature range
–40°C to 150°C
Tstg
Storage temperature range
–65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
260°C
Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
(1)
2
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
377 mW
DGN
2.14 W (1)
17.1 mW/°C
1.37 W
1.11 W
See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(SLMA002), for more information on the PowerPAD package. The thermal data was measured on a
PCB layout based on the information in the section entitled Texas Instruments Recommended Board
for PowerPAD, of that document.
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
VDD
Supply voltage
2.5
5.5
UNIT
V
TA
Operating free-air temperature
–40
85
°C
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 3.3 V
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
VOO
Output offset voltage
10
PSRR
Power supply rejection ratio
IDD(q)
Supply current
1.5
ZI
Input impedance
>1
VDD = 3.2 V to 3.4 V
83
UNIT
mV
dB
3
mA
MΩ
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 8 Ω
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
70 (1)
mW
PO
Output power (each channel)
THD ≤ 0.1%
THD+N
Total harmonic distortion + noise
PO = 70 mW, 20 Hz–20 kHz
BOM
Maximum output power BW
G = 10, THD < 5%
Phase margin
Open loop
58°
Supply ripple rejection
f = 1 kHz
68
dB
86
dB
SVRR
Channel/channel output separation
f = 1 kHz
SNR
Signal-to-noise ratio
PO = 100 mW
Vn
Noise output voltage
(1)
2%
> 20
kHz
100
dB
9.5
µV(rms)
Measured at 1 kHz
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 5 V
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
VOO
Output offset voltage
PSRR
Power supply rejection ratio
IDD(q)
Supply current
1.5
ZI
Input impedance
>1
VDD = 4.9 V to 5.1 V
UNIT
10
mV
3
mA
76
dB
MΩ
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL = 8 Ω
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
70 (1)
mW
PO
Output power (each channel)
THD ≤ 0.1%
THD+N
Total harmonic distortion + noise
PO = 150 mW, 20 Hz–20 kHz
BOM
Maximum output power BW
G = 10, THD < 5%
Phase margin
Open loop
56°
Supply ripple rejection
f = 1 kHz
68
dB
Channel/channel output separation
f = 1 kHz
86
dB
SNR
Signal-to-noise ratio
PO = 150 mW
Vn
Noise output voltage
SVRR
(1)
2%
> 20
kHz
100
dB
9.5
µV(rms)
Measured at 1 kHz
3
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 32 Ω
TYP MAX
UNIT
PO
Output power (each channel)
PARAMETER
THD ≤ 0.1%
40 (1)
mW
THD+N
Total harmonic distortion + noise
PO = 30 mW, 20 Hz–20 kHz
0.5%
BOM
Maximum output power BW
G = 10, THD < 2%
> 20
Phase margin
Open loop
58°
Supply ripple rejection
f = 1 kHz
68
dB
86
dB
SVRR
TEST CONDITIONS
Channel/channel output separation
f = 1 kHz
SNR
Signal-to-noise ratio
PO = 100 mW
Vn
Noise output voltage
(1)
MIN
kHz
100
dB
9.5
µV(rms)
Measured at 1 kHz
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL = 32 Ω
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
mW
PO
Output power (each channel)
THD ≤ 0.1%
40 (1)
THD+N
Total harmonic distortion + noise
PO = 60 mW, 20 Hz–20 kHz
0.4%
BOM
Maximum output power BW
G = 10, THD < 2%
> 20
Phase margin
Open loop
56°
Supply ripple rejection
f = 1 kHz
68
dB
Channel/channel output separation
f = 1 kHz
86
dB
SNR
Signal-to-noise ratio
PO = 150 mW
100
dB
Vn
Noise output voltage
9.5
µV(rms)
SVRR
(1)
4
Measured at 1 kHz
kHz
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
THD+N
Total harmonic distortion plus noise
1, 2, 4, 5, 7, 8, 10, 11,
13, 14, 16, 17, 34, 36
vs Frequency
vs Output power
3, 6, 9, 12, 15, 18
PSSR
Power supply rejection ratio
vs Frequency
Vn
Output noise voltage
vs Frequency
19, 20
21, 22
Crosstalk
vs Frequency
23-26, 37, 38
Mute attenuation
vs Frequency
27, 28
Open-loop gain
vs Frequency
29, 30
Phase margin
vs Frequency
29, 30
Phase
vs Frequency
39-44
Output power
vs Load resistance
31, 32
ICC
Supply current
vs Supply voltage
33
SNR
Signal-to-noise ratio
vs Voltage gain
35
Closed-loop gain
vs Frequency
39-44
Power dissipation/amplifier
vs Output power
45, 46
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
1
10
VDD = 3.3 V
PO = 30 mW
CB = 1 µ F
RL = 32 Ω
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
AV = 5
AV = 10
0.1
AV = 1
0.01
0.001
20
100
1k
f − Frequency − Hz
Figure 1.
10k 20k
1
0.1
VDD = 3.3 V
AV = 1 V/V
RL = 32 Ω
CB = 1 µ F
PO = 15 mW
PO = 10 mW
0.01
PO = 30 mW
0.001
20
100
1k
10k 20k
f − Frequency − Hz
Figure 2.
5
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
VDD = 3.3 V
RL = 32 Ω
AV = 1 V/V
CB = 1 µF
20 kHz
10 kHz
1
0.1
1 kHz
20 Hz
10
AV = 10 mW
0.1
50
AV = 5 mW
0.01
AV = 1 mW
0.001
20
0.01
1
1
VDD = 5 V
PO = 60 mW
RL = 32 Ω
CB = 1 µF
100
PO − Output Power − mW
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
VDD = 5 V
RL = 32 Ω
AV = 1 V/V
CB = 1 µF
1
PO = 30 mW
PO = 15 mW
0.01
PO = 60 mW
0.001
20
100
1k
f − Frequency − Hz
Figure 5.
6
10k 20k
Figure 3.
10
0.1
1k
f − Frequency − Hz
10k 20k
VDD = 5 V
AV = 1 V/V
RL = 32 Ω
CB = 1 µF
20 kHz
1
10 kHz
0.1
1 kHz
20 Hz
0.01
0.002
0.01
0.1
PO − Output Power − W
Figure 6.
0.2
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
VDD = 3.3 V
RL = 10 kΩ
PO = 100 µF
CB = 1 µF
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
1
AV = 5 mW
0.1
0.01
AV = 2 mW
0.001
20
100
1k
VDD = 3.3 V
RL = 10 kΩ
AV = 1 V/V
CB = 1 µF
1
0.1
PO = 45 µW
0.01
0.001
20
10k 20k
100
f − Frequency − Hz
10k 20k
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
VDD = 3.3 V
RL = 10 k Ω
AV = 1 V/V
CB = 1 µF
1
0.1
20 Hz
10 kHz
0.01
20 Hz
1 kHz
0.001
5
1k
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
PO = 90 µW
PO = 130 µW
10
100
PO − Output Power − µW
Figure 9.
200
1
VDD = 5 V
RL = 10 kΩ
PO = 300 µW
CB = 1 µF
0.1
AV = 5
AV = 1
0.01
AV = 2
0.001
20
100
1k
10k 20k
f − Frequency − Hz
Figure 10.
7
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
1
10
VDD = 5 V
RL = 10 kΩ
AV = 1 V/V
CB = 1 µF
PO = 300 µW
0.1
PO = 200 µW
0.01
PO = 100 µW
0.001
20
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
VDD = 5 V
RL = 10 kΩ
AV = 1 V/V
CB = 1 µ F
1
0.1
20 Hz
20 kHz
0.01
10 kHz 1 kHz
0.001
100
1k
10k 20k
5
500
Figure 12.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
VDD = 3.3 V
PO = 75 mW
RL = 8 Ω
CB = 1 µF
1
THD+N −Total Harmonic Distortion + Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
100
Figure 11.
2
AV = 5
AV = 2
0.1
AV = 1
0.01
0.001
20
100
1k
f − Frequency − Hz
Figure 13.
8
10
PO − Output Power − µW
f − Frequency − Hz
10k 20k
VDD = 3.3 V
RL = 8 Ω
AV = 1 V/V
PO = 30 mW
1
PO = 15 mW
0.1
0.01
PO = 75 mW
0.001
20
100
1k
f − Frequency − Hz
Figure 14.
10k 20k
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
VDD = 3.3 V
RL = 8 Ω
AV = 1 V/V
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N −Total Harmonic Distortion + Noise − %
10
20 kHz
10 kHz
1
1 kHz
0.1
20 Hz
0.01
10m
0.1
0.3
2
VDD = 5 V
PO = 100 mW
RL = 8 Ω
CB = 1 µF
1
AV = 1
0.01
0.001
20
100
10k 20k
Figure 15.
Figure 16.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
10
THD+N −Total Harmonic Distortion + Noise − %
THD+N −Total Harmonic Distortion + Noise − %
1k
f − Frequency − Hz
10
VDD = 5 V
RL = 8 kΩ
AV = 1 V/V
PO = 30 mW
1
PO = 60 mW
0.01
PO = 10 mW
0.001
20
AV = 5
0.1
PO − Output Power − W
0.1
AV = 2
100
1k
f − Frequency − Hz
Figure 17.
10k 20k
VDD = 5 V
RL = 8 Ω
AV = 1 V/V
20 kHz
1
10 kHz
1 kHz
0.1
20 Hz
0.01
10m
0.1
1
PO − Output Power − W
Figure 18.
9
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
0
VDD = 3.3 V
RL = 8 Ω to 10 kΩ
−10
−20
CB = 0.1 µF
−30
CB = 1 µF
−40
−50
−60
CB = 2 µF
−70
Bypass = 1.65 V
−80
−90
−100
20
100
1k
PSRR − Power Supply Rejection Ratio − dB
PSRR − Power Supply Rejection Ratio − dB
0
VDD = 5 V
RL = 8 Ω to 10 kΩ
−10
−20
CB = 0.1 µF
−30
CB = 1 µF
−40
−50
CB = 2 µF
−60
−70
−80
−90
Bypass = 2.5 V
−100
20
10k 20k
100
f − Frequency − Hz
Figure 19.
Figure 20.
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
Vn − Output Noise Voltage − µV
Vn − Output Noise Voltage − µV
10
VDD = 3.3 V
BW = 10 Hz to 22 kHz
AV = 1 V/V
RL = 8 Ω to 10 kΩ
100
1k
f − Frequency − Hz
Figure 21.
10
10k 20k
20
20
1
20
1k
f − Frequency − Hz
10k 20k
10
VDD = 5 V
BW = 10 Hz to 22 kHz
RL = 8 Ω to 10 kΩ
AV = 1 V/V
1
20
100
1k
f − Frequency − Hz
Figure 22.
10k 20k
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−50
−60
−70
Crosstalk − dB
−75
−60
−65
−80
IN2 TO OUT1
−85
−90
−95
−70
−75
IN2 TO OUT1
−80
−85
−100
IN1 TO OUT2
−90
IN1 TO OUT2
−105
−110
20
PO = 100 mW
VDD = 3.3 V
RL = 8 Ω
CB = 1 µF
AV = 1 V/V
−55
Crosstalk − dB
−65
PO = 25 mW
VDD = 3.3 V
RL = 32 Ω
CB = 1 µF
AV = 1 V/V
−95
−100
100
1k
10k 20k
20
100
f − Frequency − Hz
Figure 23.
Figure 24.
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−60
10k 20k
−50
VDD = 5 V
PO = 25 mW
CB = 1 µF
RL = 32 Ω
AV = 1 V/V
−65
−75
−80
−85
−55
−60
−65
Crosstalk − dB
−65
Crosstalk − dB
1k
f − Frequency − Hz
IN2 TO OUT1
−90
−95
VDD = 5 V
PO = 100 mW
CB = 1 µF
RL = 8 Ω
AV = 1 V/V
−70
IN2 TO OUT1
−75
−80
−85
−100
−90
IN1 TO OUT2
IN1 TO OUT2
−105
−110
20
−95
100
1k
10k 20k
−100
20
100
1k
f − Frequency − Hz
f − Frequency − Hz
Figure 25.
Figure 26.
10k 20k
11
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
MUTE ATTENUATION
vs
FREQUENCY
MUTE ATTENUATION
vs
FREQUENCY
0
Mute Attenuation − dB
−20
−20
−30
−40
−50
−60
−70
−30
−40
−50
−60
−70
−80
−80
−90
−90
−100
20
VDD = 5 V
CB = 1 µF
RL = 32 Ω
−10
Mute Attenuation − dB
−10
0
VDD = 3.3 V
RL = 32 Ω
CB = 1 µF
100
1k
−100
20
10k 20k
100
f − Frequency − Hz
1k
f − Frequency − Hz
Figure 27.
Figure 28.
OPEN-LOOP GAIN AND PHASE MARGIN
vs
FREQUENCY
150°
VDD = 3.3 V
TA = 25°C
No Load
Open-Loop Gain − dB
80
Phase
60
40
90°
60°
Gain
20
30°
0
0°
−20
100
1k
10k
100k
f − Frequency − Hz
Figure 29.
12
120°
1M
−30°
10M
φ m − Phase Margin
100
10k 20k
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
OPEN-LOOP GAIN AND PHASE MARGIN
vs
FREQUENCY
100
150°
VDD = 5 V
TA = 25°C
No Load
120°
Phase
60
40
90°
60°
Gain
20
30°
0
0°
−20
100
1k
10k
100k
φ m − Phase Margin
Open-Loop Gain − dB
80
−30°
10M
1M
f − Frequency − Hz
.
.
Figure 30.
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
LOAD RESISTANCE
300
120
THD+N = 1 %
VDD = 3.3 V
AV = 1 V/V
250
PO − Output Power − mW
PO − Output Power − mW
100
THD+N = 1 %
VDD = 5 V
AV = 1 V/V
80
60
40
200
150
100
50
20
0
0
8
16
24
32
40
48
RL − Load Resistance − Ω
Figure 31.
56
64
8
16
24
32
40
48
56
64
RL − Load Resistance − Ω
Figure 32.
13
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
THD+N − Total Harmonic Distortion Plus Noise − %
1.4
I DD − Supply Current − mA
1.2
1
0.8
0.6
0.4
0.2
0
2.5
3
3.5
4
4.5
5
1
VI = 1 V
AV = 1 V/V
RL = 10 kΩ
CB = 1 µF
0.1
0.01
0.001
5.5
20
100
Figure 34.
SIGNAL-TO-NOISE RATIO
vs
VOLTAGE GAIN
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
THD+N − Total Harmonic Distortion Plus Noise − %
VI = 1 V
SNR − Signal−to−Ratio − dB
102
100
98
96
94
92
2
3
4
5
6
7
AV − Voltage Gain − V/V
Figure 35.
14
10k 20k
Figure 33.
104
1
1k
f − Frequency − Hz
VDD − Supply Voltage − V
8
9
10
1
VDD = 5 V
AV = 1 V/V
RL = 10 kΩ
CB = 1 µF
0.1
0.01
0.001
20
100
1k
f − Frequency − Hz
Figure 36.
10k 20k
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−60
−60
−70
−80
Crosstalk − dB
−90
−100
IN2 to OUT1
−110
−90
−100
−120
IN2 to OUT1
−110
−120
−130
−130
IN1 to OUT2
−140
IN1 to OUT2
−140
−150
−150
100
1k
20
10k 20k
100
f − Frequency − Hz
1k
10k 20k
f − Frequency − Hz
Figure 37.
Figure 38.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
Phase
160°
140°
Phase
20
120°
Closed−Loop Gain − dB
Crosstalk − dB
−80
VDD = 5 V
VO = 1 V
RL = 10 kΩ
CB = 1 µF
−70
VDD = 3.3 V
VO = 1 V
RL = 10 kΩ
CB = 1 µF
VDD = 3.3 V
RI = 20 kΩ
RF = 20 kΩ
RL = 32 Ω
CI = 1 µF
AV = −1 V/V
30
20
10
100°
80°
Gain
0
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 39.
15
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
Phase
Phase
Closed−Loop Gain − dB
120°
VDD = 5 V
RI = 20 kΩ
RF = 20 kΩ
RL = 32 Ω
CI = 1 µF
AV = −1 V/V
30
100°
80°
20
10
Gain
0
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 40.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
Phase
140°
Closed−Loop Gain − dB
120°
VDD = 3.3 V
RI = 20 kΩ
RF = 20 kΩ
RL = 8 Ω
CI = 1 µF
AV = −1 V/V
40
80°
60°
Gain
20
0
−20
10
100
1k
10k
f − Frequency − Hz
Figure 41.
16
100°
100k
1M
Phase
160°
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
160°
140°
Phase
180°
Phase
Closed−Loop Gain − dB
120°
VDD = 3.3 V
RI = 20 kΩ
RF = 20 kΩ
RL = 10 kΩ
CI = 1 µF
AV = −1 V/V
30
20
10
100°
80°
Gain
0
−10
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 42.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
Phase
Closed−Loop Gain − dB
140°
VDD = 5 V
RI = 20 kΩ
RF = 20 kΩ
RL = 8 Ω
CI = 1 µF
AV = −1 V/V
120°
Phase
160°
100°
80°
60°
40°
Gain
20
0
−20
10
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 43.
17
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
200°
180°
160°
140°
120°
VDD = 5 V
RI = 20 kΩ
RF = 20 kΩ
RL = 10 kΩ
CI = 1 µF
AV = −1 V/V
30
100°
80°
Phase
Closed−Loop Gain − dB
Phase
20
10
Gain
0
−10
10
100
1k
100k
10k
1M
f − Frequency − Hz
Figure 44.
POWER DISSIPATION/AMPLIFIER
vs
OUTPUT POWER
POWER DISSIPATION/AMPLIFIER
vs
OUTPUT POWER
80
180
VDD = 3.3 V
VDD = 5 V
8Ω
70
140
Amplifier Power − mW
Amplifier Power − mW
60
50
40
16 Ω
30
32 Ω
20
120
100
16 Ω
80
60
32 Ω
40
64 Ω
10
64 Ω
20
0
0
0
20
40
60
80 100 120 140 160 180
Load Power − mW
Figure 45.
18
8Ω
160
200
0
20
40
60
80 100 120 140 160 180
Load Power − mW
Figure 46.
200
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
APPLICATION INFORMATION
GAIN SETTING RESISTORS, RF and RI
The gain for the TPA112 is set by resistors RF and RI according to Equation 1.
Gain
RF
RI
(1)
Given that the TPA112 is an MOS amplifier, the input impedance is high. Consequently, input leakage currents
are not generally a concern, although noise in the circuit increases as the value of RF increases. In addition, a
certain range of RF values is required for proper start-up operation of the amplifier. Taken together, it is
recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and
20 kΩ. The effective impedance is calculated in Equation 2.
R FR I
Effective Impedance
RF RI
(2)
As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier
would be -1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the
recommended range.
For high-performance applications, metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole
formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 3.
1
f co(lowpass)
2 R F CF
(3)
For example, if RF is 100 kΩ and CF is 5 pF then fco(lowpass) is 318 kHz, which is well outside the audio range.
INPUT CAPACITOR, CI
In the typical application, input capacitor CI is required to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in Equation 4.
1
f co(highpass)
2 R I CI
(4)
The value of CI is important to consider, as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where RI is 20 kΩ and the specification calls for a flat bass response down to 20 Hz.
Equation 4 is reconfigured as Equation 5.
1
CI
2 R I f co(highpass)
(5)
In this example, CI is 0.4 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and
the feedback resistor (RF) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
that reduces useful headroom, especially in high-gain applications (> 10). For this reason a low-leakage tantalum
or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at VDD/2, which is likely higher
that the source dc level. It is important to confirm the capacitor polarity in the application.
19
TPA112
www.ti.com
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
POWER SUPPLY DECOUPLING, CS
The TPA112 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor; typically, 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.
MIDRAIL VOLTAGE
The TPA112 is a single-supply amplifier; so, it must be properly biased to accommodate audio signals. Normally,
the amplifier is biased at VDD/2, but it can actually be biased at any voltage between VDD and ground. However,
biasing the amplifier at a point other than VDD/2 reduces the amplifier's maximum output swing. In some
applications where the circuitry driving the TPA112 has a different midrail voltage, it might make sense to use the
same midrail voltage for the TPA112, and possibly eliminate the use of the dc-blocking capacitors.
The two concerns with the midrail voltage source are the amount of noise present and its output impedance. Any
noise present on the midrail voltage source that is not present on the audio input signal will be input to the
amplifier, and passed to the output (and increased by the gain of the circuit). Common-mode noise is cancelled
out by the differential configuration of the circuit.
The output impedance of the circuit used to generate the midrail voltage needs to be low enough so as not to be
influenced by the audio signal path. A common method of generating the midrail voltage is to form a voltage
divider from the supply to ground, with a bypass capacitor from the common node to ground. This capacitor
improves the PSRR of the circuit. However, this circuit has a limited range of output impedances; so, to achieve
low output impedances, the voltage generated by the voltage divider is fed into a unity-gain amplifier to lower the
output impedance of the circuit.
VDD
VDD
R
R
+
_
Midrail
CBYPASS
R
CBYPASS
a) Midrail Voltage Generator Using a Simple
Resistor-Divider
TLV2460
Midrail
R
b) Buffered Midrail Voltage Generator to Provide
Low Output Impedance
Figure 47. Midrail Voltage Generator
If a voltage step is applied to a speaker, it causes a noise pop. To reduce popping, the midrail voltage should
rise at a subsonic rate. That is, a rate less than the rise time of a 20-Hz waveform. If the voltage rises faster than
that, there is the possibility of a pop from the speaker.
Pop can also be heard in the speaker if the midrail voltage rises faster than the charge of either the input
coupling capacitor or the output coupling capacitor. If midrail rises first, the charging of the input and output
capacitors is heard in the speaker. To keep this noise as low as possible, the relationship shown in Equation 6
should be maintained.
20
TPA112
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SLOS212E – AUGUST 1998 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
1
1
CB RSOURCE CI RI
1
R LC C
(6)
Where CBYPASS is the value of the bypass capacitor, and RSOURCE is the equivalent source impedance of the
voltage divider (the parallel combination of the two resistors). For example, if the voltage divider is constructed
using two 20-kΩ resistors, then RSOURCE is 10 kΩ.
MIDRAIL BYPASS CAPACITOR, CB
The midrail bypass capacitor CB serves several important functions. During start-up, CB determines the rate at
which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so slow it can
not be heard). The second function is to reduce noise produced by the power supply caused by coupling into the
output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed
from the resistor divider with equivalent resistance of RSOURCE. To keep the start-up pop as low as possible, the
relationship shown in Equation 7 should be maintained.
1
1
C R
CI RI
B
SOURCE
(7)
As an example, consider a circuit where CB is 1 µF, RSOURCE = 160 kΩ, CI is 1 µF, and RI is 20 kΩ. Inserting
these values into the Equation 8 results in:
6.25 50
(8)
which satisfies the rule. Recommended values for bypass capacitor CB are 0.1 µF to 1 µF, ceramic or tantalum
low-ESR, for the best THD and noise performance.
OUTPUT COUPLING CAPACITOR, CC
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (CC) is required to
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
Equation 9.
1
f (out high)
2 R L CC
(9)
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of CC are required to pass low frequencies into the load. Consider the
example where a CC of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the frequency
response characteristics of each configuration.
Table 1. Common Load Impedances vs Low Frequency
Output Characteristics in SE Mode
RL
CC
LOWEST FREQUENCY
32 Ω
68 µF
73 Hz
10,000 Ω
68 µF
0.23 Hz
47,000 Ω
68 µF
0.05 Hz
As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is good.
The output coupling capacitor required in single-supply, SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
• Output Pulldown Resistor, RC + RO
– Placing a 100-Ω resistor, RC, from the output side of the coupling capacitor to ground ensures the coupling
capacitor, CC, is charged before a plug is inserted into the jack. Without this resistor, the coupling capacitor
would charge rapidly upon insertion of a plug, leading to an audible pop in the headphones.
21
TPA112
SLOS212E – AUGUST 1998 – REVISED JUNE 2004
•
www.ti.com
– Placing a 20-kΩ resistor, RO, from the output of the IC to ground ensures that the coupling capacitor fully
discharges at power down. If the supply is rapidly cycled without this capacitor, a small pop may be audible
in 10-kΩ loads.
Using Low-ESR Capacitors
– Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply
as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial
effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real
capacitor behaves like an ideal capacitor.
5-V VERSUS 3.3-V OPERATION
The TPA112 is designed for operation over a supply range of 2.5 V to 5.5 V. This data sheet provides full
specifications for 5-V and 3.3-V operation because these are considered to be the two most common standard
voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain
setting, or stability. The most important consideration is that of output power. Each amplifier in the TPA112 can
produce a maximum voltage swing of VDD – 1 V. This means, for 3.3-V operation, clipping starts to occur when
VO(PP) = 2.3 V, as opposed to VO(PP) = 4 V for 5-V operation. The reduced voltage swing subsequently reduces
maximum output power into the load before distortion begins to become significant.
22
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPA112D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
TPA112
TPA112DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
TPA112
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of