TPA2015D1
SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
TPA2015D1 2-W Constant Output Power Class-D Audio Amplifier With Adaptive Boost
Converter and Battery Tracking Speakerguard™ AGC
1 Features
•
•
•
•
•
•
•
•
•
•
SpeakerGuardTM
Built-In
Automatic Gain Control
(AGC) with Enhanced Battery Tracking
– Limits Battery Current Consumption
– Prevents Audio Clipping
2 W into 8 Ω Load From 3.6 V Supply (6% THD)
Integrated Adaptive Boost Converter
– Increases Efficiency at Low Output Power
Low Quiescent Current of 1.7 mA from 3.6 V
Operates From 2.5 V to 5.2 V
Thermal and Short-Circuit Protection with Auto
Recovery
Three Gain Settings: 6 dB, 15.5 dB, and 20 dB
Independent Control for Boost and Class-D
Pin-to-Pin Compatible with TPA2013D1
Available in 1.954 mm × 1.954 mm 16-ball DSBGA
Package
2 Applications
•
•
Cell Phones, PDA, GPS
Portable Electronics and Speakers
3 Description
The TPA2015D1 is a high efficiency Class-D audio
power amplifier with battery-tracking SpeakerGuard™
AGC technology and an integrated adaptive boost
converter that enhances efficiency at low output
power. It drives up to 2 W into an 8 Ω speaker (6%
THD). With 85% typical efficiency, the TPA2015D1
helps extend battery life when playing audio.
The built-in boost converter generates a 5.5 V
supply voltage for the Class-D amplifier. This
provides a louder audio output than a stand-alone
amplifier directly connected to the battery. The
SpeakerGuardTM AGC adjusts the Class-D gain to
limit battery current and prevent heavy clipping.
The TPA2015D1 has an integrated low-pass filter to
improve the RF rejection and reduce DAC out-of-band
noise, increasing the signal to noise ratio (SNR).
The TPA2015D1 is available in a space saving 1.954
mm × 1.954 mm, 0.5 mm pitch DSBGA package
(YZH).
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPA2015D1
DSBGA (16)
2.0 mm × 2.0 mm
SN012020
DSBGA (16)
2.0 mm x 2.0 mm
(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VBAT
2.2 mF - 10 mF
Differential
Audio Inputs
SW PVOUT PVDD
ININ+
OUT+
Gain Control
GAIN
AGC Control
AGC
Boost Enable
ENB
Class-D Enable
END
TPA2015D1
OUT-
GND
Simplified Application Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPA2015D1
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SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................4
7.5 Electrical Characteristics.............................................5
7.6 Operating Characteristics........................................... 5
7.7 Typical Characteristics................................................ 7
8 Parameter Measurement Information.......................... 10
9 Detailed Description...................................................... 11
9.1 Overview................................................................... 11
9.2 Functional Block Diagram......................................... 11
9.3 Feature Description...................................................11
9.4 Device Functional Modes..........................................17
10 Application and Implementation................................ 19
10.1 Application Information........................................... 19
10.2 Typical Applications................................................ 19
11 Power Supply Recommendations..............................23
11.1 Power Supply Decoupling Capacitors.....................23
12 Layout...........................................................................24
12.1 Layout Guidelines................................................... 24
12.2 Layout Example...................................................... 25
13 Device and Documentation Support..........................26
13.1 Device Support....................................................... 26
13.2 Community Resources............................................27
13.3 Trademarks............................................................. 27
14 Mechanical, Packaging, and Orderable
Information.................................................................... 28
14.1 Package Option Addendum.................................... 29
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (October 2015) to Revision C (June 2022)
Page
• Added SN012020 device to data sheet.............................................................................................................. 1
Changes from Revision A (November 2011) to Revision B (October 2015)
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section................................................................................................................................................................ 1
Changes from Revision * (May 2010) to Revision A (November 2011)
Page
• Changed the Boost Converter, PVOUT entry in the Operating Conditions Table...............................................5
2
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5 Device Comparison Table
DEVICE NUMBER
SPEAKER CHANNELS
SPEAKER AMP TYPE
OUTPUT POWER (W)
PSRR (dB)
TPA2012D2
Stereo
Class D
2.1
71
TPA2015D1
Mono
Class D
2
85
TPA2026D2
Stereo
Class D
3.2
80
TPA2028D1
Mono
Class D
3
80
6 Pin Configuration and Functions
PVDD
PVOUT
SW
GND
A1
A2
A3
A4
OUT+
GAIN
AGC
VBAT
B1
B2
B3
B4
OUT-
GND
END
GND
C1
C2
C3
C4
GND
IN+
IN-
ENB
D1
D2
D3
D4
Figure 6-1. YZH Package 16-Pin DSBGA Top View
Table 6-1. Pin Functions
PIN
NAME
NO.
TYPE(1)
DESCRIPTION
AGC
B3
I
Enable and select AGC.
ENB
D4
I
Enable for the boost converter; set to logic high to enable.
END
C3
I
Enable for the Class-D amplifier; set to logic high to enable.
GAIN
B2
I
Gain selection pin.
GND
A4, C2, C4, D1
P
Ground; all ground balls must be connected for proper functionality.
IN–
D3
I
Negative audio input.
IN+
D2
I
Positive audio input.
OUT–
C1
O
Negative audio output.
OUT+
B1
O
Positive audio output.
PVDD
A1
I
Class-D power stage supply voltage.
PVOUT
A2
O
Boost converter output.
SW
A3
I
Boost and rectifying switch input.
VBAT
B4
P
Supply voltage.
(1)
I = Input, O = Output, P = Power
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage
VBAT
–0.3
6
V
Input Voltage, VI
IN+, IN–
–0.3
VBAT + 0.3
V
Output continuous total power dissipation
See the Section 7.4
Minimum load impedance
6
Ω
Operating free-air temperature, TA
–40
85
°C
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101(2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
Supply voltage, VBAT
2.5
VIH
High–level input voltage, END, ENB
1.3
VIL
Low–level input voltage, END, ENB
TA
Operating free-air temperature
TJ
Operating junction temperature
NOM
MAX
UNIT
5.2
V
V
0.6
V
–40
85
°C
–40
150
°C
7.4 Thermal Information
TPA2015D1
THERMAL METRIC(1)
YZH (DSBGA)
UNIT
16 PINS
RθJA
Junction-to-ambient thermal resistance
75
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
22
°C/W
RθJB
Junction-to-board thermal resistance
26
°C/W
ψJT
Junction-to-top characterization parameter
0.5
°C/W
ψJB
Junction-to-board characterization parameter
25
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
VBAT= 3.6 V, Gain = 6 dB, RAGC = Float, TA = 25°C, RL = 8 Ω + 33 μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
END = 0 V, ENB = VBAT
2.5
5.2
VBAT supply voltage range END = VBAT, ENB = VBAT, AGC options 1, 2, and 3
2.5
5.2
END = VBAT, ENB = VBAT, AGC option 0
2.8
5.2
END = ENB = VBAT, boost converter active
5.2
5.8
V
END = VBAT, ENB = 0 V
3.1
5.25
V
Class-D supply voltage
range
V
VBAT = 2.5 V to 5.2 V, END = ENB = VBAT
85
VBAT = 2.5 V to 5.2 V, END = VBAT, ENB = 0 V
(pass through mode)
75
Operating quiescent
current
END = 0 V, ENB = VBAT
0.5
END = ENB = VBAT
1.7
2.2
mA
Shutdown quiescent
current
VBAT = 2.5 V to 5.2 V, END = ENB = GND
0.2
3
μA
Power supply ripple
rejection
Gain = 6 dB (connect to GND)
Gain control pin voltage
Gain = 15.5 dB (float)
Gain = 20 dB (connect to VBAT)
0.25 × VBAT
0.4 × VBAT
0.6 × VBAT
2
AGC option 1 (inflection = 3.55 V), R(AGC) = 39 kΩ (±5%)
1.36
1.75
AGC option 2 (inflection = 3.78 V) , R(AGC) = 27 kΩ (±5%)
0.94
1.2
AGC option 3 (inflection = 3.96 V) , R(AGC) = 18 kΩ (±5%)
0
0.825
37.6
IN+, IN–
Start-up time
V
0.75 × VBAT
AGC control pin output
current
Input common-mode
voltage range
mA
0
AGC with no inflection point, R(AGC) = Open
AGC control pin voltage
dB
40
0.6
V
42.4
μA
1.3
V
Boost converter followed by Class-D amplifier
6
10
Boost converter only
1
4
Class-D amplifier only
5
6
ms
7.6 Operating Characteristics
VBAT = 3.6 V, TA = 25°C, RL = 8 Ω + 33 μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BOOST CONVERTER
V(PVOUT)
IL
Boost converter output voltage range
Boost converter input current limit
I(BOOST) = 0 mA
I(BOOST) = 700 mA
Boost converter efficiency
fBOOST
Boost converter frequency
6
5.4
V
Power supply current
1500
mA
450
mA
END = 0 V, I(PVOUT) = 100 mA constant
88%
Boost converter start-up current limit
η
5.4
1.2
MHz
CLASS-D AMPLIFIER
PO
VO
Output power
Output peak voltage
THD = 1%, VBAT = 2.5 V, f = 1 kHz
1200
THD = 1%, VBAT = 3 V, f = 1 kHz
1500
THD = 1%, VBAT = 3.6 V, f = 1 kHz
1700
THD = 1%, VBAT = 3 V, f = 1 kHz,
6 dB crest factor sine burst, no clipping
5.2
mW
V
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VBAT = 3.6 V, TA = 25°C, RL = 8 Ω + 33 μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
GAIN < 0.25 × VBAT
AV
Closed-loop voltage gain
Gain accuracy
VOOS
Output offset voltage
0.4 × VBAT < GAIN < 0.6 × VBAT (or float)
15.5
AV = 6 dB
27.8
AV = 15.5 dB
14.9
AV = 20 dB
10.1
Input impedance in shutdown (per input
pin)
END = 0 V
88.4
ZO
Output impedance in shutdown
END = 0 V
fCLASS-D
Switching frequency
EN
Noise output voltage
Input impedance (per input pin)
AC PSRR
Total harmonic distortion plus noise(1)
AC-Power supply ripple rejection (output
referred)
Audio frequency passband ripple
dB
0.5
dB
10
mV
kΩ
kΩ
2
560
600
A-weighted, GAIN = 6 dB
24.8
A-weighted, GAIN = 15.5 dB
33.4
A-weighted, GAIN = 20 dB
THD+N
UNIT
20
–0.5
RIN
MAX
6
GAIN > 0.75 × VBAT
ΔAV
TYP
kΩ
640
kHz
μVRMS
42.4
PO = 100 mW, f = 1 kHz
0.06%
PO = 500 mW, f = 1 kHz
0.07%
200 mVPP ripple, f = 217 Hz
75
200 mVPP ripple, f = 4 kHz
70
dB
fAUDIO = 20 Hz, CIN = 1 μF
–0.2
–0.1
0
fAUDIO = 16 kHz, CIN = 1 μF
–0.2
–0.1
0
dB
AUTOMATIC GAIN CONTROL
AGC gain range
0
AGC gain step size
6
dB
dB
AGC attack time (gain decrease)
0.026
ms/dB
AGC release time (gain increase)
1600
ms/dB
Limiter threshold voltage
VBAT > inflection point
6.15
VBAT vs. Limiter slope
VBAT < inflection point
3
AGC inflection point
(1)
20
0.5
AGC option 1, R(AGC) = 39 kΩ (±5%)
3.55
AGC option 2, R(AGC) = 27 kΩ (±5%)
3.78
AGC option 3, R(AGC) = 18 kΩ (±5%)
3.96
V
V/V
V
A-weighted
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7.7 Typical Characteristics
VBAT = 3.6 V, Gain = 6 dB, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, AGC = Float, ENB = END = VBAT, and
Load = 8 Ω + 33 µH unless otherwise specified.
SPACER
−80
10m
Gain = 20 dB
AGC = Float
RL = 8 Ω + 33 µH
No Input Signal
−90
−100
Amplitude − dBV
Supply Current − A
8m
Gain = 20 dB
AGC = Float
RL = 8 Ω + 33 µH
6m
4m
−110
−120
−130
2m
−140
0
2.3
−150
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
0
2k
4k
6k
8k
VBAT − V
Figure 7-1. Quiescent Supply Current vs Supply
Voltage
Figure 7-2. A-Weighted Output Noise vs Frequency
6
1.0
Gain = 20 dB
RL = 8 Ω + 33 µH
f = 1 kHz
RAGC = Float
0.6
0.4
0.2
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
0.0
0.0
0.5
Gain = 20 dB
RL = 8 Ω + 33 µH
RAGC = 27 kΩ
5
VOUT − Output Voltage − Vp
IVBAT − Supply Current − A
0.8
1.0
1.5
2.0
4
3
VBAT = 2.5 V
VBAT = 2.7 V
VBAT = 3.0 V
VBAT = 3.3 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
2
1
0
0.0
2.5
0.5
1.0
1.5
100
Efficiency – %
80
60
Boosted
40
VBAT
VBAT
VBAT
VBAT
VBAT
Gain = 20 dB
RL = 8 W + 33 mH
f = 1 kHz
0
0.01
0.1
2.5
3.0
3.5
4.0
4.5
1
= 2.7 V
= 3.0 V
= 3.6 V
= 4.2 V
= 5.0 V
2
Figure 7-4. Peak Output Voltage vs Peak Input
Voltage
THD+N − Total Harmonic Distortion + Noise − %
Figure 7-3. Supply Current vs Output Power
Auto Pass Through
2.0
VIN − Input Voltage − Vp
PO − Output Power − W
20
10k 12k 14k 16k 18k 20k 22k 24k
Frequency − Hz
100
10
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
RL = 8 Ω + 33 µH
RAGC = Float, Boost Enabled
Gain = 6 dB, f = 1 kHz
1
0.1
0.01
1m
PO – Output Power – W
10m
100m
1
4
PO − Output Power − W
Figure 7-5. Total Efficiency vs Output Power
Figure 7-6. Total Harmonic Distortion + Noise vs
Output Power
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VOUT − Maximum Output Voltage − Vp
6.0
5.0
4.0
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
Gain = 20 dB
3.0
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
2.0
1.0
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
THD+N − Total Harmonic Distortion + Noise − %
SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
10
VBAT = 2.5 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
1
0.1
0.01
0.001
5.0
20
100
VBAT − Supply Voltage − V
2.5
PO − Output Power − W
2.0
1.5
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
Gain = 20 dB
1.0
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
0.5
0.0
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
VBAT = 3.6 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
1
IVBAT − Supply Current − A
0.8
0.6
0.4
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
0.2
0.0
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
0.001
100
8
1k
f − Frequency − Hz
10k
20k
Figure 7-10. Total Harmonic Distortion + Noise vs
Frequency
10
VBAT = 4.2 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
1
Po = 100 mW
Po = 500 mW
Po = 1W
0.1
0.01
0.001
20
VBAT − Supply Voltage − V
Figure 7-11. Supply Current vs Supply Voltage
Po = 50 mW
Po = 250 mW
Po = 500 mW
0.01
20
THD+N − Total Harmonic Distortion + Noise − %
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
Gain = 20 dB
20k
0.1
VBAT − Supply Voltage − V
1.0
10k
10
5.0
Figure 7-9. Output Power vs Supply Voltage
1k
f − Frequency − Hz
Figure 7-8. Total Harmonic Distortion + Noise vs
Frequency
THD+N − Total Harmonic Distortion + Noise − %
Figure 7-7. Maximum Output Voltage vs Supply
Voltage
Po = 25 mW
Po = 125 mW
Po = 200 mW
100
1k
f − Frequency − Hz
10k
20k
Figure 7-12. Total Harmonic Distortion + Noise vs
Frequency
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40k
RL = 8 Ω + 33 µH
Input Level = 0.2 VPP
Gain = 6 dB
Output Referred
−20
VBAT = 2.5 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
−40
−60
−80
RL = 8 Ω + 33 µH
RIN − Input Impedance Per Leg − Ω
Supply Ripple Rejection − dB
0
−100
30k
25k
20k
15k
10k
5k
20
100
1k
f − Frequency − Hz
10k
20k
Figure 7-13. Supply Ripple Rejection vs Frequency
0
2
4
6
8
10
12
Gain − dB
14
16
18
20
Figure 7-14. Input Impedance (Per Input) vs Gain
6
6
VBAT = 3.6 V
Gain = 6 dB
POUT = 100mW @ 1kHz
RL = 8 Ω + 33 µH
VBAT = 3.6 V
Gain = 6 dB
POUT = 100 mW @ 1kHz
RL = 8 Ω + 33 µH
ENB and END
VOUT+ − VOUT−
4
V − Voltage − V
4
V − Voltage − V
35k
2
0
ENB and END
VOUT+ − VOUT−
2
0
−2
−2
0
5m
10m
t − Time − s
15m
20m
0
2m
4m
6m
t − Time − s
8m
10m
Figure 7-15. Startup Timing
Figure 7-16. Shutdown Timing
Figure 7-17. Emc Performance PO = 50 mW With 2
Inch Speaker Cable
Figure 7-18. Emc Performance PO = 750 mW With 2
Inch Speaker Cable
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8 Parameter Measurement Information
All parameters are measured according to the conditions described in the Section 7 section.
Figure 8-1 shows the setup used to test the device's typical characteristics.
1 mF
+
TPA2015D1
IN+
OUT+
Measurement
Output
Load
–
IN–
OUT–
30 kHz
Low-Pass
Filter
+
Measurement
Input
–
1 mF
SW
PVDD
PVOUT
GND
VBAT
22 mF
2.2 mH
10 mF
+
Supply
–
A.
B.
C.
The 1 µF input capacitors (CI) were shorted for input common-mode voltage measurements.
A 33 μH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
The 30 kHz low-pass filter is required even if the analyzer has an internal low-pass filter. An R-C low pass filter (100 Ω, 47 nF) is used
on each output for the data sheet graphs.
Figure 8-1. Test Setup for Typical Characteristics Graphs
10
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9 Detailed Description
9.1 Overview
The TPA2015D1 is a high efficiency Class-D audio power amplifier with battery-tracking SpeakerGuard™ AGC
technology. It drives up to 2 W into an 8 Ω speaker.
The built-in boost converter generates a 5.5 V supply voltage for the Class-D amplifier. The SpeakerGuard™
AGC adjusts the Class-D gain to limit battery current and prevent heavy clipping. The TPA2015D1 has an
integrated low-pass filter to improve the RF rejection and reduce DAC out-of-band noise, increasing the signal to
noise ratio (SNR).
See Section 13.1.1.1 for a list of terms and definitions used throughout the following sections.
9.2 Functional Block Diagram
VBAT
ENB
END
Bias &
Control
Battery
Monitor
IN-
Boost
Converter
PVOUT
Oscillator
AGC
IN+
SW
+20 dB
+15.5 dB
+6 dB
PVDD
PVDD
Gain
Select:
+
AGC
PWM
–
AGND
HBridge
OUT+
OUTGND
GAIN
GND
9.3 Feature Description
9.3.1 SpeakerGuard™ Theory of Operation
SpeakerGuard™ protects speakers, improves loudness, and limits peak supply current. If the output audio
signal exceeds the limiter level, then SpeakerGuard™ decreases amplifier gain. The rate of gain decrease, the
attack time, is fixed at 0.026 ms/dB. SpeakerGuard™ increases the gain once the output audio signal is below
the limiter level. The rate of gain increase, the release time, is fixed at 1600 ms/dB. Figure 9-1 shows this
relationship.
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INPUT
SIGNAL
Release Time
Attack Time
GAIN
Gain Step
LIMITER
LEVEL
OUTPUT
SIGNAL
Figure 9-1. SpeakerGuard™ Attack and Release Times
9.3.1.1 SpeakerGuard™ With Varying Input Levels
SpeakerGuard™ protects speakers by decreasing gain during large output transients. Figure 9-2 shows the
maximum output voltage at different input voltage levels. The load is 8 Ω and the gain is 15.5 dB (6 V/V).
SPACE
VOUT − Maximum Output Voltage − Vp
6.0
5.0
RL = 8 Ω + 33 µH
RAGC = 27 kΩ
f = 1 kHz
Gain = 15.5 dB
4.0
3.0
2.0
1.0
2.3
VIN = 0.707 VRMS
VIN = 0.564 VRMS
VIN = 0.475 VRMS
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
VBAT − Supply Voltage − V
Figure 9-2. Maximum Output Voltage vs Supply Voltage
A 0.707 VRMS sine-wave input signal forces the output voltage to 4.242 VRMS, or 6.0 VPEAK. Above 3.9 V supply,
the boost converter voltage sags due to high output current, resulting in a peak Class-D output voltage of
about 5.4 V. As the supply voltage decreases below 3.9 V, the limiter level decreases. This causes the gain to
decrease, and the peak Class-D output voltage lowers.
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With a 0.564 VRMS input signal, the peak Class-D output voltage is 4.78 V. When the supply voltage is above
3.45 V, the output voltage remains below the limiter level, and the gain stays at 15.5 dB. Once the supply drops
below 3.45 V, the limiter level decreases below 4.78 V, and SpeakerGuard™ decreases the gain.
The same rationale applies to the 0.475 VRMS input signal. Although the supply voltage may be below the
inflection point, audio gain does not decrease until the Class-D output voltage is above the limiter level.
9.3.1.2 Battery Tracking SpeakerGuard™
The TPA2015D1 monitors the battery voltage and the audio signal, automatically decreasing gain when battery
voltage is low and audio output power is high. It finds the optimal gain to maximize loudness and minimize
battery current, providing louder audio and preventing early shutdown at end-of-charge battery voltages.
SpeakerGuard™ decreases amplifier gain when the audio signal exceeds the limiter level. The limiter level
automatically decreases when the supply voltage (VBAT) is below the inflection point. Figure 9-3 shows a plot of
the limiter level as a function of the supply voltage.
Limiter Level
Limiter Level (VBAT > inflection point)
Inflection point
Limiter Level (VBAT = inflection point)
Supply Voltage
Figure 9-3. Limiter Level vs Supply Voltage
The limiter level decreases within 60 µs of the supply voltage dropping below the inflection point. Although this is
slightly slower than the 26 µs/dB SpeakerGuard™ attack time, the difference is audibly imperceptible.
Connect a resistor between the AGC pin and ground to set the inflection point, as shown in Table 9-1. Leave the
AGC pin floating to disable the inflection point, keeping the limiter level constant over all supply voltages.
The maximum limiter level is fixed, as is the slope of the limiter level versus supply voltage. If different values for
maximum limiter level and slope are required, contact your local Texas Instruments representative.
Table 9-1. AGC Function Table
FUNCTION
RESISTOR ON AGC PIN
INFLECTION POINT
Constant limiter level; battery track OFF
Floating or connected to VBAT
disabled
AGC battery track option 1
39 kΩ
3.55 V
AGC battery track option 2
27 kΩ
3.78 V
AGC battery track option 3
18 kΩ
3.96 V
The audio signal is not affected by the SpeakerGuard™ function unless the peak audio output voltage exceeds
the limiter level. Figure 9-7 shows the relationship between the audio signal, the limiter level, the supply voltage,
and the supply current.
When VBAT is greater than the inflection point, the limiter level allows the output signal to slightly clip to roughly
6% THD at 2 W into 8 Ω. This is an acceptable peak distortion level for most small-sized portable speakers,
while ensuring maximum loudness from the speaker.
9.3.2 Fully Differential Class-D Amplifier
The TPA2015D1 uses a fully differential amplifier with differential inputs and outputs. The differential output
voltage equals the differential input multiplied by the amplifier gain. The TPA2015D1 can also be used with
a single-ended input. However, using differential input signals when in a noisy environment, like a wireless
handset, ensures maximum system noise rejection.
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9.3.2.1 Advantages of Fully Differential Amplifiers
•
•
•
Mid-supply bypass capacitor, CBYPASS, not required:
– The fully differential amplifier does not require a mid-supply bypass capacitor. Any shift in the mid-supply
affects both positive and negative channels equally and cancels at the differential output.
Improved RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. This
217 Hz burst often couples to audio amplifier input and output traces causing frame-rate noise. Fully
differential amplifiers cancel frame-rate noise better than non-differential amplifiers.
Input-coupling capacitors not required, but recommended:
– The fully differential amplifier allows the inputs to be biased at voltages other than mid-supply (PVDD/2).
The TPA2015D1 inputs can be biased anywhere within the common mode input voltage range, as listed
in the Section 7.6 table. If the inputs are biased outside of that range, then input-coupling capacitors are
required.
– Note that without input coupling capacitors, any dc offset from the audio source will be modulated by the
AGC. This could cause artifacts in the audio output signal. Perform listening tests to determine if direct
input coupling is acceptable.
9.3.2.2 Improved Class-D Efficiency
The TPA2015D1 output stage uses a modulation technique that modulates the PWM output only on one side
of the differential output, leaving the other side held at ground. Although the differential output voltage is
undistorted, each output appears as a half-wave rectified signal.
This technique reduces output switching losses and improves overall amplifier efficiency. Figure 9-4 shows how
OUT+, OUT-, and the differential output voltages appear on an oscilloscope.
C1(YELLOW) is OUT+
C2(PINK) is OUT–
C3(CYAN) is OUT+ - OUT–
Figure 9-4. Filtered Output Waveforms
9.3.3 Adaptive Boost Converter
The TPA2015D1 consists of an adaptive boost converter and a Class-D amplifier. The boost converter takes the
supply voltage, VBAT, and increases it to a higher output voltage, PVOUT. PVOUT drives the supply voltage of
the Class-D amplifier, PVDD. This improves loudness over non-boosted solutions.
The boost converter is adaptive and activates automatically depending on the output audio signal amplitude.
When the peak output audio signal exceeds a preset voltage threshold, the boost converter is enabled, and
the voltage at PVOUT is 5.5 V. When the audio output voltage is lower than the threshold voltage, the boost
deactivates automatically. The boost activation threshold voltage is not user programmable. It is optimized to
prevent clipping while maximizing system efficiency.
The boost converter can be forcibly deactivated by setting the ENB pin to logic-low. When the boost is
deactivated, PVOUT is equal to the supply voltage (VBAT) minus the I x R drop across the inductor and boost
converter pass transistor.
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A timer prevents the input signal from modulating the PVOUT voltage within the audio frequency range,
eliminating the potential for audible artifacts on the Class-D output.
Figure 9-5 shows how the adaptive boost modulates with a typical audio signal. By automatically deactivating the
boost converter and passing VBAT to PVOUT, the TPA2015D1 efficiency is improved at low output power.
12
10
V − Voltage − V
8
VBAT = 3.6 V
Gain = 20 dB
AGC = Float
RL = 8 Ω + 33 µH
PVOUT
VOUT+ − VOUT−
6
4
2
0
−2
−4
−6
0.0
0.5
1.0
t − Time − s
1.5
2.0
Figure 9-5. Adaptive Boost Converter With Typical Music Playback
The primary external components for the boost converter are the inductor and the boost capacitor. The inductor
stores current, and the boost capacitor stores charge. As the Class-D amplifier depletes the charge in the boost
capacitor, the boost inductor replenishes charge with its stored current. The cycle of charge and discharge
occurs frequently enough to keep PVOUT within its minimum and maximum voltage specification.
The boost converter design is optimized for driving the integrated Class-D amplifier only. It lacks protection
circuitry recommended for driving loads other than the integrated Class-D amplifier.
9.3.3.1 Boost Converter Overvoltage Protection
The TPA2015D1 internal boost converter operates in a discontinuous mode to improve the efficiency at light
loads. The boost converter has overvoltage protection that disables the boost converter if the output voltage
exceeds 5.8 V. If current is forced into the PVOUT terminal, the voltage clamp will sink up to 10 mA. If more than
10 mA is forced into PVOUT, then the PVOUT voltage will increase. Refer to the Section 9.3.6 section for details.
See Section 13.1.1.2 for a list of terms and definitions used in the boost equations.
9.3.4 Operation With DACs and CODECs
Large ripple voltages can be present at the output of ΔΣ DACs and CODECs, just above the audio frequency
(for example: 80 kHz with a 300 mVPP). This out-of-band noise is due to the noise shaping of the delta-sigma
modulator in the DAC.
Some Class-D amplifiers have higher output noise when used in combination with these DACs and CODECs.
This is because out-of-band noise from the CODEC/DAC mixes with the Class-D switching frequencies in the
audio amplifier input stage.
The TPA2015D1 has a built-in low-pass filter that reduces the out-of-band noise and RF noise, filtering out-ofband frequencies that could degrade in-band noise performance. The TPA2015D1 AGC calculates gain based
on input signal amplitude only.
If driving the TPA2015D1 input with 4th-order or higher ΔΣ DACs or CODECs, add an R-C low pass filter at each
of the audio inputs (IN+ and IN-) of the TPA2015D1 to ensure best performance. The recommended resistor
value is 100 Ω and the capacitor value of 47 nF.
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Connected to Supply
2.2 mH
2.2 mF – 10 mF
6.8 mF – 22 mF
VDD
Differential
Audio Inputs
SW PVOUT
PVDD
IN100 W
IN+
OUT+
47 nF
Gain Control
GAIN
AGC Control
AGC
Boost Enable
ENB
Class-D Enable
END
TPA2015D1
OUT-
GND
Figure 9-6. Reducing Out-of-Band DAC Noise With External Input Filter
9.3.5 Filter Free Operation and Ferrite Bead Filters
The TPA2015D1 is designed to minimize RF emissions. For more information about RF emissions and filtering
requirements, see SLOA145.
9.3.6 Speaker Load Limitation
Speakers are non-linear loads with varying impedance (magnitude and phase) over the audio frequency. A
portion of speaker load current can flow back into the boost converter output via the Class-D output H-bridge
high-side device. This is dependent on the speaker's phase change over frequency, and the audio signal
amplitude and frequency content.
Most portable speakers have limited phase change at the resonant frequency, typically no more than 40 or
50 degrees. To avoid excess flow-back current, use speakers with limited phase change. Otherwise, flow-back
current could exceed the 10 mA rating of the boost converter voltage clamp and drive the PVOUT voltage above
the absolute maximum recommended operational voltage.
Confirm proper operation by connecting the speaker to the TPA2015D1 and driving it at maximum output swing.
Observe the PVOUT voltage with an oscilloscope. In the unlikely event the PVOUT voltage exceeds 6.5 V, add a
6.8 V Zener diode between PVOUT and ground to ensure the TPA2015D1 operates properly.
The amplifier has thermal overload protection and decatives if the die temperature exceeds 150°C. It
automatically reactivates once die temperature returns below 150°C. Built-in output over-current protection
deactivates the amplifier if the speaker load becomes short-circuited. The amplifier automatically restarts within
200 ms after the over-current event. Although the TPA2015D1 Class-D output can withstand a short between
OUT+ and OUT-, do not connect either output directly to GND, PVDD, or VBAT as this could damage the device.
CAUTION
Do not connect OUT+ or OUT- directly to GND, PVDD, or VBAT as this could damage the Class-D
output stage.
9.3.7 Fixed Gain Setting
The TPA2015D1 has 3 selectable fixed-gains: 6 dB, 15.5 dB, and 20 dB. Connect the GAIN pin as shown in
Table 9-2.
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Table 9-2. Amplifier Fixed-Gain
CONNECT GAIN PIN TO
AMPLIFIER GAIN
GND
6 dB
No Connection (Floating)
15.5 dB
VBAT
20 dB
9.4 Device Functional Modes
9.4.1 Shutdown Mode
The TPA2025D1 can be put in shutdown mode when asserting ENB and END pins to a logic LOW. While in
shutdown mode, the device output stage is turned off and the current consumption is very low. The device exits
shutdown mode when a HIGH logic level is applied to ENB and END pins.
9.4.2 Battery Tracking SpeakerGuard™ Operation
Phase 1
Battery discharging normally; supply voltage is above inflection point; audio output remains below limiter level.
The limiter level remains constant because the supply voltage is greater than the inflection point. Amplifier gain is constant
at fixed-gain as set by the GAIN pin. The audio output remains at a constant loudness. The boost converter allows the audio
output to swing above the battery supply voltage. Battery supply current increases as supply voltage decreases.
Phase 2
Battery continues to discharge normally; supply voltage decreases below inflection point; limiter level decreases
below audio output.
The limiter level decreases as the battery supply voltage continues to decrease. SpeakerGuard™ lowers amplifier gain,
reducing the audio output below the new limiter level. The supply current decreases due to reduced output power.
Phase 3
Battery supply voltage is constant; audio output remains below limiter level.
The audio output, limiter level, and supply current remain constant as well.
Phase 4
Phone plugged in and battery re-charges; supply voltage increases.
The limiter level increases as the supply voltage increases. SpeakerGuard™ increases amplifier gain slowly, increasing
audio output. Because the TPA2015D1 supply current is proportional to the PVOUT-to-VBAT ratio, the supply current
decreases as battery supply voltage increases.
Phase 5
Battery supply voltage is constant; audio output is below limiter level.
SpeakerGuard™ continues to increase amplifier gain to the fixed-gain as set by the GAIN pin. The audio output signal
increases (slowly due to release time) to original value.
Phase 6
Battery supply voltage is constant; audio output remains below limiter level.
Amplifier gain equal to fixed-gain as set by the GAIN pin. Audio output signal does not change. Supply current remains
constant.
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Supply Current
Limiter Level
Class-D Voltage
Supply Voltage
Audio Signal
Phase 1
Phase 2
Phase 3
Phase 5
Phase 4
Phase 6
Inflection point
Figure 9-7. Relationship Between Supply Voltage, Current, Limiter Level, and Output Audio Signal
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
10.1 Application Information
These typical connection diagrams highlight the required external components and system level connections
for proper operation of the device. Each of these configurations can be realized using the Evaluation Modules
(EVMs) for the device. These flexible modules allow full evaluation of the device in the most common modes of
operation. Any design variation can be supported by TI through schematic and layout reviews. Visit e2e.ti.com
for design assistance and join the audio amplifier discussion forum for additional information.
10.2 Typical Applications
10.2.1 TPA2015D1 With Differential Input Signals
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VBAT
2.2 mF - 10 mF
SW PVOUT PVDD
IN-
Differential
Audio Inputs
IN+
OUT+
Gain Control
GAIN
AGC Control
AGC
Boost Enable
ENB
Class-D Enable
END
TPA2015D1
OUT-
GND
Figure 10-1. Schematic with Differential Input Signals
10.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 10-1.
Table 10-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power Supply
5V
High > 1.3 V
Enable Inputs
Low < 0.6 V
Speaker
8Ω
10.2.1.2 Detailed Design Procedure
10.2.1.2.1 Boost Converter Inductor Selection
Working inductance decreases as inductor current and temperature increases. If the drop in working inductance
is severe enough, it may cause the boost converter to become unstable, or cause the TPA2015D1 to reach its
current limit at a lower output voltage than expected. Inductor vendors specify currents at which inductor values
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decrease by a specific percentage. This can vary by 10% to 35%. Inductance is also affected by dc current and
temperature.
10.2.1.2.1.1 Inductor Equations
Inductor current rating is determined by the requirements of the load. The inductance is determined by two
factors: the minimum value required for stability and the maximum ripple current permitted in the application.
Use Equation 1 to determine the required current rating. Equation 1 shows the approximate relationship between
the average inductor current, IL, to the load current, load voltage, and input voltage (IPVDD, PVDD, and VBAT,
respectively). Insert IPVDD, PVDD, and VBAT into Equation 1 and solve for IL. The inductor must maintain at least
90% of its initial inductance value at this current.
PVDD
æ
ö
IL = IPVDD ´ ç
÷
è VBAT ´ 0.8 ø
(1)
CAUTION
Use a minimum working inductance of 1.3 μH. Lower values may damage the inductor.
Use a minimum working inductance of 1.3 μH. Lower values may damage the inductor.
Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the
inductor and reduces the potential for EMI. Use Equation 2 to determine the value of the inductor, L. Equation 2
shows the relationship between inductance L, VBAT, PVDD, the switching frequency, fBOOST, and ΔIL. Insert the
maximum acceptable ripple current into Equation 2 and solve for L.
L=
VBAT ´ (PVDD - VBAT)
DIL ´ ¦BOOST ´ PVDD
(2)
ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the
inductance to reduce the ripple current. Do not use greater than 4.7 μH, as this prevents the boost converter
from responding to fast output current changes properly. If using above 3.3 µH, then use at least 10 µF
capacitance on PVOUT to ensure boost converter stability.
The typical inductor value range for the TPA2015D1 is 2.2 μH to 3.3 µH. Select an inductor with less than 0.5 Ω
dc resistance, DCR. Higher DCR reduces total efficiency due to an increase in voltage drop across the inductor.
Table 10-2. Sample Inductors
L
(μH)
SUPPLIER
COMPONENT CODE
SIZE
(L×W×H mm)
DCR TYP
(mΩ)
ISAT MAX
(A)
2.2
Chilisin
Electronics Corp.
CLCN252012T-2R2M-N
2.5 x 2.0 x 1.2
105
1.2
2.2
Toko
1239AS-H-2R2N=P2
2.5 × 2.0 × 1.2
96
2.3
2.2
Coilcraft
XFL4020-222MEC
4.0 x 4.0 x 2.15
22
3.5
3.3
Toko
1239AS-H-3R3N=P2
2.5 × 2.0 × 1.2
160
2.0
3.3
Coilcraft
XFL4020-332MEC
4.0 x 4.0 x 2.15
35
2.8
C RANGE
4.7 – 22 µF / 16 V
6.8 – 22 µF / 10 V
10 – 22 µF / 10 V
10.2.1.2.2 Boost Converter Capacitor Selection
The value of the boost capacitor is determined by the minimum value of working capacitance required for
stability and the maximum voltage ripple allowed on PVDD in the application. Working capacitance refers to the
available capacitance after derating the capacitor value for DC bias, temperature, and aging.
Do not use any component with a working capacitance less than 4.7 μF. This corresponds to a 4.7 µF / 16 V
capacitor, or a 6.8 µF / 10 V capacitor. Do not use above 22 µF capacitance as it will reduce the boost converter
response time to large output current transients.
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Equation 3 shows the relationship between the boost capacitance, C, to load current, load voltage, ripple
voltage, input voltage, and switching frequency (IPVDD, PVDD, ΔV, VBAT, and fBOOST respectively).
Insert the maximum allowed ripple voltage into Equation 3 and solve for C. The 1.5 multiplier accounts for
capacitance loss due to applied dc voltage and temperature for X5R and X7R ceramic capacitors.
I
´ (PVDD - VBAT)
C = 1.5 ´ PVDD
DV ´ ¦BOOST ´ PVDD
(3)
10.2.1.2.3 Components Location and Selection
10.2.1.2.3.1 Decoupling Capacitors
The TPA2015D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling.
Adequate power supply decoupling to ensures that the efficiency is high and total harmonic distortion (THD) is
low.
Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 μF, within 2 mm of the VBAT ball.
This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line.
Additionally, placing this decoupling capacitor close to the TPA2015D1 is important, as any parasitic resistance
or inductance between the device and the capacitor causes efficiency loss. In addition to the 0.1 µF ceramic
capacitor, place a 2.2 μF to 10 μF capacitor on the VBAT supply trace. This larger capacitor acts as a charge
reservoir, providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.
10.2.1.2.3.2 Input Capacitors
Input audio DC decoupling capacitors are recommended. The input audio DC decoupling capacitors prevents
the AGC from changing the gain due to audio DAC output offset. The input capacitors and TPA2015D1 input
impedance form a high-pass filter with the corner frequency, fC, determined in Equation 4.
Any mismatch in capacitance between the two inputs will cause a mismatch in the corner frequencies. Severe
mismatch may also cause turn-on pop noise. Choose capacitors with a tolerance of ±10% or better.
fc =
1
(2 x p x RICI )
(4)
10.2.1.3 Application Curves
For application curves, see the figures listed in Table 10-3.
Table 10-3. Table of Graphs
DESCRIPTION
FIGURE NUMBER
Supply Current vs Output Power
Figure 7-3
Peak Output Voltage vs Peak Input Voltage
Figure 7-4
Total Efficiency vs Output Power
Figure 7-5
Output Power vs Supply Voltage
Figure 7-9
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10.2.2 TPA2015D1 with Single-Ended Input Signals
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VDD
2.2 mF - 10 mF
Single-Ended
Audio Inputs
SW PVOUT
PVDD
ININ+
OUT+
Gain Control
GAIN
AGC Control
AGC
Boost Enable
ENB
Class-D Enable
END
TPA2015D1
OUT-
GND
Figure 10-2. Typical Application Schematic with Single-Ended Input Signals
10.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 10-1.
10.2.2.2 Detailed Design Procedure
For the design procedure see Section 10.2.1.2 from the previous section.
10.2.2.3 Application Curves
For application curves, see the figures listed in Table 10-3.
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11 Power Supply Recommendations
The TPA2015D1 is designed to operate from an input voltage supply range between 2.5-V and 5.2-V. Therefore
the output voltage range of the power supply should be within this range. The current capability of upper power
should not exceed the maximum current limit of the power switch.
11.1 Power Supply Decoupling Capacitors
The TPA2015D1 requires adequate power supply decoupling to ensure a high efficiency operation with low total
harmonic distortion (THD). Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF,
within 2 mm of the PVDD/PVOUT pin. This choice of capacitor and placement helps with higher frequency
transients, spikes, or digital hash on the line. In addition to the 0.1 μF ceramic capacitor, is recommended to
place a 2.2 µF to 10 µF capacitor on the VDD supply trace. This larger capacitor acts as a charge reservoir,
providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.
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12 Layout
12.1 Layout Guidelines
12.1.1 Component Placement
Place all the external components close to the TPA2015D1 device. Placing the decoupling capacitors as close
as possible to the device is important for the efficiency of the class-D amplifier. Any resistance or inductance in
the trace between the device and the capacitor can cause a loss in efficiency.
12.1.2 Trace Width
Recommended trace width at the solder balls is 75 μm to 100 μm to prevent solder wicking onto wider PCB
traces. For high current pins (SW, GND, OUT+, OUT–, PVOUT, and PVDD) of the TPA2015D1, use 100 μm
trace widths at the solder balls and at least 500 μm PCB traces to ensure proper performance and output power
for the device. For low current pins (IN–, IN+, END, ENB, GAIN, AGC, VBAT) of the TPA2015D1, use 75 μm to
100 μm trace widths at the solder balls. Run IN- and IN+ traces side-by-side (and if possible, same length) to
maximize common-mode noise cancellation.
12.1.3 Pad Size
In making the pad size for the DSBGA balls, TI recommends that the layout use nonsolder mask defined
(NSMD) land.
With this method, the solder mask opening is made larger than the desired land area, and the opening size
is defined by the copper pad width. Figure 12-1 and Table 12-1 show the appropriate diameters for a DSBGA
layout.
Copper
Trace Width
Solder Mask
Opening
Solder Mask
Thickness
Solder
Pad Width
Copper Trace
Thickness
Figure 12-1. Land Pattern Dimensions
Table 12-1. Land Pattern Dimensions(1) (3) (2) (4)
SOLDER PAD
DEFINITIONS
COPPER
PAD
SOLDER MASK (5)
OPENING
COPPER
THICKNESS
STENCIL (6) (7)
OPENING
STENCIL
THICKNESS
Nonsolder mask
defined (NSMD)
275 μm
(+0.0, -25 μm)
375 μm (+0.0, -25 μm)
1 oz max (32 μm)
275 μm x 275 μm Sq.
(rounded corners)
125 μm thick
(1)
(2)
(3)
(4)
(5)
(6)
(7)
24
Circuit traces from NSMD defined PWB lands should be 75 μm to 100 μm wide in the exposed area inside the solder mask opening.
Wider trace widths reduce device stand off and impact reliability.
Recommend solder paste is Type 3 or Type 4.
Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the
intended application.
For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance.
Solder mask thickness should be less than 20 μm on top of the copper circuit pattern
Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in
inferior solder paste volume control.
Trace routing away from DSBGA device should be balanced in X and Y directions to avoid unintentional component movement due to
solder wetting forces.
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12.2 Layout Example
Input capacitors
placed as close as
possible to the device
IN
-
IN +
Differential Routing of
input and output
signals is
recommended
xxxxx
xx
xxxxxxxx
xxxxx
xx
xx
xx
xxxxxxxx
xxxx
xx
xx
xxxx
xx
xxxxxxxx
xxxx
xxx
xx
xxxxxxx
xx
xx
xx
xxx
xx
xxxxxxx
xxxx
ENB
END
D4
D3
D2
D1
C4
C3
C2
C1
B4
B3
B2
B1
A4
A3
A2
A1
OUT -
AGC
OUT +
GAIN
Decoupling capacitor
placed as close as
possible to the device
TPA2015D1
0.1µF
10µF
Decoupling capacitor
placed as close as
possible to the device
10µF
OUT +
2.2µH
Top Layer Ground Plane
xx
xx
xx
xx
Top Layer Traces
Pad to Top Layer Ground Plane
Bottom Layer Traces
Via to Ground Plane
Via to Bottom Layer
Via to Power Supply Plane
Figure 12-2. TPA2015D1 Layout Example
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SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
13 Device and Documentation Support
13.1 Device Support
13.1.1 Device Nomenclature
13.1.1.1 TPA2015D1 Glossary
Limiter level
The maximum output voltage allowed before amplifier gain is automatically reduced.
SpeakerGuard™
TI's trademark name for the automatic gain control technology. It protects speakers by limiting maximum output
power.
Inflection point
The battery voltage threshold for reducing the limiter level. If the battery voltage drops below the inflection point,
the limiter level automatically reduces. Although it lowers the maximum output power, it prevents high battery
currents at end-of-charge low battery voltages.
Battery track
The name for the continuous limiter level reduction at battery voltages below the inflection point.
AGC
Automatic gain control.
VBAT
The battery supply voltage to the TPA2015D1. The VBAT pin is the input to the boost converter.
Fixed-gain
The nominal audio gain as set by the GAIN pin. If the audio output voltage remains below the limiter level, the
amplifier gain will return to the fixed-gain.
Attack time
The rate of AGC gain decrease. The attack time is constant at 0.026 ms/dB.
Release time
The rate of AGC gain increase. The release time is constant at 1600 ms/dB.
13.1.1.2 Boost Terms
C
Minimum boost capacitance required for a given ripple voltage on PVOUT.
L
Boost inductor.
fBOOST
Switching frequency of the boost converter.
IPVDD
Current pulled by the Class-D amplifier from the boost converter.
IL
Average current through the boost inductor.
PVDD
(PVOUT)
Supply voltage for the Class-D amplifier. (Voltage generated by the boost converter output.)
VBAT
Supply voltage to the IC.
ΔIL
Ripple current through the inductor.
ΔV
Ripple voltage on PVOUT.
26
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13.2 Community Resources
13.3 Trademarks
SpeakerGuard™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
28
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14.1 Package Option Addendum
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14.1.1 Packaging Information
(1)
(2)
(3)
(4)
(5)
(6)
Status
Packag
e
Pins
Drawing
(1)
Packag
e Type
SN012020YZHR
ACTIV
E
DSBGA
YZH
16
SN012020YZHT
ACTIV
E
DSBGA
YZH
16
Orderable Device
Packag
e Qty
Eco Plan
(2)
Lead/Ball
Finish(4)
MSL Peak
Temp (3)
Op Temp
(°C)
Device Marking(5) (6)
3000
Green
(RoHS &
no Sb/Br)
SNAGCU
Level-1-260CUNLIM
–40 to 85
1D8
250
Green
(RoHS &
no Sb/Br)
SNAGCU
Level-1-260CUNLIM
–40 to 85
1D8
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using
this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
space
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please
check http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS
requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where
designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the
die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free
(RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb)
based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
space
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
space
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
space
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device
space
Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will
appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device
Marking for that device.
Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI
bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information.
Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers
consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to
Customer on an annual basis.
30
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14.1.2 Tape and Reel Information
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
B0 W
Reel
Diameter
Cavity
A0
B0
K0
W
P1
A0
Dimension designed to accommodate the component width
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1
Q2
Q1
Q2
Q3
Q4
Q3
Q4
User Direction of Feed
Pocket Quadrants
Device
Package
Type
Package
Drawing
Pins
SPQ
Reel
Diameter
(mm)
Reel
Width W1
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
SN012020YZHR
DSBGA
YZH
16
3000
180.0
8.4
2.07
2.07
0.81
4.0
8.0
Q1
SN012020YZHT
DSBGA
YZH
16
250
180.0
8.4
2.07
2.07
0.81
4.0
8.0
Q1
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SLOS638C – NOVEMBER 2011 – REVISED JUNE 2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
L
W
32
H
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN012020YZHR
DSBGA
YZH
16
3000
182.0
182.0
20.0
SN012020YZHT
DSBGA
YZH
16
250
182.0
182.0
20.0
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN012020YZHR
ACTIVE
DSBGA
YZH
16
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
1D8
Samples
TPA2015D1YZHR
ACTIVE
DSBGA
YZH
16
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
OEN
Samples
TPA2015D1YZHT
ACTIVE
DSBGA
YZH
16
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
OEN
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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