TPA3128D2DAPR

Product Folder Order Now Technical Documents Support & Community Tools & Software TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 TPA3128D2, TPA3129D2 2x30-W, 2x15-W Class-D Amplifier With Low Idle Power Dissipation 1 Features 3 Description • The TPA3128D2 and TPA3129D2 have low idle power loss and helps to extend the battery life of Bluetooth/Wireless speakers and other batterypowered audio systems. The high efficiency of the TPA3128D2 device allows it to do 2 × 30 W without external heat sink on a dual layer PCB. The high efficiency of the TPA3129D2 device allows it to do 2 × 15 W without external heat sink on a dual layer PCB. This device proposed an efficiency boost Mode, which can dynamically reduced the current ripple of the external LC filter and the idle current . 1 • • • • • • • • • Supports Multiple Output Configurations – 2 × 30 W Into a 8-Ω BTL Load at 24 V (TPA3128D2) – 2 × 15 W Into a 8-Ω BTL Load at 15 V (TPA3129D2) Wide Voltage Range: 4.5 V to 26 V Efficient Class-D Operation – Very Low Idle Current: 150°C Low Output high impedance Latched Too High DC Offset DC output voltage Low Output high impedance Latched Under Voltage on PVCC PVCC < 4.5V – Output high impedance Self-clearing Over Voltage on PVCC PVCC > 27V – Output high impedance Self-clearing 7.3.9 DC Detect Protection The TPA31xxD2 has circuitry which will protect the speakers from DC current which might occur due to defective capacitors on the input or shorts on the printed circuit board at the inputs. A DC detect fault will be reported on the FAULT pin as a low state. The DC Detect fault will also cause the amplifier to shutdown by changing the state of the outputs to Hi-Z. If automatic recovery from the short circuit protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. Connecting the FAULTZ and SDZ pins allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the DC Detect protection latch. A DC Detect Fault is issued when the output differential voltage of either channel exceeds DC protection threshold level for more than 640 ms at the same polarity. Table 5 below shows some examples of the typical DC Detect Protection threshold for several values of the supply voltage. The Detect Protection Threshold feature protects the speaker from large DC currents or AC currents less than 2 Hz. To avoid nuisance faults due to the DC detect circuit, hold the SD pin low at power-up until the signals at the inputs are stable. Also, take care to match the impedance seen at the positive and negative inputs to avoid nuisance DC detect faults. Table 5 lists the minimum output offset voltages required to trigger the DC detect. The outputs must remain at or above the voltage listed in the table for more than 640 ms to trigger the DC detect. Table 5. DC Detect Threshold PVCC (V) VOS - OUTPUT OFFSET VOLTAGE (V) 4.5 1.35 6 1.8 12 3.6 18 5.4 7.3.10 Short-Circuit Protection and Automatic Recovery Feature The TPA31xxD2 has protection from over current conditions caused by a short circuit on the output stage. The short circuit protection fault is reported on the FAULTZ pin as a low state. The amplifier outputs are switched to a high impedance state when the short circuit protection latch is engaged. The latch can be cleared by cycling the SDZ pin through the low state. If automatic recovery from the short circuit protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. Connecting the FAULTZ and SDZ pins allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the short-circuit protection latch. In systems where a possibility of a permanent short from the output to PVDD or to a high voltage battery like a car battery can occur, pull the MUTE pin low with the FAULTZ signal with a inverting transistor to ensure a highZ restart, like shown in the Figure 28 below: 16 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 > 1.4sec SDZ mP MUTE TPA312xD2 FAULTZ SDZ MUTE FAULTZ TPA3128D2 Figure 28. MUTE Driven by Inverted FAULTZ Figure 29. Timing Requirement for SDZ 7.3.11 Thermal Protection Thermal protection on the TPA31xxD2 prevents damage to the device when the internal die temperature exceeds 150°C. This trip point has a ±15°C tolerance from device to device. Once the die temperature exceeds the thermal trip point, the device enters into the shutdown state and the outputs are disabled. This is a latched fault. Thermal protection faults are reported on the FAULTZ terminal as a low state. If automatic recovery from the thermal protection latch is desired, connect the FAULTZ pin directly to the SDZ pin. This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the thermal protection latch. 7.3.12 Device Modulation Scheme The TPA3128D2 and TPA3129D2 have the option of running in either BD modulation or low idle-loss mode. 7.3.12.1 BD-Modulation This is a modulation scheme that allows operation without the classic LC reconstruction filter when the amp is driving an inductive load with short speaker wires. Each output is switching from 0 volts to the supply voltage. The OUTPx and OUTNx are in phase with each other with no input so that there is little or no current in the speaker. The duty cycle of OUTPx is greater than 50% and OUTNx is less than 50% for positive output voltages. The duty cycle of OUTPx is less than 50% and OUTNx is greater than 50% for negative output voltages. The voltage across the load sits at 0V throughout most of the switching period, reducing the switching current, which reduces any I2R losses in the load. Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 17 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com OUTP OUTN No Output OUTP- OUTN 0V Speaker Current OUTP OUTN Positive Output PVCC OUTP-OUTN 0V Speaker Current 0A OUTP Negative Output OUTN OUTP - OUTN 0V - PVCC Speaker Current 0A Figure 30. BD Mode Modulation 18 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 7.3.13 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme The main reason that the traditional class-D amplifier-based on AD modulation requires an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 × VCC, and the time at each voltage is half the period for the traditional modulation scheme. An ideal LC filter is required to store the ripple current from each half cycle for the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive. The TPA3128D2 and TPA3129D2 modulation schemes have little loss in the load without a filter because the pulses are short and the change in voltage is VCC instead of 2 × VCC. As the output power increases, the pulses widen, making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not required. An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance but higher impedance at the switching frequency than the speaker, which results in less power dissipation, therefore increasing efficiency. 7.3.14 Ferrite Bead Filter Considerations Using the Advanced Emissions Suppression Technology in the TPA3128D2 and TPA3129D2 amplifiers, a high efficiency class-D audio amplifier can be designed while minimizing interference to surrounding circuits. Designing the amplifier can also be accomplished with only a low-cost ferrite bead filter. In this case the user must carefully select the ferrite bead used in the filter. One important aspect of the ferrite bead selection is the type of material used in the ferrite bead. Not all ferrite material is alike, therefore the user must select a material that is effective in the 10-MHz to 100-MHz range which is key to the operation of the class-D amplifier. Many of the specifications regulating consumer electronics have emissions limits as low as 30 MHz. The ferrite bead filter should be used to block radiation in the 30-MHz and above range from appearing on the speaker wires and the power supply lines which are good antennas for these signals. The impedance of the ferrite bead can be used along with a small capacitor with a value in the range of 1000 pF to reduce the frequency spectrum of the signal to an acceptable level. For best performance, the resonant frequency of the ferrite bead/ capacitor filter should be less than 10 MHz. Also, the ferrite bead must be large enough to maintain its impedance at the peak currents expected for the amplifier. Some ferrite bead manufacturers specify the bead impedance at a variety of current levels. In this case the user can make sure the ferrite bead maintains an adequate amount of impedance at the peak current the amplifier will see. If these specifications are not available, the device can also estimate the bead current handling capability by measuring the resonant frequency of the filter output at low power and at maximum power. A change of resonant frequency of less than fifty percent under this condition is desirable. Examples of ferrite beads which have been tested and work well with the TPA3136D2 can be seen in the TPA3136D2EVM user guide SLOU444. A high quality ceramic capacitor is also required for the ferrite bead filter. A low ESR capacitor with good temperature and voltage characteristics will work best. Additional EMC improvements may be obtained by adding snubber networks from each of the class-D outputs to ground. Suggested values for a simple RC series snubber network would be 18 Ω in series with a 330 pF capacitor although design of the snubber network is specific to every application and must be designed taking into account the parasitic reactance of the printed circuit board as well as the audio amp. Take care to evaluate the stress on the component in the snubber network especially if the amp is running at high PVCC. Also, make sure the layout of the snubber network is tight and returns directly to the GND pins on the IC. Figure 31 and Figure 32 are TPA3128D2 EN55022 Radiated Emissions results uses TPA3128D2EVM with 8-Ω speakers. Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 19 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com Figure 31. TPA3128D2 Radiated Emissions-Horizontal (PVCC=12V, PO=1W) Figure 32. TPA3128D2 Radiated Emissions-Vertical (PVCC=12V, PO=1W) 7.3.15 When to Use an Output Filter for EMI Suppression A complete LC reconstruction filter should be added in some circuit instances. These circumstances might occur if there are nearby circuits which are sensitive to noise. In these cases a classic second order Butterworth filter similar to those shown in the figures below can be used. Some systems have little power supply decoupling from the AC line but are also subject to line conducted interference (LCI) regulations. These include systems powered by "wall warts" and "power bricks." In these cases, LC reconstruction filters can be the lowest cost means to pass LCI tests. Common mode chokes using low frequency ferrite material can also be effective at preventing line conducted interference. 10 µH OUTP L1 C2 0.68 µF 4W-8W 10 µH OUTN L2 C3 0.68 µF Ferrite Chip Bead OUTP 1 nF 4W-8W Ferrite Chip Bead OUTN 1 nF Figure 33. TPA31xxD2 Output Filters 7.3.16 AM Avoidance EMI Reduction Table 6. AM Frequencies US EUROPEAN AM FREQUENCY (kHz) AM FREQUENCY (kHz) SWITCHING FREQUENCY (kHz) AM2 AM1 AM0 500 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 522-540 540-917 917-1125 914-1122 600 (or 400) 1125-1375 1122-1373 500 1375-1547 20 540-914 Submit Documentation Feedback 1373-1548 600 (or 400) Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 Table 6. AM Frequencies (continued) US EUROPEAN AM FREQUENCY (kHz) AM FREQUENCY (kHz) 1547-1700 1548-1701 SWITCHING FREQUENCY (kHz) 600 (or 500) AM2 AM1 AM0 0 1 0 0 0 1 7.4 Device Functional Modes 7.4.1 PBTL Mode The TPA3128D2 can be connected in PBTL mode enabling up to 60W output power. This is done by: • Connect INPL and INNL directly to Ground (without capacitors) this sets the device in Mono mode during power up. • Connect OUTPR and OUTNR together for the positive speaker terminal and OUTNL and OUTPL together for the negative pin. • Analog input signal is applied to INPR and INNR. TPA3128D2 4.5 V–26 V PSU OUTPR OUTNR Right LC Filter PBTL Detect Left OUTPL OUTNL Figure 34. PBTL Mode 7.4.2 Mono Mode (Single Channel Mode) The and TPA3129D2 can be connected in MONO mode to cut the idle power-loss nearly by half. This is done by: • Connect INPR and INNR directly to Ground (without capacitors) this sets the device in Mono mode during power up. • Connect OUTPL and OUTNL to speaker just like normal BTL mode. • Analog input signal is applied to INPL and INNL. TPA3128D2, TPA3129D2 Right MONO Detect OUTPR OUTNR OUTPL OUTNL Left 4.5 V–26 V PSU LC Filter Figure 35. MONO Mode Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 21 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com 8 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information This section describes a 2.1 Master and Slave application. The Master is configured as stereo outputs and the Slave is configured as mono PBTL output. 8.2 Typical Application A 2.1 solution, U1 TPA312xD2 in Master mode 400 kHz, BTL, gain if 20 dB, power limit not implemented. U2 in Slave, PBTL mode gain of 20dB. Inputs are connected for differential inputs. 22 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 Typical Application (continued) PVCC DECOUPLI NG OUTPUT LC FILTER PVCC EMI C-RC SNUBBER 1 2 15 R18 100k SYNC AM2 BSNL AM1 PVCC AM0 PVCC SY NC AVCC 2 OUT_P_RIGHT 1 2 1 1 2 1 2 2 L10 10uH 1 19 C111 220nF 2 18 PVCC C120 1nF 1 2 1 1 2 1 R24 3.3R C80 1nF GND 17 C58 680nF C118 100nF C76 220uF 4.7k 1 L9 10uH OU T_N_RIGH T 1 C59 680nF 20 TPA312xD2 2 2 1 2 21 10uH 1 22 L8 1 23 R26 3.3R 2 2 1 C75 10nF OUT_P_LEFT OUTN L C40 220nF C119 220nF 1 2 24 2 GND GND 25 2 1 16 MUTE OUTPL 1 - GND C79 10nF C110 1nF + R23 3.3R 2 OUT_ N_LEFT 14 MUTE LINN 27 26 2 C1161uF LINP GND BSPL + 1 13 GND BSNR 1 2 1 GAIN/SLV OUTN R C113 680nF C115 10nF C109 1nF 2 12 2 LINN GVDD 29 28 2 LINP 11 PLIMIT GND 1 C46 1uF 2 1 GND GND GND 2 2 2 10 OUTPR RINN 220nF 2 1 9 8 RINP C43 1 30 2 R17 20k 12 1 7 BSPR 2 1 6 GVDD R27 100k PVCC FAU LTZ C112 1nF C114 10nF 31 1 5 SDZ R25 3.3R GND 32 2 4 1 PVCC 1 3 C121 1uF C117 1uF 10uH C77 680nF 2 1uF 1 GND 1 2 2 L7 220uF GND 1 FAULTZ RINN C101 C107 100nF U3 SDZ C95 2 1 1 C47 100nF GND GVDD R28 100k 1 2 GND RINP C108 1nF GND 2 R10 3.3R GND 2 2 1 GND 2 GND 1 Power Pad C74 10nF 2 PVCC 1 2 1 1 GND PVCC DECOUPLI NG PVCC DECOUPLI NG 1 1 1 PVCC 47pF C126 C127 100nF 220uF 2 2 2 C128 1nF U4 2 13 1 R36 100k 14 15 16 GND LINP LINN MUTE GND OUTN L AM2 BSNL AM1 PVCC AM0 PVCC SY NC AVCC GND 22 21 20 C132 680nF 1 2 1 19 2 C130 220nF L16 18 C134 10nF C129 1nF R47 3.3R OUT_P_SUB 1 1 2 GND 23 + - 10uH PVCC 17 C138 1nF C136 100nF 2 TPA312xD2 2 2 2 C140 220nF C137 220nF 1 2 24 1 1 2 1 25 1 BSPL OUTPL 26 C131 1nF C133 10nF OUT_N_SUB MUTE 12 GND GND C124 680nF 1 2 11 GND GAIN/SLV BSNR 27 R46 3.3R 2 10 GVDD OUTN R 1 R35 75k 9 8 GND PLIMIT 10uH 2 7 RINN L15 29 28 1 R48 47k 2 2 C135 1uF 12 1 1 6 GVDD2 OUTPR EMI C-RC SNUBBER 2 2 C139 1uF BSPR RINP 1 C122 220nF 1 2 30 1 5 FAU LTZ OUTPUT LC FILTER 31 C123 220uF 2 RINN 1 PVCC 1 4 2 SDZ 2 RINP 3 GND 32 GND C125 1uF 2 1 PVCC GND 2 FAULTZ GND GND SDZ 1 1 R49 100k 1 2 GND Power Pad GVDD2 GND PVCC DECOUPLI NG Copyright © 2016, Texas Instruments Incorporated Figure 36. TPA312xD2 Schematic Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 23 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com Typical Application (continued) 8.2.1 Design Requriements DESIGN PARAMETERS EXAMPLE VALUE Input voltage range PVCC 4.5 V to 26 V PWM output frequencies 300kHz, 400 kHz, 500 kHz, 600 kHz, 1 MHz or 1.2 MHz Maximum output power 50 W 8.2.2 Detailed Design Procedure The TPA31xxD2 devices are very flexible and easy to use Class D amplifier; therefore the design process is straightforward. Before beginning the design, gather the following information regarding the audio system. • PVCC rail planned for the design • Speaker or load impedance • Maximum output power requirement • Desired PWM frequency 8.2.2.1 Select the PWM Frequency Set the PWM frequency by using AM0, AM1 and AM2 pins. 8.2.2.2 Select the Amplifier Gain and Master/Slave Mode In order to select the amplifier gain setting, the designer must determine the maximum power target and the speaker impedance. Once these parameters have been determined, calculate the required output voltage swing which delivers the maximum output power. Choose the lowest analog gain setting that corresponds to produce an output voltage swing greater than the required output swing for maximum power. The analog gain and master/slave mode can be set by selecting the voltage divider resistors (R1 and R2) on the Gain/SLV pin. 8.2.2.3 Select Input Capacitance Select the bulk capacitors at the PVCC inputs for proper voltage margin and adequate capacitance to support the power requirements. In practice, with a well-designed power supply, two 100-μF, 50-V capacitors should be sufficient. One capacitor should be placed near the PVCC inputs at each side of the device. PVCC capacitors should be a low ESR type because they are being used in a high-speed switching application. 8.2.2.4 Select Decoupling Capacitors Good quality decoupling capacitors must be added at each of the PVCC inputs to provide good reliability, good audio performance, and to meet regulatory requirements. X5R or better ratings should be used in this application. Consider temperature, ripple current, and voltage overshoots when selecting decoupling capacitors. Also, these decoupling capacitors should be located near the PVCC and GND connections to the device in order to minimize series inductances. 8.2.2.5 Select Bootstrap Capacitors Each of the outputs require bootstrap capacitors to provide gate drive for the high-side output FETs. For this design, use 0.22-μF, 25-V capacitors of X5R quality or better. 24 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 8.2.3 Application Curves 10 Maximum Output Power (W) THD+N (%) Gain=26dB PVCC=24V TA=25qC 1 RL=3: 0.1 0.01 f= 20Hz f= 1kHz f= 6KHz 0.001 0.01 0.1 1 10 Output Power (W) 50 100 200 140 130 Gain=26dB T 120 A=25qC RL=3: 110 100 90 80 70 60 50 40 30 20 10 0 4 6 8 D026 Figure 37. Total Harmonic Distortion + Noise (PBTL) vs Output Power THD+N=1% THD+N=10% 10 12 14 16 18 Supply Voltage (V) 20 22 24 26 D027 Figure 38. Maximum Output Power (PBTL) vs Supply Voltage 9 Power Supply Recommendations The power supply requirements for the TPA312xD2 consist of one higher-voltage supply to power the output stage of the speaker amplifier. Several on-chip regulators are included on the TPA312xD2 to generate the voltages necessary for the internal circuitry of the audio path. The voltage regulators which have been integrated are sized only to provide the current necessary to power the internal circuitry. The external pins are provided only as a connection point for off-chip bypass capacitors to filter the supply. Connecting external circuitry to these regulator outputs may result in reduced performance and damage to the device. The high voltage supply, between 4.5 V and 26 V, supplies the analog circuitry (AVCC) and the power stage (PVCC). The AVCC supply feeds internal LDO including GVDD. This LDO output are connected to external pins for filtering purposes, but should not be connected to external circuits. GVDD LDO output have been sized to provide current necessary for internal functions but not for external loading. 9.1 Power Supply Mode The TPA3128D2 and TPA3129D2 devices support both single and dual power supply modes. Dual power supply mode is benefit for low PVCC power consumption. For dual power supply mode application, when AVCC is supplied with 4.5V power, PVCC is recommended to be lower than 20V. When PVCC is supplied with power greater than 20V, AVCC is recommended to be higher than 6V. 10 Layout 10.1 Layout Guidelines The TPA312xD2 can be used with a small, inexpensive ferrite bead output filter for most applications. However, because the class-D switching edges are fast, the layout of the printed circuit board must be planned carefully. The following suggestions will help to meet EMC requirements. • Decoupling capacitors — The high-frequency decoupling capacitors should be placed as close to the PVCC and AVCC terminals as possible. Large (100 μF or greater) bulk power supply decoupling capacitors should be placed near the TPA312xD2 on the PVCC supplies. Local, high-frequency bypass capacitors should be placed as close to the PVCC pins as possible. These caps can be connected to the IC GND pad directly for an excellent ground connection. Consider adding a small, good quality low ESR ceramic capacitor between 220 pF and 1 nF and a larger mid-frequency cap of value between 100 nF and 1 µF also of good quality to the PVCC connections at each end of the chip. • Keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to GND as small and tight as possible. The size of this current loop determines its effectiveness as an antenna. • Grounding — The PVCC decoupling capacitors should connect to GND. All ground should be connected at the IC GND, which should be used as a central ground connection or star ground for the TPA312xD2. • Output filter — The ferrite EMI filter (see Figure 33) should be placed as close to the output terminals as possible for the best EMI performance. The LC filter should be placed close to the outputs. The capacitors used in both the ferrite and LC filters should be grounded. Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 25 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com Layout Guidelines (continued) For an example layout, see the TPA3128D2 Evaluation Module (TPA3128D2EVM) User Guide (SLOU336). Both the EVM user manual and the thermal pad application reports, SLMA002 and SLMA004, are available on the TI Web site at http://www.ti.com. 10.2 Layout Example Figure 39. Layout Example Top 26 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 Layout Example (continued) Figure 40. Layout Example Bottom Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 27 TPA3128D2, TPA3129D2 SLOS941C – MAY 2016 – REVISED JANUARY 2018 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 28 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 TPA3128D2, TPA3129D2 www.ti.com SLOS941C – MAY 2016 – REVISED JANUARY 2018 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2016–2018, Texas Instruments Incorporated Product Folder Links: TPA3128D2 TPA3129D2 Submit Documentation Feedback 29 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPA3128D2DAP ACTIVE HTSSOP DAP 32 46 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TPA3128D2 TPA3128D2DAPR ACTIVE HTSSOP DAP 32 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TPA3128D2 TPA3129D2DAP ACTIVE HTSSOP DAP 32 46 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TPA3129D2 TPA3129D2DAPR ACTIVE HTSSOP DAP 32 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TPA3129D2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of