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TPL7407LEVM

TPL7407LEVM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    -

  • 描述:

    TPL7407L - Power Management, Low Side Driver (External FET) Evaluation Board

  • 数据手册
  • 价格&库存
TPL7407LEVM 数据手册
User's Guide SLRU005 – February 2013 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM 1 Overview The TPL7407LEVM is a 7-Channel Relay and Inductive Load Sink Driver evaluation module that demonstrates the TPL7407LDR integrated circuit from Texas Instruments (TI). The TPL7407LDR is a high-performance peripheral driver designed to drive loads of many types including: relays, stepper motors, lamps, and light emitting diodes. The EVM is configured with seven push buttons that supply input to the TPL7407L driver and seven relays are driven by the TPL7407Loutputs. A four terminal block can be connected to external power supplies to provide input and relay power. All of the TPL7407Linput and output pins are accessible for external connection. 1.1 TPL7407LEVM Features • • • • • • Seven numbered push buttons control input for device testing. Seven numbered light emitting diodes indicate relay contact closure. Three 0.1” spaced post connector ports that allow access to all input pins, output pins, and relay contacts. Three open locations, per channel, on the circuit board for user supplied components. Onboard relay loads that can be disconnected by removing surface mounted 0Ω resistors. A large device clearance area that allows the use of small profile temperature forcing equipment. Table 1. TPL7407LEVM Specification Key Parameters Input Supply Voltage: 0V – 5.5V Relay Supply Voltage: 8.5V – 24V Output Current: Number of Channels: Onboard Load: • • • • • • 0mA to 500mA 7 Seven OMRON G5NB relays G5NB specs Nominal coil resistance is 2,880Ω Nominal coil current is 8.3mA Nominal coil voltage is 24V Pickup voltage < 75% Nominal Dropout voltage > 10% Nominal Maximum coil voltage 180% Nominal CAUTION: Applying voltages above the limitations given in Table 1 may cause permanent damage to your hardware. Gerber (layout) files are available at www.ti.com. The EVM includes mating connectors for input, output, and contact pins. SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 1 Quick Setup Guide www.ti.com PCB Key Map Physical structure for the TPL7407LEVM is illustrated in Figure 1. Figure 1. Physical Structure for the TPL7407LEVM (Approximate Layout) 2 Quick Setup Guide This section describes the setup to quickly check the functionality of TPL7407LEVM. 2.1 Electrostatic Discharge Warning Many of the components on the TPL7407LEVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation. CAUTION: Failure to observe ESD handling procedures may result in damage to EVM components. Unpacking the EVM After opening the TPL7407LEVM package, check to ensure that the following items are included: • 1 pc. TPL7407LEVM board using one TPL7407LDR • 3 pc. Eight pin insulation displacement connectors that accept AWG 22 insulated wire. 2 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback EVM Theory and Operation www.ti.com Power Supply Setup A 8.5V - 24V power supply capable of 500 mA of current is required. Connect the positive power supply lead to the “Input Supply” on TB1-1 and also connect it to the “Relay Supply” on TB1-4. Connect the negative power supply lead to either of the two ground connections on TB1-2 or TB1-3. It is important to connect the power supply correctly because opposite supply polarity will damage the EVM. Turn the power supply on. At this time, the EVM light emitting diodes (LEDS) should be off and no current should be flowing from the power supply. The TPL7407L consumes no power when all seven channels are off. Press the pushbuttons labeled IN1 through IN7 one at a time. When pressed the corresponding relay will click as the contacts engage and the LED will illuminate. Releasing a pushbutton will disengage the corresponding relay contacts and extinguish the LED. If all seven buttons operate as previously described, then the TPL7407LEVM passes functional testing. 3 EVM Theory and Operation The following single channel schematic is representative of the seven identical driver channels. TB1 Relay Supply± 4 C2 0.1F Ground± 3 + 470F C21-27 C1 R51- R57 Ground± 2 Input Supply± 1 C3 pin 8 J2 - Output DNI R21- R27 0.1F 10K R31- R37 DNI D1 0 J3 - Contact pins 1- 7 R41- R47 IN1-7 COM TPL7407L 1 of 7 Channels J2 - Output pins 1- 7 OUT1- 7 Regulation Circuitry J1 - Input pin 1- 7 IN1-7 R1-7 DNI 50.Ÿ DRIVER Shared 1MŸ J1 - Input pin 8 GND Figure 2. Single Channel Schematic The TPL7407LEVM is designed to accept an “Input Supply” on TB1-1 with a voltage range of 1.8V to 5.5V and a “Relay Supply” on TB1-4 with a voltage range ideally set to 24V ±10%, but will still operate with a minimum voltage of 8.5V and a maximum voltage of 40V. SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 3 EVM Theory and Operation www.ti.com When none of the buttons are pressed, the TPL7407L inputs will be open circuit and the internal resistors in the TPL7407Lwill ensure zero volts on the inputs. With the inputs low, the TPL7407Loutput pins will set to a high impedance state; therefore, no current will flow through the relay coils. The relay contact will not be engaged and the voltage on the J3-Contact pins 1 to 7 will be pulled up to the relay supply voltage by a 10kΩ resistor on the PCB. Pressing one of the input buttons, labeled IN1 to IN7, will apply the input voltage supply on TB1-1 to the corresponding input pin on the TPL7407L. The internal resistor on the TPL7407L input pin will draw a small current proportional to the input voltage. The nominal current is input voltage divided by 1MΩ, it can also be expressed as the ratio, 1µA/V. The NMOS switch inside the TPL7407Lturns on providing a low resistance path from output to ground. This completes the circuit and current flows from the relay supply through the G5NB relay coil and through the TPL7407Loutput switch to ground and finally back through the relay supply return lead. The relay coil current will engage the relay contacts. The relay contacts will short the corresponding J3 “contact” pin to ground. It will also complete the corresponding LED circuit and the LED will illuminate. Releasing one of the input buttons, labeled IN1 to IN7, will remove the input voltage from the corresponding input pin on the TPL7407L. The internal resistor on the TPL7407L input pin will decrease the input voltage to zero. The NMOS switch inside the TPL7407Lturns off breaking the current path for the relay coil. Since the coil is an inductor, the current cannot change in zero time. The coil voltage will change polarity resulting in a TPL7407Loutput voltage that is greater than the relay supply voltage. This will forward bias the diode inside the TPL7407Lpassing current back to the relay supply voltage. This current will continue until the stored coil energy is depleted. The relay contacts will disengage and the short on the J3-Contact pin will be removed and the pin voltage will increase back to the relay supply voltage. The LED circuit will be open, thus extinguishing the LED. The voltage on the output pins is always available on the J2-Output connector pins 1-7. Pin 8 is connected to the COM pin on the TPL7407Land the relay supply voltage on TB1 pin 4. The J2-Output connector can be used measure the output voltage. It can also be used to add additional loads to the TPL7407Loutput pins. The series resistance between the J2-output connector and the TPL7407L is approximately 20 mΩ. The onboard AGQ2003 relay coils can be removed from the TPL7407L by removing the seven 0Ω resistors at locations R41 to R47. The voltage on the input pins is always available on the J1-Input connector pins 1-7. Pin 8 is connected to the GND pin on the TPL7407Land the ground voltage on TB1 pins 2 & 3. The J1-Input connector can be used measure the input voltage. It can also be used to inject external signals onto the TPL7407Linput pins. Three user supplied components, per channel, can be added if needed. All three circuit board footprints are SMD 0603 sized. The first location, R1 to R7, allows adding a resistor from each input to ground. The second, R21 to R27, and third location, C21 to C27, are in series with each other and parallel with the G5NB relay coils. The terminal block, TB1, provides power for the input pushbuttons and relay coils. When directly controlling the inputs using the J1-Input connector, the input source on TB1 pin1 may be disconnected. The TPL7407L EVM board has seven identical channels. The single channel schematic is easier to read then the complete schematic. The TPL7407Lsingle model functional diagram is enclosed by dotted lines. The input pin has a 1MΩ resistor that keeps the driver off when no input is disconnected or put in to a high impedance state. The NMOS transistor sinks to a shared ground connection when the input voltage is applied. When the load is inductive and the NMOS turns off, the output voltage will increase beyond the relay supply voltage and inductor current will continue to flow though the free wheeling diode to the COM pin until the inductor is discharged. Resistors R41 through R47 can be removed to isolate the output from the relay coils when external load or automated test equipment is provided through the J2-Output connector. The relay is an G5NB relay with a 2,880Ω, 24V, 8.3mA nominal coil. The pull-in voltage is less than 2.25V (3V × 75%) and the drop out voltage is greater than 0.3V. The maximum coil voltage is 43.2V (24V × 180%). The relay contact when open will allow the J3-Contact pin to rise to the Relay supply voltage. The voltage on J3-Contact connector can be measured by any high impedance (>100kΩ) measuring device. When the contacts close the J2-Contact pin will be pulled down to ground potential. 4 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com The TPL7407Loutput pins 16 to 10 are connected to relays RL1 to RL7 and J2-Output port pins 1 -7 (pin 8 is relay coil power sense). The TPL7407LCOM, pin 9, is connected to the relay supply on TB1. This pin connects to the cathodes of free wheeling diodes for each output. It provides a discharge path when the inductive load is turned off. The inputs can be fully controlled by external test equipment using the J1-Input Port. The outputs can be measured by external test equipment using the J2-Output Port. If relay supply voltage, TPL7407L COM pin, exceeds 40V or full external control is required, then the relay coils should be disconnected by removing the zero ohm resistors labeled R41 to R47. The TPL7407LEVM has open 0603 foot prints for input resistors to ground as R11 to R17, coil wave shaping resistor and capacitors as R31 to R37 and C31 to C37. The TPL7407L does not require these components. Increasing output load using onboard relays: Shorting two or more of the J2 pins 1-7 (output port) will parallel the TPL7407Loutputs and relay coils. By activate just one of the inputs for the shorted output channels will cause a single output to drive multiple relay coil loads. Two coils typically uses 16.6mA and three coils typically use 24.9mA. 4 TPL7407LEVM Performance Testing Using Lab Equipment Datasheet electrical characterization parameters can be measured using the following test setups. Setups for both standard EVM boards and modified EVM boards that have R41 to R47 removed to disconnect the onboard relay loads. It is acceptable to keep some channels “standard” (R4x installed) and other channels “modified” (R4x removed). The capacitors (470µF & 0.1µF) on the TPL7407L COM pin are connected regardless of R41 to R47 presence. Therefore the charging, discharging, and leakages of the capacitors must be considered. Each output pin has an internal diode to the COM pin. Testing for channel 1 will be described; test other channels by using a different pin on the J1(input) and J2(output) connectors. Channel Tested J1(Input)-pin J2(Output)-pin CH 1 J1–1 J2–1 CH 2 J1–2 J2–2 CH 3 J1–3 J2–3 CH 4 J1–4 J2–4 CH 5 J1–5 J2–5 CH 6 J1–6 J2–6 CH 7 J1–7 J2–7 Relay supply is connected to TB1 pin 4; the Relay supply sense line can also be connected to TB1-pin4. Alternatively the sense line can be connected to J2 pin 8. The relay supply is the same node as the TPL7407LCOM (pin 9). Ground power and ground sense connection can be made to TB1 pins 2 and 3. An alternative ground sense can be made at J1 pin 8. Warning: All tests that supply current should be limited to the data sheet limit of 600mA. Input pin voltage should be limited to 30V and output pin voltage should be limited to 40V. SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 5 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Input parameter VI(on) and VI(off) Channel 1 Test Setup and Typical Results Board setup: Sweep input voltage on J1-1; Set Output J2-1 and Relay Supply to 24V, measure output current on J2-1 [current clamp on measurement range of 10mA is recommended]. Note: any difference between voltage on J2-1 and Relay Supply(TB1-4) will affect low current accuracy with Standard board. 24V I TB1-4 J1-1 IN COM 1/7 TPL7407L OUT Current Limit 10 mA Measure Current J2-1 GND Sweep Voltage 0 to 1.5V TB1-2 Figure 3. VI(on) and VI(off) Schematic 6 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Input Parameter II(on) Channel 1 Test Setup and Typical Results Input current is a function of input voltage alone. The output load impedance and termination voltage have no impact on the results. Board setup: Sweep input voltage on J1-1. Measure input current on J1-1. Optionally, Relay supply can be connected to 24V. 24 V TB1-4 Measure Current I J1-1 IN COM 1/7 TPL7407L OUT J2-1 GND Sweep Voltage 0 to 5.5V TB1-2 Figure 4. II(on) Schematic SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 7 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Input Parameter II(off) Channel 1 Test Setup and Typical Results Input current with zero input voltage will be very low. A pico-amp meter is recommended. This is a signal point test. Standard board setup: Set input voltage on J1-1 to 0V. Measure input current on J1-1. Optionally, output J2-1 and Relay Supply can be set to 24V. Modified board setup: Sweep CH1 voltage on J1-1; Set Output J2-1 and Relay Supply to 24V, measure current on J1-1. The return lead of the pico-amp meter must be at board ground potential. 24 V TB1-4 Measure Current I J1-1 COM 1/7 IN TPL7407L OUT J2-1 GND TB1-3 TB1-2 Figure 5. II(off) Schematic 8 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Output Parameter VOL Channel 1 Test Setup and Typical Results This parameter was called collector emitter saturation voltage on the original TPL7407L device. The data sheet has specifications for input voltages of 1.8V - 5V. Board setup: Sweep output current on J2-1. Set desired input voltage on J1-1 [1.8V - 5V, and other voltages]. Disconnect the relay supply on TB1-4. Measure output voltage on J2-1 (kelvin connections at J2-1 and ground are highly recommended for accurate results). OPEN TB1-4 Sweep Current COM J1-1 IN 1/7 TPL7407L OUT J2-1 0 to 500 mA Kelvin Connection GND 1.8V ± 5.0V TB1-2 Measure Voltage V TB-3 Figure 6. VOL Schematic SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 9 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com VOL at Various Temperatures 1.60 1.40 1.20 VOL (V) 1.00 25C 0.80 70C 105C 0.60 -40C 0.40 0.20 0.00 0 100 200 300 400 500 600 700 Output Drain Current IDS(mA) Figure 7. VOL vs IOL 10 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Output Parameter IOUT(on) Channel 1 Test Setup and Typical Results Board setup: Sweep input voltage on J1-1. Set output voltage on J2-1 to 0.4V. Disconnect the relay supply on TB1-4. Measure output current on J2-1 (sense connections at J2-1 and ground are highly recommended to keep 0.4V on the EVM regardless of line losses in wires and current meter). OPEN TB1-4 J1-1 IN COM 1/7 TPL7407L Measure Current OUT J2-1 GND Sweep Voltage 0 V to 5.5 V I SENSE 0.4 V TB1-2 SENSE TB1-3 Figure 8. IOUT(on) Schematic SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 11 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Switching Parameter tPHL 3.3V 50Ω Channel 1 Test Setup and Typical Results Board setup: The TPL7407Land TPL7407LEVM are primarily designed for slow responding loads like relays, stepper motors, and DC lab equipment; however, the TPL7407Lrise/fall times and propagation delays are short. Therefore line termination and short wires are important for signal quality. The waveform below uses a 50 ohm cable “T” tapped within 3 cm of the J1-Input connector and terminated at the oscilloscope set to 50 ohm input impedance. This input is used as the scope trigger. A locally grounded 10X scope probe is used to measure the input signal and the same probe was used to measure the output on J2-1. A pull up resistor of 50Ω is connected between the output (J2-1) and Relay supply (J2-8). Set scope trigger for rising edge. Pulse generator is 10% duty cycle 100kHz 3.3V logic level signal. 24V Rising Edge Slope T rigger 50 TB1-4 J2-8 COM TEE J1-8 GND J1-1 IN COM 1/7 TPL7407L 50 OUT J2-1 GND 10x Scope 3UREH³,QSXW´ TB1-2 3.3 V 0V 10x Scope Probe ³2XWSXW´ Pulse Generator 100 kHz 10% Duty Cycle Figure 9. TPHL Schematic Switching Parameter tPLH 3.3V 50Ω Channel 1 Test Setup and Typical Results Board setup: The TPL7407Land TPL7407LEVM are primarily designed for slow responding loads like relays, stepper motors, and DC lab equipment; however, the TPL7407Lrise/fall times and propagation delays are quite short. Therefore line termination and short wires are important for signal quality. The waveform below uses a 50 ohm cable “T” tapped within 3 cm of the J1-Input connector and terminated at the oscilloscope set to 50 ohm input impedance. This input is used as the scope trigger. A locally grounded 10X scope probe is used to measure the input signal and the same probe was used to measure the output on J2-1. A pull up resistor of 50Ω is connected between the output (J2-1) and Relay supply (J28). Set scope trigger for falling edge. Pulse generator is 10% duty cycle 100kHz 3.3V logic level signal. 12 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com 24V Falling Edge Slope T rigger 50 TB1-4 J2-8 COM TEE J1-8 GND J1-1 IN COM 1/7 TPL7407L 50 OUT J2-1 GND 10x Scope 3UREH³,QSXW´ TB1-2 3.3 V 0V 10x Scope Probe ³2XWSXW´ Pulse Generator 100 kHz 10% Duty Cycle Figure 10. TPLH Schematic Switching Parameter RIN Channel 1 Test Setup and Typical Results. The data to calculate RIN, the DC input resistance, was recorded during the II(on) test. The input resistance is simply input voltage divided by input current. SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 13 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Free-wheeling Diode Parameter VF channel 1 Test Setup and Typical Results Board setup: Sweep output current on J2-1. Set Relay supply voltage to 0V. On standard boards the X axis (output current) will need to be compensated for coil current flow. The real diode current is approximately X-VF/2,880Ω. Measure output current on J2-1 (Kelvin connections at J2-1 and relay supply are highly recommended for accurate results). Measure Voltage V TB1-4 OPEN J1-1 IN COM 1/7 TPL7407L OUT J2-1 GND TB1-2 Sweep Current 0 to 600 mA Figure 11. VF Schematic 14 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated SLRU005 – February 2013 Submit Documentation Feedback TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Fly-back Diode Forward Voltage 0.800 0.700 0.600 IF (A) 0.500 0.400 0.300 0.200 0.100 0.000 0.000 0.200 0.400 0.600 0.800 1.000 1.200 1.400 1.600 VF (V) Figure 12. VF = Diode(V) vs Diode(I) SLRU005 – February 2013 Submit Documentation Feedback TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated 15 NOTE: On silkscreen, label: pin 1 -"Input Supply", pin 2 and 3 -"Ground" pin 4 - "Relay Supply" 8 HEADER IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 R4 TPL7407L7-Channel Relay and Inductive Load Sink Driver EVM Copyright © 2013, Texas Instruments Incorporated TB1 1 2 3 4 V_IN DNI DNI DNI R3 R TERM BLOCK R R2 R 1 2 3 4 5 6 7 8 R5 R J1 R6 R R1 R R7 R 16 R8 R V_IN 3 2 C3 0.1UF C2 0.1UF 3 2 V_IN 4 1 SPST IN5 4 1 SPST IN1 + C1 470UF 2 1 SPST IN6 2 1 3 4 SPST IN2 2 1 V_RELAY 3 4 SPST IN7 2 1 3 4 SPST IN3 3 4 MTG4 MTG3 3 MTG2 DNI 4 3 4 MTG1 2 1 SPST IN8 2 1 SPST IN4 0 R10 1 2 3 4 5 6 7 8 9 P18 P17 P16 P15 P14 P13 P12 P11 P10 18 17 16 15 14 13 12 11 10 ULN2003LVDR P1 P2 P3 P4 P5 P6 P7 P8 P9 U1 1 2 3 4 5 6 7 8 8 HEADER J3 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 V_RELAY R11 0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 J2 CONTACT1 CONTACT2 CONTACT3 CONTACT4 CONTACT5 CONTACT6 CONTACT7 CONTACT8 8 HEADER 1 2 3 4 5 6 7 8 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 TPL7407LEVM Performance Testing Using Lab Equipment www.ti.com Figure 13. Full Schematic SLRU005 – February 2013 Submit Documentation Feedback DNI DNI DNI DNI DNI Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. 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